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1<?xml version="1.0" encoding="UTF-8"?>
2<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
3 "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
4
7f817074 5<book id="gpuDevelopersGuide">
2d2ef822 6 <bookinfo>
3a4579b4 7 <title>Linux GPU Driver Developer's Guide</title>
2d2ef822 8
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9 <authorgroup>
10 <author>
11 <firstname>Jesse</firstname>
12 <surname>Barnes</surname>
13 <contrib>Initial version</contrib>
14 <affiliation>
15 <orgname>Intel Corporation</orgname>
16 <address>
17 <email>jesse.barnes@intel.com</email>
18 </address>
19 </affiliation>
20 </author>
21 <author>
22 <firstname>Laurent</firstname>
23 <surname>Pinchart</surname>
24 <contrib>Driver internals</contrib>
25 <affiliation>
26 <orgname>Ideas on board SPRL</orgname>
27 <address>
28 <email>laurent.pinchart@ideasonboard.com</email>
29 </address>
30 </affiliation>
31 </author>
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32 <author>
33 <firstname>Daniel</firstname>
34 <surname>Vetter</surname>
35 <contrib>Contributions all over the place</contrib>
36 <affiliation>
37 <orgname>Intel Corporation</orgname>
38 <address>
39 <email>daniel.vetter@ffwll.ch</email>
40 </address>
41 </affiliation>
42 </author>
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43 <author>
44 <firstname>Lukas</firstname>
45 <surname>Wunner</surname>
46 <contrib>vga_switcheroo documentation</contrib>
47 <affiliation>
48 <address>
49 <email>lukas@wunner.de</email>
50 </address>
51 </affiliation>
52 </author>
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53 </authorgroup>
54
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55 <copyright>
56 <year>2008-2009</year>
3a05700d 57 <year>2013-2014</year>
9cad9c95 58 <holder>Intel Corporation</holder>
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59 </copyright>
60 <copyright>
61 <year>2012</year>
9cad9c95 62 <holder>Laurent Pinchart</holder>
2d2ef822 63 </copyright>
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64 <copyright>
65 <year>2015</year>
66 <holder>Lukas Wunner</holder>
67 </copyright>
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68
69 <legalnotice>
70 <para>
71 The contents of this file may be used under the terms of the GNU
72 General Public License version 2 (the "GPL") as distributed in
73 the kernel source COPYING file.
74 </para>
75 </legalnotice>
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76
77 <revhistory>
78 <!-- Put document revisions here, newest first. -->
79 <revision>
80 <revnumber>1.0</revnumber>
81 <date>2012-07-13</date>
82 <authorinitials>LP</authorinitials>
83 <revremark>Added extensive documentation about driver internals.
84 </revremark>
85 </revision>
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86 <revision>
87 <revnumber>1.1</revnumber>
88 <date>2015-10-11</date>
89 <authorinitials>LW</authorinitials>
90 <revremark>Added vga_switcheroo documentation.
91 </revremark>
92 </revision>
9cad9c95 93 </revhistory>
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94 </bookinfo>
95
96<toc></toc>
97
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98<part id="drmCore">
99 <title>DRM Core</title>
100 <partintro>
101 <para>
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102 This first part of the GPU Driver Developer's Guide documents core DRM
103 code, helper libraries for writing drivers and generic userspace
104 interfaces exposed by DRM drivers.
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105 </para>
106 </partintro>
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107
108 <chapter id="drmIntroduction">
109 <title>Introduction</title>
110 <para>
111 The Linux DRM layer contains code intended to support the needs
112 of complex graphics devices, usually containing programmable
113 pipelines well suited to 3D graphics acceleration. Graphics
f11aca04 114 drivers in the kernel may make use of DRM functions to make
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115 tasks like memory management, interrupt handling and DMA easier,
116 and provide a uniform interface to applications.
117 </para>
118 <para>
119 A note on versions: this guide covers features found in the DRM
120 tree, including the TTM memory manager, output configuration and
121 mode setting, and the new vblank internals, in addition to all
122 the regular features found in current kernels.
123 </para>
124 <para>
125 [Insert diagram of typical DRM stack here]
126 </para>
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127 <sect1>
128 <title>Style Guidelines</title>
129 <para>
130 For consistency this documentation uses American English. Abbreviations
131 are written as all-uppercase, for example: DRM, KMS, IOCTL, CRTC, and so
132 on. To aid in reading, documentations make full use of the markup
133 characters kerneldoc provides: @parameter for function parameters, @member
134 for structure members, &amp;structure to reference structures and
135 function() for functions. These all get automatically hyperlinked if
136 kerneldoc for the referenced objects exists. When referencing entries in
137 function vtables please use -&gt;vfunc(). Note that kerneldoc does
138 not support referencing struct members directly, so please add a reference
139 to the vtable struct somewhere in the same paragraph or at least section.
140 </para>
141 <para>
142 Except in special situations (to separate locked from unlocked variants)
143 locking requirements for functions aren't documented in the kerneldoc.
144 Instead locking should be check at runtime using e.g.
145 <code>WARN_ON(!mutex_is_locked(...));</code>. Since it's much easier to
146 ignore documentation than runtime noise this provides more value. And on
147 top of that runtime checks do need to be updated when the locking rules
148 change, increasing the chances that they're correct. Within the
149 documentation the locking rules should be explained in the relevant
150 structures: Either in the comment for the lock explaining what it
151 protects, or data fields need a note about which lock protects them, or
152 both.
153 </para>
154 <para>
155 Functions which have a non-<code>void</code> return value should have a
156 section called "Returns" explaining the expected return values in
157 different cases and their meanings. Currently there's no consensus whether
158 that section name should be all upper-case or not, and whether it should
159 end in a colon or not. Go with the file-local style. Other common section
160 names are "Notes" with information for dangerous or tricky corner cases,
161 and "FIXME" where the interface could be cleaned up.
162 </para>
163 </sect1>
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164 </chapter>
165
166 <!-- Internals -->
167
168 <chapter id="drmInternals">
169 <title>DRM Internals</title>
170 <para>
171 This chapter documents DRM internals relevant to driver authors
172 and developers working to add support for the latest features to
173 existing drivers.
174 </para>
175 <para>
a78f6787 176 First, we go over some typical driver initialization
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177 requirements, like setting up command buffers, creating an
178 initial output configuration, and initializing core services.
a78f6787 179 Subsequent sections cover core internals in more detail,
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180 providing implementation notes and examples.
181 </para>
182 <para>
183 The DRM layer provides several services to graphics drivers,
184 many of them driven by the application interfaces it provides
185 through libdrm, the library that wraps most of the DRM ioctls.
186 These include vblank event handling, memory
187 management, output management, framebuffer management, command
188 submission &amp; fencing, suspend/resume support, and DMA
189 services.
190 </para>
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191
192 <!-- Internals: driver init -->
193
194 <sect1>
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195 <title>Driver Initialization</title>
196 <para>
197 At the core of every DRM driver is a <structname>drm_driver</structname>
198 structure. Drivers typically statically initialize a drm_driver structure,
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199 and then pass it to <function>drm_dev_alloc()</function> to allocate a
200 device instance. After the device instance is fully initialized it can be
201 registered (which makes it accessible from userspace) using
202 <function>drm_dev_register()</function>.
b528ae71 203 </para>
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204 <para>
205 The <structname>drm_driver</structname> structure contains static
206 information that describes the driver and features it supports, and
207 pointers to methods that the DRM core will call to implement the DRM API.
208 We will first go through the <structname>drm_driver</structname> static
209 information fields, and will then describe individual operations in
210 details as they get used in later sections.
2d2ef822 211 </para>
2d2ef822 212 <sect2>
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213 <title>Driver Information</title>
214 <sect3>
215 <title>Driver Features</title>
216 <para>
217 Drivers inform the DRM core about their requirements and supported
218 features by setting appropriate flags in the
219 <structfield>driver_features</structfield> field. Since those flags
220 influence the DRM core behaviour since registration time, most of them
221 must be set to registering the <structname>drm_driver</structname>
222 instance.
223 </para>
224 <synopsis>u32 driver_features;</synopsis>
225 <variablelist>
226 <title>Driver Feature Flags</title>
227 <varlistentry>
228 <term>DRIVER_USE_AGP</term>
229 <listitem><para>
230 Driver uses AGP interface, the DRM core will manage AGP resources.
231 </para></listitem>
232 </varlistentry>
233 <varlistentry>
234 <term>DRIVER_REQUIRE_AGP</term>
235 <listitem><para>
236 Driver needs AGP interface to function. AGP initialization failure
237 will become a fatal error.
238 </para></listitem>
239 </varlistentry>
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240 <varlistentry>
241 <term>DRIVER_PCI_DMA</term>
242 <listitem><para>
243 Driver is capable of PCI DMA, mapping of PCI DMA buffers to
244 userspace will be enabled. Deprecated.
245 </para></listitem>
246 </varlistentry>
247 <varlistentry>
248 <term>DRIVER_SG</term>
249 <listitem><para>
250 Driver can perform scatter/gather DMA, allocation and mapping of
251 scatter/gather buffers will be enabled. Deprecated.
252 </para></listitem>
253 </varlistentry>
254 <varlistentry>
255 <term>DRIVER_HAVE_DMA</term>
256 <listitem><para>
257 Driver supports DMA, the userspace DMA API will be supported.
258 Deprecated.
259 </para></listitem>
260 </varlistentry>
261 <varlistentry>
262 <term>DRIVER_HAVE_IRQ</term><term>DRIVER_IRQ_SHARED</term>
263 <listitem><para>
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264 DRIVER_HAVE_IRQ indicates whether the driver has an IRQ handler
265 managed by the DRM Core. The core will support simple IRQ handler
266 installation when the flag is set. The installation process is
267 described in <xref linkend="drm-irq-registration"/>.</para>
268 <para>DRIVER_IRQ_SHARED indicates whether the device &amp; handler
269 support shared IRQs (note that this is required of PCI drivers).
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270 </para></listitem>
271 </varlistentry>
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272 <varlistentry>
273 <term>DRIVER_GEM</term>
274 <listitem><para>
275 Driver use the GEM memory manager.
276 </para></listitem>
277 </varlistentry>
278 <varlistentry>
279 <term>DRIVER_MODESET</term>
280 <listitem><para>
281 Driver supports mode setting interfaces (KMS).
282 </para></listitem>
283 </varlistentry>
284 <varlistentry>
285 <term>DRIVER_PRIME</term>
286 <listitem><para>
287 Driver implements DRM PRIME buffer sharing.
288 </para></listitem>
289 </varlistentry>
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290 <varlistentry>
291 <term>DRIVER_RENDER</term>
292 <listitem><para>
293 Driver supports dedicated render nodes.
294 </para></listitem>
295 </varlistentry>
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296 <varlistentry>
297 <term>DRIVER_ATOMIC</term>
298 <listitem><para>
299 Driver supports atomic properties. In this case the driver
300 must implement appropriate obj->atomic_get_property() vfuncs
301 for any modeset objects with driver specific properties.
302 </para></listitem>
303 </varlistentry>
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304 </variablelist>
305 </sect3>
306 <sect3>
307 <title>Major, Minor and Patchlevel</title>
308 <synopsis>int major;
309int minor;
310int patchlevel;</synopsis>
311 <para>
312 The DRM core identifies driver versions by a major, minor and patch
313 level triplet. The information is printed to the kernel log at
314 initialization time and passed to userspace through the
315 DRM_IOCTL_VERSION ioctl.
316 </para>
317 <para>
318 The major and minor numbers are also used to verify the requested driver
319 API version passed to DRM_IOCTL_SET_VERSION. When the driver API changes
320 between minor versions, applications can call DRM_IOCTL_SET_VERSION to
321 select a specific version of the API. If the requested major isn't equal
322 to the driver major, or the requested minor is larger than the driver
323 minor, the DRM_IOCTL_SET_VERSION call will return an error. Otherwise
324 the driver's set_version() method will be called with the requested
325 version.
326 </para>
327 </sect3>
328 <sect3>
329 <title>Name, Description and Date</title>
330 <synopsis>char *name;
331char *desc;
332char *date;</synopsis>
333 <para>
334 The driver name is printed to the kernel log at initialization time,
335 used for IRQ registration and passed to userspace through
336 DRM_IOCTL_VERSION.
337 </para>
338 <para>
339 The driver description is a purely informative string passed to
340 userspace through the DRM_IOCTL_VERSION ioctl and otherwise unused by
341 the kernel.
342 </para>
343 <para>
344 The driver date, formatted as YYYYMMDD, is meant to identify the date of
345 the latest modification to the driver. However, as most drivers fail to
346 update it, its value is mostly useless. The DRM core prints it to the
347 kernel log at initialization time and passes it to userspace through the
348 DRM_IOCTL_VERSION ioctl.
349 </para>
350 </sect3>
351 </sect2>
c6a1af8a 352 <sect2>
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353 <title>Device Instance and Driver Handling</title>
354!Pdrivers/gpu/drm/drm_drv.c driver instance overview
25196484 355!Edrivers/gpu/drm/drm_drv.c
c6a1af8a 356 </sect2>
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357 <sect2>
358 <title>Driver Load</title>
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359 <sect3 id="drm-irq-registration">
360 <title>IRQ Registration</title>
361 <para>
362 The DRM core tries to facilitate IRQ handler registration and
363 unregistration by providing <function>drm_irq_install</function> and
364 <function>drm_irq_uninstall</function> functions. Those functions only
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365 support a single interrupt per device, devices that use more than one
366 IRQs need to be handled manually.
9cad9c95 367 </para>
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368 <sect4>
369 <title>Managed IRQ Registration</title>
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370 <para>
371 <function>drm_irq_install</function> starts by calling the
372 <methodname>irq_preinstall</methodname> driver operation. The operation
373 is optional and must make sure that the interrupt will not get fired by
374 clearing all pending interrupt flags or disabling the interrupt.
375 </para>
376 <para>
bb0f1b5c 377 The passed-in IRQ will then be requested by a call to
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378 <function>request_irq</function>. If the DRIVER_IRQ_SHARED driver
379 feature flag is set, a shared (IRQF_SHARED) IRQ handler will be
380 requested.
381 </para>
382 <para>
383 The IRQ handler function must be provided as the mandatory irq_handler
384 driver operation. It will get passed directly to
385 <function>request_irq</function> and thus has the same prototype as all
386 IRQ handlers. It will get called with a pointer to the DRM device as the
387 second argument.
388 </para>
389 <para>
390 Finally the function calls the optional
391 <methodname>irq_postinstall</methodname> driver operation. The operation
392 usually enables interrupts (excluding the vblank interrupt, which is
393 enabled separately), but drivers may choose to enable/disable interrupts
394 at a different time.
395 </para>
396 <para>
397 <function>drm_irq_uninstall</function> is similarly used to uninstall an
398 IRQ handler. It starts by waking up all processes waiting on a vblank
399 interrupt to make sure they don't hang, and then calls the optional
400 <methodname>irq_uninstall</methodname> driver operation. The operation
401 must disable all hardware interrupts. Finally the function frees the IRQ
402 by calling <function>free_irq</function>.
403 </para>
404 </sect4>
405 <sect4>
406 <title>Manual IRQ Registration</title>
407 <para>
408 Drivers that require multiple interrupt handlers can't use the managed
409 IRQ registration functions. In that case IRQs must be registered and
410 unregistered manually (usually with the <function>request_irq</function>
411 and <function>free_irq</function> functions, or their devm_* equivalent).
412 </para>
413 <para>
414 When manually registering IRQs, drivers must not set the DRIVER_HAVE_IRQ
415 driver feature flag, and must not provide the
416 <methodname>irq_handler</methodname> driver operation. They must set the
417 <structname>drm_device</structname> <structfield>irq_enabled</structfield>
418 field to 1 upon registration of the IRQs, and clear it to 0 after
419 unregistering the IRQs.
420 </para>
421 </sect4>
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422 </sect3>
423 <sect3>
424 <title>Memory Manager Initialization</title>
425 <para>
426 Every DRM driver requires a memory manager which must be initialized at
427 load time. DRM currently contains two memory managers, the Translation
428 Table Manager (TTM) and the Graphics Execution Manager (GEM).
429 This document describes the use of the GEM memory manager only. See
430 <xref linkend="drm-memory-management"/> for details.
431 </para>
432 </sect3>
433 <sect3>
434 <title>Miscellaneous Device Configuration</title>
435 <para>
436 Another task that may be necessary for PCI devices during configuration
437 is mapping the video BIOS. On many devices, the VBIOS describes device
438 configuration, LCD panel timings (if any), and contains flags indicating
439 device state. Mapping the BIOS can be done using the pci_map_rom() call,
440 a convenience function that takes care of mapping the actual ROM,
441 whether it has been shadowed into memory (typically at address 0xc0000)
442 or exists on the PCI device in the ROM BAR. Note that after the ROM has
443 been mapped and any necessary information has been extracted, it should
444 be unmapped; on many devices, the ROM address decoder is shared with
445 other BARs, so leaving it mapped could cause undesired behaviour like
446 hangs or memory corruption.
447 <!--!Fdrivers/pci/rom.c pci_map_rom-->
448 </para>
449 </sect3>
2d2ef822 450 </sect2>
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451 <sect2>
452 <title>Bus-specific Device Registration and PCI Support</title>
453 <para>
454 A number of functions are provided to help with device registration.
455 The functions deal with PCI and platform devices respectively and are
456 only provided for historical reasons. These are all deprecated and
457 shouldn't be used in new drivers. Besides that there's a few
458 helpers for pci drivers.
459 </para>
460!Edrivers/gpu/drm/drm_pci.c
461!Edrivers/gpu/drm/drm_platform.c
462 </sect2>
9cad9c95 463 </sect1>
2d2ef822 464
9cad9c95 465 <!-- Internals: memory management -->
2d2ef822 466
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467 <sect1 id="drm-memory-management">
468 <title>Memory management</title>
469 <para>
470 Modern Linux systems require large amount of graphics memory to store
471 frame buffers, textures, vertices and other graphics-related data. Given
472 the very dynamic nature of many of that data, managing graphics memory
473 efficiently is thus crucial for the graphics stack and plays a central
474 role in the DRM infrastructure.
475 </para>
476 <para>
477 The DRM core includes two memory managers, namely Translation Table Maps
478 (TTM) and Graphics Execution Manager (GEM). TTM was the first DRM memory
479 manager to be developed and tried to be a one-size-fits-them all
f884ab15 480 solution. It provides a single userspace API to accommodate the need of
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481 all hardware, supporting both Unified Memory Architecture (UMA) devices
482 and devices with dedicated video RAM (i.e. most discrete video cards).
483 This resulted in a large, complex piece of code that turned out to be
484 hard to use for driver development.
485 </para>
486 <para>
487 GEM started as an Intel-sponsored project in reaction to TTM's
488 complexity. Its design philosophy is completely different: instead of
489 providing a solution to every graphics memory-related problems, GEM
490 identified common code between drivers and created a support library to
491 share it. GEM has simpler initialization and execution requirements than
9a6594fc 492 TTM, but has no video RAM management capabilities and is thus limited to
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493 UMA devices.
494 </para>
2d2ef822 495 <sect2>
9cad9c95 496 <title>The Translation Table Manager (TTM)</title>
2d2ef822 497 <para>
79058100 498 TTM design background and information belongs here.
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499 </para>
500 <sect3>
79058100 501 <title>TTM initialization</title>
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502 <warning><para>This section is outdated.</para></warning>
503 <para>
504 Drivers wishing to support TTM must fill out a drm_bo_driver
505 structure. The structure contains several fields with function
506 pointers for initializing the TTM, allocating and freeing memory,
507 waiting for command completion and fence synchronization, and memory
508 migration. See the radeon_ttm.c file for an example of usage.
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509 </para>
510 <para>
511 The ttm_global_reference structure is made up of several fields:
512 </para>
513 <programlisting>
514 struct ttm_global_reference {
515 enum ttm_global_types global_type;
516 size_t size;
517 void *object;
518 int (*init) (struct ttm_global_reference *);
519 void (*release) (struct ttm_global_reference *);
520 };
521 </programlisting>
522 <para>
523 There should be one global reference structure for your memory
524 manager as a whole, and there will be others for each object
525 created by the memory manager at runtime. Your global TTM should
526 have a type of TTM_GLOBAL_TTM_MEM. The size field for the global
527 object should be sizeof(struct ttm_mem_global), and the init and
528 release hooks should point at your driver-specific init and
529 release routines, which probably eventually call
530 ttm_mem_global_init and ttm_mem_global_release, respectively.
531 </para>
532 <para>
533 Once your global TTM accounting structure is set up and initialized
534 by calling ttm_global_item_ref() on it,
535 you need to create a buffer object TTM to
536 provide a pool for buffer object allocation by clients and the
537 kernel itself. The type of this object should be TTM_GLOBAL_TTM_BO,
538 and its size should be sizeof(struct ttm_bo_global). Again,
539 driver-specific init and release functions may be provided,
540 likely eventually calling ttm_bo_global_init() and
541 ttm_bo_global_release(), respectively. Also, like the previous
542 object, ttm_global_item_ref() is used to create an initial reference
543 count for the TTM, which will call your initialization function.
544 </para>
2d2ef822 545 </sect3>
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546 </sect2>
547 <sect2 id="drm-gem">
548 <title>The Graphics Execution Manager (GEM)</title>
549 <para>
550 The GEM design approach has resulted in a memory manager that doesn't
551 provide full coverage of all (or even all common) use cases in its
552 userspace or kernel API. GEM exposes a set of standard memory-related
553 operations to userspace and a set of helper functions to drivers, and let
554 drivers implement hardware-specific operations with their own private API.
555 </para>
556 <para>
557 The GEM userspace API is described in the
558 <ulink url="http://lwn.net/Articles/283798/"><citetitle>GEM - the Graphics
559 Execution Manager</citetitle></ulink> article on LWN. While slightly
560 outdated, the document provides a good overview of the GEM API principles.
561 Buffer allocation and read and write operations, described as part of the
562 common GEM API, are currently implemented using driver-specific ioctls.
563 </para>
564 <para>
565 GEM is data-agnostic. It manages abstract buffer objects without knowing
566 what individual buffers contain. APIs that require knowledge of buffer
567 contents or purpose, such as buffer allocation or synchronization
568 primitives, are thus outside of the scope of GEM and must be implemented
569 using driver-specific ioctls.
570 </para>
571 <para>
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572 On a fundamental level, GEM involves several operations:
573 <itemizedlist>
574 <listitem>Memory allocation and freeing</listitem>
575 <listitem>Command execution</listitem>
576 <listitem>Aperture management at command execution time</listitem>
577 </itemizedlist>
578 Buffer object allocation is relatively straightforward and largely
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579 provided by Linux's shmem layer, which provides memory to back each
580 object.
581 </para>
582 <para>
583 Device-specific operations, such as command execution, pinning, buffer
79058100 584 read &amp; write, mapping, and domain ownership transfers are left to
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585 driver-specific ioctls.
586 </para>
587 <sect3>
588 <title>GEM Initialization</title>
589 <para>
590 Drivers that use GEM must set the DRIVER_GEM bit in the struct
591 <structname>drm_driver</structname>
592 <structfield>driver_features</structfield> field. The DRM core will
593 then automatically initialize the GEM core before calling the
594 <methodname>load</methodname> operation. Behind the scene, this will
595 create a DRM Memory Manager object which provides an address space
596 pool for object allocation.
597 </para>
598 <para>
599 In a KMS configuration, drivers need to allocate and initialize a
600 command ring buffer following core GEM initialization if required by
601 the hardware. UMA devices usually have what is called a "stolen"
602 memory region, which provides space for the initial framebuffer and
603 large, contiguous memory regions required by the device. This space is
604 typically not managed by GEM, and must be initialized separately into
605 its own DRM MM object.
606 </para>
607 </sect3>
2d2ef822 608 <sect3>
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609 <title>GEM Objects Creation</title>
610 <para>
611 GEM splits creation of GEM objects and allocation of the memory that
612 backs them in two distinct operations.
613 </para>
614 <para>
615 GEM objects are represented by an instance of struct
616 <structname>drm_gem_object</structname>. Drivers usually need to extend
617 GEM objects with private information and thus create a driver-specific
618 GEM object structure type that embeds an instance of struct
619 <structname>drm_gem_object</structname>.
620 </para>
621 <para>
622 To create a GEM object, a driver allocates memory for an instance of its
623 specific GEM object type and initializes the embedded struct
624 <structname>drm_gem_object</structname> with a call to
625 <function>drm_gem_object_init</function>. The function takes a pointer to
626 the DRM device, a pointer to the GEM object and the buffer object size
627 in bytes.
628 </para>
629 <para>
630 GEM uses shmem to allocate anonymous pageable memory.
631 <function>drm_gem_object_init</function> will create an shmfs file of
632 the requested size and store it into the struct
633 <structname>drm_gem_object</structname> <structfield>filp</structfield>
634 field. The memory is used as either main storage for the object when the
635 graphics hardware uses system memory directly or as a backing store
636 otherwise.
637 </para>
638 <para>
639 Drivers are responsible for the actual physical pages allocation by
640 calling <function>shmem_read_mapping_page_gfp</function> for each page.
641 Note that they can decide to allocate pages when initializing the GEM
642 object, or to delay allocation until the memory is needed (for instance
643 when a page fault occurs as a result of a userspace memory access or
644 when the driver needs to start a DMA transfer involving the memory).
645 </para>
646 <para>
647 Anonymous pageable memory allocation is not always desired, for instance
648 when the hardware requires physically contiguous system memory as is
649 often the case in embedded devices. Drivers can create GEM objects with
650 no shmfs backing (called private GEM objects) by initializing them with
651 a call to <function>drm_gem_private_object_init</function> instead of
652 <function>drm_gem_object_init</function>. Storage for private GEM
653 objects must be managed by drivers.
654 </para>
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655 </sect3>
656 <sect3>
657 <title>GEM Objects Lifetime</title>
658 <para>
659 All GEM objects are reference-counted by the GEM core. References can be
660 acquired and release by <function>calling drm_gem_object_reference</function>
661 and <function>drm_gem_object_unreference</function> respectively. The
662 caller must hold the <structname>drm_device</structname>
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663 <structfield>struct_mutex</structfield> lock when calling
664 <function>drm_gem_object_reference</function>. As a convenience, GEM
665 provides <function>drm_gem_object_unreference_unlocked</function>
666 functions that can be called without holding the lock.
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667 </para>
668 <para>
669 When the last reference to a GEM object is released the GEM core calls
670 the <structname>drm_driver</structname>
671 <methodname>gem_free_object</methodname> operation. That operation is
672 mandatory for GEM-enabled drivers and must free the GEM object and all
673 associated resources.
674 </para>
675 <para>
676 <synopsis>void (*gem_free_object) (struct drm_gem_object *obj);</synopsis>
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677 Drivers are responsible for freeing all GEM object resources. This includes
678 the resources created by the GEM core, which need to be released with
679 <function>drm_gem_object_release</function>.
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680 </para>
681 </sect3>
682 <sect3>
683 <title>GEM Objects Naming</title>
684 <para>
685 Communication between userspace and the kernel refers to GEM objects
686 using local handles, global names or, more recently, file descriptors.
687 All of those are 32-bit integer values; the usual Linux kernel limits
688 apply to the file descriptors.
689 </para>
690 <para>
691 GEM handles are local to a DRM file. Applications get a handle to a GEM
692 object through a driver-specific ioctl, and can use that handle to refer
693 to the GEM object in other standard or driver-specific ioctls. Closing a
694 DRM file handle frees all its GEM handles and dereferences the
695 associated GEM objects.
696 </para>
697 <para>
698 To create a handle for a GEM object drivers call
699 <function>drm_gem_handle_create</function>. The function takes a pointer
700 to the DRM file and the GEM object and returns a locally unique handle.
701 When the handle is no longer needed drivers delete it with a call to
702 <function>drm_gem_handle_delete</function>. Finally the GEM object
703 associated with a handle can be retrieved by a call to
704 <function>drm_gem_object_lookup</function>.
705 </para>
706 <para>
707 Handles don't take ownership of GEM objects, they only take a reference
708 to the object that will be dropped when the handle is destroyed. To
709 avoid leaking GEM objects, drivers must make sure they drop the
710 reference(s) they own (such as the initial reference taken at object
711 creation time) as appropriate, without any special consideration for the
712 handle. For example, in the particular case of combined GEM object and
713 handle creation in the implementation of the
714 <methodname>dumb_create</methodname> operation, drivers must drop the
715 initial reference to the GEM object before returning the handle.
716 </para>
717 <para>
718 GEM names are similar in purpose to handles but are not local to DRM
719 files. They can be passed between processes to reference a GEM object
720 globally. Names can't be used directly to refer to objects in the DRM
721 API, applications must convert handles to names and names to handles
722 using the DRM_IOCTL_GEM_FLINK and DRM_IOCTL_GEM_OPEN ioctls
723 respectively. The conversion is handled by the DRM core without any
724 driver-specific support.
725 </para>
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726 <para>
727 GEM also supports buffer sharing with dma-buf file descriptors through
728 PRIME. GEM-based drivers must use the provided helpers functions to
729 implement the exporting and importing correctly. See <xref linkend="drm-prime-support" />.
730 Since sharing file descriptors is inherently more secure than the
731 easily guessable and global GEM names it is the preferred buffer
732 sharing mechanism. Sharing buffers through GEM names is only supported
733 for legacy userspace. Furthermore PRIME also allows cross-device
734 buffer sharing since it is based on dma-bufs.
735 </para>
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736 </sect3>
737 <sect3 id="drm-gem-objects-mapping">
738 <title>GEM Objects Mapping</title>
739 <para>
740 Because mapping operations are fairly heavyweight GEM favours
741 read/write-like access to buffers, implemented through driver-specific
742 ioctls, over mapping buffers to userspace. However, when random access
743 to the buffer is needed (to perform software rendering for instance),
744 direct access to the object can be more efficient.
745 </para>
746 <para>
747 The mmap system call can't be used directly to map GEM objects, as they
748 don't have their own file handle. Two alternative methods currently
749 co-exist to map GEM objects to userspace. The first method uses a
750 driver-specific ioctl to perform the mapping operation, calling
751 <function>do_mmap</function> under the hood. This is often considered
752 dubious, seems to be discouraged for new GEM-enabled drivers, and will
753 thus not be described here.
754 </para>
755 <para>
756 The second method uses the mmap system call on the DRM file handle.
757 <synopsis>void *mmap(void *addr, size_t length, int prot, int flags, int fd,
758 off_t offset);</synopsis>
759 DRM identifies the GEM object to be mapped by a fake offset passed
760 through the mmap offset argument. Prior to being mapped, a GEM object
761 must thus be associated with a fake offset. To do so, drivers must call
df2e0900 762 <function>drm_gem_create_mmap_offset</function> on the object.
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763 </para>
764 <para>
765 Once allocated, the fake offset value
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766 must be passed to the application in a driver-specific way and can then
767 be used as the mmap offset argument.
768 </para>
769 <para>
770 The GEM core provides a helper method <function>drm_gem_mmap</function>
771 to handle object mapping. The method can be set directly as the mmap
772 file operation handler. It will look up the GEM object based on the
773 offset value and set the VMA operations to the
774 <structname>drm_driver</structname> <structfield>gem_vm_ops</structfield>
775 field. Note that <function>drm_gem_mmap</function> doesn't map memory to
776 userspace, but relies on the driver-provided fault handler to map pages
777 individually.
778 </para>
779 <para>
780 To use <function>drm_gem_mmap</function>, drivers must fill the struct
781 <structname>drm_driver</structname> <structfield>gem_vm_ops</structfield>
782 field with a pointer to VM operations.
783 </para>
784 <para>
785 <synopsis>struct vm_operations_struct *gem_vm_ops
786
787 struct vm_operations_struct {
788 void (*open)(struct vm_area_struct * area);
789 void (*close)(struct vm_area_struct * area);
790 int (*fault)(struct vm_area_struct *vma, struct vm_fault *vmf);
791 };</synopsis>
792 </para>
793 <para>
794 The <methodname>open</methodname> and <methodname>close</methodname>
795 operations must update the GEM object reference count. Drivers can use
796 the <function>drm_gem_vm_open</function> and
797 <function>drm_gem_vm_close</function> helper functions directly as open
798 and close handlers.
799 </para>
800 <para>
801 The fault operation handler is responsible for mapping individual pages
802 to userspace when a page fault occurs. Depending on the memory
803 allocation scheme, drivers can allocate pages at fault time, or can
804 decide to allocate memory for the GEM object at the time the object is
805 created.
806 </para>
807 <para>
808 Drivers that want to map the GEM object upfront instead of handling page
809 faults can implement their own mmap file operation handler.
810 </para>
811 </sect3>
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812 <sect3>
813 <title>Memory Coherency</title>
814 <para>
815 When mapped to the device or used in a command buffer, backing pages
816 for an object are flushed to memory and marked write combined so as to
817 be coherent with the GPU. Likewise, if the CPU accesses an object
818 after the GPU has finished rendering to the object, then the object
819 must be made coherent with the CPU's view of memory, usually involving
820 GPU cache flushing of various kinds. This core CPU&lt;-&gt;GPU
821 coherency management is provided by a device-specific ioctl, which
822 evaluates an object's current domain and performs any necessary
823 flushing or synchronization to put the object into the desired
824 coherency domain (note that the object may be busy, i.e. an active
825 render target; in that case, setting the domain blocks the client and
826 waits for rendering to complete before performing any necessary
827 flushing operations).
828 </para>
829 </sect3>
830 <sect3>
831 <title>Command Execution</title>
832 <para>
79058100 833 Perhaps the most important GEM function for GPU devices is providing a
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834 command execution interface to clients. Client programs construct
835 command buffers containing references to previously allocated memory
836 objects, and then submit them to GEM. At that point, GEM takes care to
837 bind all the objects into the GTT, execute the buffer, and provide
838 necessary synchronization between clients accessing the same buffers.
839 This often involves evicting some objects from the GTT and re-binding
840 others (a fairly expensive operation), and providing relocation
841 support which hides fixed GTT offsets from clients. Clients must take
842 care not to submit command buffers that reference more objects than
843 can fit in the GTT; otherwise, GEM will reject them and no rendering
844 will occur. Similarly, if several objects in the buffer require fence
845 registers to be allocated for correct rendering (e.g. 2D blits on
846 pre-965 chips), care must be taken not to require more fence registers
847 than are available to the client. Such resource management should be
848 abstracted from the client in libdrm.
849 </para>
2d2ef822 850 </sect3>
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851 </sect2>
852 <sect2>
853 <title>GEM Function Reference</title>
89d61fc0 854!Edrivers/gpu/drm/drm_gem.c
decc60bf 855!Iinclude/drm/drm_gem.h
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856 </sect2>
857 <sect2>
858 <title>VMA Offset Manager</title>
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859!Pdrivers/gpu/drm/drm_vma_manager.c vma offset manager
860!Edrivers/gpu/drm/drm_vma_manager.c
861!Iinclude/drm/drm_vma_manager.h
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862 </sect2>
863 <sect2 id="drm-prime-support">
864 <title>PRIME Buffer Sharing</title>
865 <para>
866 PRIME is the cross device buffer sharing framework in drm, originally
867 created for the OPTIMUS range of multi-gpu platforms. To userspace
868 PRIME buffers are dma-buf based file descriptors.
869 </para>
870 <sect3>
871 <title>Overview and Driver Interface</title>
872 <para>
873 Similar to GEM global names, PRIME file descriptors are
874 also used to share buffer objects across processes. They offer
875 additional security: as file descriptors must be explicitly sent over
876 UNIX domain sockets to be shared between applications, they can't be
877 guessed like the globally unique GEM names.
878 </para>
879 <para>
880 Drivers that support the PRIME
881 API must set the DRIVER_PRIME bit in the struct
882 <structname>drm_driver</structname>
883 <structfield>driver_features</structfield> field, and implement the
884 <methodname>prime_handle_to_fd</methodname> and
885 <methodname>prime_fd_to_handle</methodname> operations.
886 </para>
887 <para>
888 <synopsis>int (*prime_handle_to_fd)(struct drm_device *dev,
889 struct drm_file *file_priv, uint32_t handle,
890 uint32_t flags, int *prime_fd);
251261db 891int (*prime_fd_to_handle)(struct drm_device *dev,
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892 struct drm_file *file_priv, int prime_fd,
893 uint32_t *handle);</synopsis>
894 Those two operations convert a handle to a PRIME file descriptor and
895 vice versa. Drivers must use the kernel dma-buf buffer sharing framework
896 to manage the PRIME file descriptors. Similar to the mode setting
897 API PRIME is agnostic to the underlying buffer object manager, as
898 long as handles are 32bit unsigned integers.
899 </para>
900 <para>
901 While non-GEM drivers must implement the operations themselves, GEM
902 drivers must use the <function>drm_gem_prime_handle_to_fd</function>
903 and <function>drm_gem_prime_fd_to_handle</function> helper functions.
904 Those helpers rely on the driver
905 <methodname>gem_prime_export</methodname> and
906 <methodname>gem_prime_import</methodname> operations to create a dma-buf
907 instance from a GEM object (dma-buf exporter role) and to create a GEM
908 object from a dma-buf instance (dma-buf importer role).
909 </para>
910 <para>
911 <synopsis>struct dma_buf * (*gem_prime_export)(struct drm_device *dev,
912 struct drm_gem_object *obj,
913 int flags);
251261db 914struct drm_gem_object * (*gem_prime_import)(struct drm_device *dev,
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915 struct dma_buf *dma_buf);</synopsis>
916 These two operations are mandatory for GEM drivers that support
917 PRIME.
918 </para>
251261db 919 </sect3>
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920 <sect3>
921 <title>PRIME Helper Functions</title>
922!Pdrivers/gpu/drm/drm_prime.c PRIME Helpers
923 </sect3>
924 </sect2>
925 <sect2>
926 <title>PRIME Function References</title>
39cc344a 927!Edrivers/gpu/drm/drm_prime.c
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928 </sect2>
929 <sect2>
930 <title>DRM MM Range Allocator</title>
931 <sect3>
932 <title>Overview</title>
93110be6 933!Pdrivers/gpu/drm/drm_mm.c Overview
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934 </sect3>
935 <sect3>
936 <title>LRU Scan/Eviction Support</title>
93110be6 937!Pdrivers/gpu/drm/drm_mm.c lru scan roaster
79058100 938 </sect3>
93110be6 939 </sect2>
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940 <sect2>
941 <title>DRM MM Range Allocator Function References</title>
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942!Edrivers/gpu/drm/drm_mm.c
943!Iinclude/drm/drm_mm.h
79058100 944 </sect2>
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945 <sect2>
946 <title>CMA Helper Functions Reference</title>
947!Pdrivers/gpu/drm/drm_gem_cma_helper.c cma helpers
948!Edrivers/gpu/drm/drm_gem_cma_helper.c
949!Iinclude/drm/drm_gem_cma_helper.h
950 </sect2>
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951 </sect1>
952
953 <!-- Internals: mode setting -->
2d2ef822 954
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955 <sect1 id="drm-mode-setting">
956 <title>Mode Setting</title>
957 <para>
958 Drivers must initialize the mode setting core by calling
959 <function>drm_mode_config_init</function> on the DRM device. The function
960 initializes the <structname>drm_device</structname>
961 <structfield>mode_config</structfield> field and never fails. Once done,
962 mode configuration must be setup by initializing the following fields.
963 </para>
964 <itemizedlist>
965 <listitem>
966 <synopsis>int min_width, min_height;
967int max_width, max_height;</synopsis>
968 <para>
969 Minimum and maximum width and height of the frame buffers in pixel
970 units.
971 </para>
972 </listitem>
973 <listitem>
974 <synopsis>struct drm_mode_config_funcs *funcs;</synopsis>
975 <para>Mode setting functions.</para>
976 </listitem>
977 </itemizedlist>
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978 <sect2>
979 <title>Display Modes Function Reference</title>
f5aabb97 980!Iinclude/drm/drm_modes.h
3ec0db81 981!Edrivers/gpu/drm/drm_modes.c
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982 </sect2>
983 <sect2>
984 <title>Atomic Mode Setting Function Reference</title>
985!Edrivers/gpu/drm/drm_atomic.c
c0714fc9 986!Idrivers/gpu/drm/drm_atomic.c
3ec0db81 987 </sect2>
2d2ef822 988 <sect2>
d55f5320 989 <title>Frame Buffer Abstraction</title>
2d2ef822 990 <para>
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991 Frame buffers are abstract memory objects that provide a source of
992 pixels to scanout to a CRTC. Applications explicitly request the
993 creation of frame buffers through the DRM_IOCTL_MODE_ADDFB(2) ioctls and
994 receive an opaque handle that can be passed to the KMS CRTC control,
995 plane configuration and page flip functions.
996 </para>
997 <para>
998 Frame buffers rely on the underneath memory manager for low-level memory
999 operations. When creating a frame buffer applications pass a memory
1000 handle (or a list of memory handles for multi-planar formats) through
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1001 the <parameter>drm_mode_fb_cmd2</parameter> argument. For drivers using
1002 GEM as their userspace buffer management interface this would be a GEM
1003 handle. Drivers are however free to use their own backing storage object
1004 handles, e.g. vmwgfx directly exposes special TTM handles to userspace
1005 and so expects TTM handles in the create ioctl and not GEM handles.
9cad9c95 1006 </para>
9cad9c95 1007 <para>
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1008 The lifetime of a drm framebuffer is controlled with a reference count,
1009 drivers can grab additional references with
9ee984a5 1010 <function>drm_framebuffer_reference</function>and drop them
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1011 again with <function>drm_framebuffer_unreference</function>. For
1012 driver-private framebuffers for which the last reference is never
1013 dropped (e.g. for the fbdev framebuffer when the struct
1014 <structname>drm_framebuffer</structname> is embedded into the fbdev
1015 helper struct) drivers can manually clean up a framebuffer at module
1016 unload time with
1017 <function>drm_framebuffer_unregister_private</function>.
9ee984a5 1018 </para>
9cad9c95 1019 </sect2>
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1020 <sect2>
1021 <title>Dumb Buffer Objects</title>
1022 <para>
1023 The KMS API doesn't standardize backing storage object creation and
1024 leaves it to driver-specific ioctls. Furthermore actually creating a
1025 buffer object even for GEM-based drivers is done through a
1026 driver-specific ioctl - GEM only has a common userspace interface for
1027 sharing and destroying objects. While not an issue for full-fledged
1028 graphics stacks that include device-specific userspace components (in
1029 libdrm for instance), this limit makes DRM-based early boot graphics
1030 unnecessarily complex.
1031 </para>
1032 <para>
1033 Dumb objects partly alleviate the problem by providing a standard
1034 API to create dumb buffers suitable for scanout, which can then be used
1035 to create KMS frame buffers.
1036 </para>
1037 <para>
1038 To support dumb objects drivers must implement the
1039 <methodname>dumb_create</methodname>,
1040 <methodname>dumb_destroy</methodname> and
1041 <methodname>dumb_map_offset</methodname> operations.
1042 </para>
1043 <itemizedlist>
1044 <listitem>
1045 <synopsis>int (*dumb_create)(struct drm_file *file_priv, struct drm_device *dev,
1046 struct drm_mode_create_dumb *args);</synopsis>
1047 <para>
1048 The <methodname>dumb_create</methodname> operation creates a driver
1049 object (GEM or TTM handle) suitable for scanout based on the
1050 width, height and depth from the struct
1051 <structname>drm_mode_create_dumb</structname> argument. It fills the
1052 argument's <structfield>handle</structfield>,
1053 <structfield>pitch</structfield> and <structfield>size</structfield>
1054 fields with a handle for the newly created object and its line
1055 pitch and size in bytes.
1056 </para>
1057 </listitem>
1058 <listitem>
1059 <synopsis>int (*dumb_destroy)(struct drm_file *file_priv, struct drm_device *dev,
1060 uint32_t handle);</synopsis>
1061 <para>
1062 The <methodname>dumb_destroy</methodname> operation destroys a dumb
1063 object created by <methodname>dumb_create</methodname>.
1064 </para>
1065 </listitem>
1066 <listitem>
1067 <synopsis>int (*dumb_map_offset)(struct drm_file *file_priv, struct drm_device *dev,
1068 uint32_t handle, uint64_t *offset);</synopsis>
1069 <para>
1070 The <methodname>dumb_map_offset</methodname> operation associates an
1071 mmap fake offset with the object given by the handle and returns
1072 it. Drivers must use the
1073 <function>drm_gem_create_mmap_offset</function> function to
1074 associate the fake offset as described in
1075 <xref linkend="drm-gem-objects-mapping"/>.
1076 </para>
1077 </listitem>
1078 </itemizedlist>
1079 <para>
1080 Note that dumb objects may not be used for gpu acceleration, as has been
1081 attempted on some ARM embedded platforms. Such drivers really must have
1082 a hardware-specific ioctl to allocate suitable buffer objects.
1083 </para>
1084 </sect2>
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1085 <sect2>
1086 <title>Output Polling</title>
1087 <synopsis>void (*output_poll_changed)(struct drm_device *dev);</synopsis>
1088 <para>
1089 This operation notifies the driver that the status of one or more
1090 connectors has changed. Drivers that use the fb helper can just call the
1091 <function>drm_fb_helper_hotplug_event</function> function to handle this
1092 operation.
1093 </para>
1094 </sect2>
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1095 <sect2>
1096 <title>Locking</title>
1097 <para>
1098 Beside some lookup structures with their own locking (which is hidden
1099 behind the interface functions) most of the modeset state is protected
1100 by the <code>dev-&lt;mode_config.lock</code> mutex and additionally
1101 per-crtc locks to allow cursor updates, pageflips and similar operations
1102 to occur concurrently with background tasks like output detection.
1103 Operations which cross domains like a full modeset always grab all
1104 locks. Drivers there need to protect resources shared between crtcs with
1105 additional locking. They also need to be careful to always grab the
1106 relevant crtc locks if a modset functions touches crtc state, e.g. for
1107 load detection (which does only grab the <code>mode_config.lock</code>
1108 to allow concurrent screen updates on live crtcs).
1109 </para>
1110 </sect2>
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1111 </sect1>
1112
1113 <!-- Internals: kms initialization and cleanup -->
1114
1115 <sect1 id="drm-kms-init">
1116 <title>KMS Initialization and Cleanup</title>
1117 <para>
1118 A KMS device is abstracted and exposed as a set of planes, CRTCs, encoders
1119 and connectors. KMS drivers must thus create and initialize all those
1120 objects at load time after initializing mode setting.
1121 </para>
1122 <sect2>
1123 <title>CRTCs (struct <structname>drm_crtc</structname>)</title>
1124 <para>
1125 A CRTC is an abstraction representing a part of the chip that contains a
1126 pointer to a scanout buffer. Therefore, the number of CRTCs available
1127 determines how many independent scanout buffers can be active at any
1128 given time. The CRTC structure contains several fields to support this:
1129 a pointer to some video memory (abstracted as a frame buffer object), a
1130 display mode, and an (x, y) offset into the video memory to support
1131 panning or configurations where one piece of video memory spans multiple
1132 CRTCs.
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1133 </para>
1134 <sect3>
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1135 <title>CRTC Initialization</title>
1136 <para>
1137 A KMS device must create and register at least one struct
1138 <structname>drm_crtc</structname> instance. The instance is allocated
1139 and zeroed by the driver, possibly as part of a larger structure, and
1140 registered with a call to <function>drm_crtc_init</function> with a
1141 pointer to CRTC functions.
1142 </para>
1143 </sect3>
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1144 </sect2>
1145 <sect2>
1146 <title>Planes (struct <structname>drm_plane</structname>)</title>
1147 <para>
1148 A plane represents an image source that can be blended with or overlayed
1149 on top of a CRTC during the scanout process. Planes are associated with
1150 a frame buffer to crop a portion of the image memory (source) and
1151 optionally scale it to a destination size. The result is then blended
1152 with or overlayed on top of a CRTC.
1153 </para>
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1154 <para>
1155 The DRM core recognizes three types of planes:
1156 <itemizedlist>
1157 <listitem>
1158 DRM_PLANE_TYPE_PRIMARY represents a "main" plane for a CRTC. Primary
ef21bf73 1159 planes are the planes operated upon by CRTC modesetting and flipping
f6da8c6e 1160 operations described in the page_flip hook in <structname>drm_crtc_funcs</structname>.
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1161 </listitem>
1162 <listitem>
1163 DRM_PLANE_TYPE_CURSOR represents a "cursor" plane for a CRTC. Cursor
1164 planes are the planes operated upon by the DRM_IOCTL_MODE_CURSOR and
1165 DRM_IOCTL_MODE_CURSOR2 ioctls.
1166 </listitem>
1167 <listitem>
1168 DRM_PLANE_TYPE_OVERLAY represents all non-primary, non-cursor planes.
1169 Some drivers refer to these types of planes as "sprites" internally.
1170 </listitem>
1171 </itemizedlist>
1172 For compatibility with legacy userspace, only overlay planes are made
1173 available to userspace by default. Userspace clients may set the
1174 DRM_CLIENT_CAP_UNIVERSAL_PLANES client capability bit to indicate that
1175 they wish to receive a universal plane list containing all plane types.
1176 </para>
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1177 <sect3>
1178 <title>Plane Initialization</title>
1179 <para>
6efa1f2f 1180 To create a plane, a KMS drivers allocates and
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1181 zeroes an instances of struct <structname>drm_plane</structname>
1182 (possibly as part of a larger structure) and registers it with a call
6efa1f2f 1183 to <function>drm_universal_plane_init</function>. The function takes a bitmask
9cad9c95 1184 of the CRTCs that can be associated with the plane, a pointer to the
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1185 plane functions, a list of format supported formats, and the type of
1186 plane (primary, cursor, or overlay) being initialized.
1187 </para>
1188 <para>
1189 Cursor and overlay planes are optional. All drivers should provide
1190 one primary plane per CRTC (although this requirement may change in
1191 the future); drivers that do not wish to provide special handling for
1192 primary planes may make use of the helper functions described in
1193 <xref linkend="drm-kms-planehelpers"/> to create and register a
1194 primary plane with standard capabilities.
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1195 </para>
1196 </sect3>
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1197 </sect2>
1198 <sect2>
1199 <title>Encoders (struct <structname>drm_encoder</structname>)</title>
1200 <para>
1201 An encoder takes pixel data from a CRTC and converts it to a format
1202 suitable for any attached connectors. On some devices, it may be
1203 possible to have a CRTC send data to more than one encoder. In that
1204 case, both encoders would receive data from the same scanout buffer,
1205 resulting in a "cloned" display configuration across the connectors
1206 attached to each encoder.
1207 </para>
1208 <sect3>
1209 <title>Encoder Initialization</title>
1210 <para>
1211 As for CRTCs, a KMS driver must create, initialize and register at
1212 least one struct <structname>drm_encoder</structname> instance. The
1213 instance is allocated and zeroed by the driver, possibly as part of a
1214 larger structure.
1215 </para>
1216 <para>
1217 Drivers must initialize the struct <structname>drm_encoder</structname>
1218 <structfield>possible_crtcs</structfield> and
1219 <structfield>possible_clones</structfield> fields before registering the
1220 encoder. Both fields are bitmasks of respectively the CRTCs that the
1221 encoder can be connected to, and sibling encoders candidate for cloning.
1222 </para>
1223 <para>
1224 After being initialized, the encoder must be registered with a call to
1225 <function>drm_encoder_init</function>. The function takes a pointer to
1226 the encoder functions and an encoder type. Supported types are
1227 <itemizedlist>
1228 <listitem>
1229 DRM_MODE_ENCODER_DAC for VGA and analog on DVI-I/DVI-A
1230 </listitem>
1231 <listitem>
1232 DRM_MODE_ENCODER_TMDS for DVI, HDMI and (embedded) DisplayPort
1233 </listitem>
1234 <listitem>
1235 DRM_MODE_ENCODER_LVDS for display panels
1236 </listitem>
1237 <listitem>
1238 DRM_MODE_ENCODER_TVDAC for TV output (Composite, S-Video, Component,
1239 SCART)
1240 </listitem>
1241 <listitem>
1242 DRM_MODE_ENCODER_VIRTUAL for virtual machine displays
1243 </listitem>
1244 </itemizedlist>
1245 </para>
1246 <para>
1247 Encoders must be attached to a CRTC to be used. DRM drivers leave
1248 encoders unattached at initialization time. Applications (or the fbdev
1249 compatibility layer when implemented) are responsible for attaching the
1250 encoders they want to use to a CRTC.
1251 </para>
1252 </sect3>
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1253 </sect2>
1254 <sect2>
1255 <title>Connectors (struct <structname>drm_connector</structname>)</title>
1256 <para>
1257 A connector is the final destination for pixel data on a device, and
1258 usually connects directly to an external display device like a monitor
1259 or laptop panel. A connector can only be attached to one encoder at a
1260 time. The connector is also the structure where information about the
1261 attached display is kept, so it contains fields for display data, EDID
1262 data, DPMS &amp; connection status, and information about modes
1263 supported on the attached displays.
1264 </para>
1265 <sect3>
1266 <title>Connector Initialization</title>
1267 <para>
1268 Finally a KMS driver must create, initialize, register and attach at
1269 least one struct <structname>drm_connector</structname> instance. The
1270 instance is created as other KMS objects and initialized by setting the
1271 following fields.
1272 </para>
1273 <variablelist>
1274 <varlistentry>
1275 <term><structfield>interlace_allowed</structfield></term>
1276 <listitem><para>
1277 Whether the connector can handle interlaced modes.
1278 </para></listitem>
1279 </varlistentry>
1280 <varlistentry>
1281 <term><structfield>doublescan_allowed</structfield></term>
1282 <listitem><para>
1283 Whether the connector can handle doublescan.
1284 </para></listitem>
1285 </varlistentry>
1286 <varlistentry>
1287 <term><structfield>display_info
1288 </structfield></term>
1289 <listitem><para>
1290 Display information is filled from EDID information when a display
1291 is detected. For non hot-pluggable displays such as flat panels in
1292 embedded systems, the driver should initialize the
1293 <structfield>display_info</structfield>.<structfield>width_mm</structfield>
1294 and
1295 <structfield>display_info</structfield>.<structfield>height_mm</structfield>
1296 fields with the physical size of the display.
1297 </para></listitem>
1298 </varlistentry>
1299 <varlistentry>
1300 <term id="drm-kms-connector-polled"><structfield>polled</structfield></term>
1301 <listitem><para>
1302 Connector polling mode, a combination of
1303 <variablelist>
1304 <varlistentry>
1305 <term>DRM_CONNECTOR_POLL_HPD</term>
1306 <listitem><para>
1307 The connector generates hotplug events and doesn't need to be
1308 periodically polled. The CONNECT and DISCONNECT flags must not
1309 be set together with the HPD flag.
1310 </para></listitem>
1311 </varlistentry>
1312 <varlistentry>
1313 <term>DRM_CONNECTOR_POLL_CONNECT</term>
1314 <listitem><para>
1315 Periodically poll the connector for connection.
1316 </para></listitem>
1317 </varlistentry>
1318 <varlistentry>
1319 <term>DRM_CONNECTOR_POLL_DISCONNECT</term>
1320 <listitem><para>
1321 Periodically poll the connector for disconnection.
1322 </para></listitem>
1323 </varlistentry>
1324 </variablelist>
1325 Set to 0 for connectors that don't support connection status
1326 discovery.
1327 </para></listitem>
1328 </varlistentry>
1329 </variablelist>
1330 <para>
1331 The connector is then registered with a call to
1332 <function>drm_connector_init</function> with a pointer to the connector
1333 functions and a connector type, and exposed through sysfs with a call to
34ea3d38 1334 <function>drm_connector_register</function>.
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1335 </para>
1336 <para>
1337 Supported connector types are
1338 <itemizedlist>
1339 <listitem>DRM_MODE_CONNECTOR_VGA</listitem>
1340 <listitem>DRM_MODE_CONNECTOR_DVII</listitem>
1341 <listitem>DRM_MODE_CONNECTOR_DVID</listitem>
1342 <listitem>DRM_MODE_CONNECTOR_DVIA</listitem>
1343 <listitem>DRM_MODE_CONNECTOR_Composite</listitem>
1344 <listitem>DRM_MODE_CONNECTOR_SVIDEO</listitem>
1345 <listitem>DRM_MODE_CONNECTOR_LVDS</listitem>
1346 <listitem>DRM_MODE_CONNECTOR_Component</listitem>
1347 <listitem>DRM_MODE_CONNECTOR_9PinDIN</listitem>
1348 <listitem>DRM_MODE_CONNECTOR_DisplayPort</listitem>
1349 <listitem>DRM_MODE_CONNECTOR_HDMIA</listitem>
1350 <listitem>DRM_MODE_CONNECTOR_HDMIB</listitem>
1351 <listitem>DRM_MODE_CONNECTOR_TV</listitem>
1352 <listitem>DRM_MODE_CONNECTOR_eDP</listitem>
1353 <listitem>DRM_MODE_CONNECTOR_VIRTUAL</listitem>
1354 </itemizedlist>
1355 </para>
1356 <para>
1357 Connectors must be attached to an encoder to be used. For devices that
1358 map connectors to encoders 1:1, the connector should be attached at
1359 initialization time with a call to
1360 <function>drm_mode_connector_attach_encoder</function>. The driver must
1361 also set the <structname>drm_connector</structname>
1362 <structfield>encoder</structfield> field to point to the attached
1363 encoder.
1364 </para>
1365 <para>
1366 Finally, drivers must initialize the connectors state change detection
1367 with a call to <function>drm_kms_helper_poll_init</function>. If at
1368 least one connector is pollable but can't generate hotplug interrupts
1369 (indicated by the DRM_CONNECTOR_POLL_CONNECT and
1370 DRM_CONNECTOR_POLL_DISCONNECT connector flags), a delayed work will
1371 automatically be queued to periodically poll for changes. Connectors
1372 that can generate hotplug interrupts must be marked with the
1373 DRM_CONNECTOR_POLL_HPD flag instead, and their interrupt handler must
1374 call <function>drm_helper_hpd_irq_event</function>. The function will
1375 queue a delayed work to check the state of all connectors, but no
1376 periodic polling will be done.
1377 </para>
1378 </sect3>
1379 <sect3>
1380 <title>Connector Operations</title>
1381 <note><para>
1382 Unless otherwise state, all operations are mandatory.
1383 </para></note>
1384 <sect4>
1385 <title>DPMS</title>
1386 <synopsis>void (*dpms)(struct drm_connector *connector, int mode);</synopsis>
1387 <para>
1388 The DPMS operation sets the power state of a connector. The mode
1389 argument is one of
1390 <itemizedlist>
1391 <listitem><para>DRM_MODE_DPMS_ON</para></listitem>
1392 <listitem><para>DRM_MODE_DPMS_STANDBY</para></listitem>
1393 <listitem><para>DRM_MODE_DPMS_SUSPEND</para></listitem>
1394 <listitem><para>DRM_MODE_DPMS_OFF</para></listitem>
1395 </itemizedlist>
1396 </para>
1397 <para>
1398 In all but DPMS_ON mode the encoder to which the connector is attached
1399 should put the display in low-power mode by driving its signals
1400 appropriately. If more than one connector is attached to the encoder
1401 care should be taken not to change the power state of other displays as
1402 a side effect. Low-power mode should be propagated to the encoders and
1403 CRTCs when all related connectors are put in low-power mode.
1404 </para>
1405 </sect4>
1406 <sect4>
1407 <title>Modes</title>
1408 <synopsis>int (*fill_modes)(struct drm_connector *connector, uint32_t max_width,
1409 uint32_t max_height);</synopsis>
1410 <para>
1411 Fill the mode list with all supported modes for the connector. If the
1412 <parameter>max_width</parameter> and <parameter>max_height</parameter>
1413 arguments are non-zero, the implementation must ignore all modes wider
1414 than <parameter>max_width</parameter> or higher than
1415 <parameter>max_height</parameter>.
1416 </para>
1417 <para>
1418 The connector must also fill in this operation its
1419 <structfield>display_info</structfield>
1420 <structfield>width_mm</structfield> and
1421 <structfield>height_mm</structfield> fields with the connected display
1422 physical size in millimeters. The fields should be set to 0 if the value
1423 isn't known or is not applicable (for instance for projector devices).
1424 </para>
1425 </sect4>
1426 <sect4>
1427 <title>Connection Status</title>
1428 <para>
1429 The connection status is updated through polling or hotplug events when
1430 supported (see <xref linkend="drm-kms-connector-polled"/>). The status
1431 value is reported to userspace through ioctls and must not be used
1432 inside the driver, as it only gets initialized by a call to
1433 <function>drm_mode_getconnector</function> from userspace.
1434 </para>
1435 <synopsis>enum drm_connector_status (*detect)(struct drm_connector *connector,
1436 bool force);</synopsis>
1437 <para>
1438 Check to see if anything is attached to the connector. The
1439 <parameter>force</parameter> parameter is set to false whilst polling or
1440 to true when checking the connector due to user request.
1441 <parameter>force</parameter> can be used by the driver to avoid
1442 expensive, destructive operations during automated probing.
1443 </para>
1444 <para>
1445 Return connector_status_connected if something is connected to the
1446 connector, connector_status_disconnected if nothing is connected and
1447 connector_status_unknown if the connection state isn't known.
1448 </para>
1449 <para>
1450 Drivers should only return connector_status_connected if the connection
1451 status has really been probed as connected. Connectors that can't detect
1452 the connection status, or failed connection status probes, should return
1453 connector_status_unknown.
1454 </para>
1455 </sect4>
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1456 </sect3>
1457 </sect2>
1458 <sect2>
1459 <title>Cleanup</title>
1460 <para>
1461 The DRM core manages its objects' lifetime. When an object is not needed
1462 anymore the core calls its destroy function, which must clean up and
1463 free every resource allocated for the object. Every
1464 <function>drm_*_init</function> call must be matched with a
1465 corresponding <function>drm_*_cleanup</function> call to cleanup CRTCs
1466 (<function>drm_crtc_cleanup</function>), planes
1467 (<function>drm_plane_cleanup</function>), encoders
1468 (<function>drm_encoder_cleanup</function>) and connectors
1469 (<function>drm_connector_cleanup</function>). Furthermore, connectors
1470 that have been added to sysfs must be removed by a call to
34ea3d38 1471 <function>drm_connector_unregister</function> before calling
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1472 <function>drm_connector_cleanup</function>.
1473 </para>
1474 <para>
1475 Connectors state change detection must be cleanup up with a call to
1476 <function>drm_kms_helper_poll_fini</function>.
1477 </para>
1478 </sect2>
1479 <sect2>
1480 <title>Output discovery and initialization example</title>
1481 <programlisting><![CDATA[
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1482void intel_crt_init(struct drm_device *dev)
1483{
1484 struct drm_connector *connector;
1485 struct intel_output *intel_output;
1486
1487 intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
1488 if (!intel_output)
1489 return;
1490
1491 connector = &intel_output->base;
1492 drm_connector_init(dev, &intel_output->base,
1493 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
1494
1495 drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
1496 DRM_MODE_ENCODER_DAC);
1497
1498 drm_mode_connector_attach_encoder(&intel_output->base,
1499 &intel_output->enc);
1500
1501 /* Set up the DDC bus. */
1502 intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
1503 if (!intel_output->ddc_bus) {
1504 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1505 "failed.\n");
1506 return;
1507 }
1508
1509 intel_output->type = INTEL_OUTPUT_ANALOG;
1510 connector->interlace_allowed = 0;
1511 connector->doublescan_allowed = 0;
1512
1513 drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
1514 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
1515
34ea3d38 1516 drm_connector_register(connector);
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1517}]]></programlisting>
1518 <para>
1519 In the example above (taken from the i915 driver), a CRTC, connector and
1520 encoder combination is created. A device-specific i2c bus is also
1521 created for fetching EDID data and performing monitor detection. Once
1522 the process is complete, the new connector is registered with sysfs to
1523 make its properties available to applications.
1524 </para>
2d2ef822 1525 </sect2>
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1526 <sect2>
1527 <title>KMS API Functions</title>
1528!Edrivers/gpu/drm/drm_crtc.c
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1529 </sect2>
1530 <sect2>
1531 <title>KMS Data Structures</title>
1532!Iinclude/drm/drm_crtc.h
065a50ed 1533 </sect2>
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RC
1534 <sect2>
1535 <title>KMS Locking</title>
1536!Pdrivers/gpu/drm/drm_modeset_lock.c kms locking
1537!Iinclude/drm/drm_modeset_lock.h
1538!Edrivers/gpu/drm/drm_modeset_lock.c
1539 </sect2>
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1540 </sect1>
1541
e4949f29 1542 <!-- Internals: kms helper functions -->
2d2ef822
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1543
1544 <sect1>
e4949f29 1545 <title>Mode Setting Helper Functions</title>
2d2ef822 1546 <para>
6efa1f2f 1547 The plane, CRTC, encoder and connector functions provided by the drivers
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1548 implement the DRM API. They're called by the DRM core and ioctl handlers
1549 to handle device state changes and configuration request. As implementing
1550 those functions often requires logic not specific to drivers, mid-layer
1551 helper functions are available to avoid duplicating boilerplate code.
1552 </para>
1553 <para>
1554 The DRM core contains one mid-layer implementation. The mid-layer provides
6efa1f2f
MR
1555 implementations of several plane, CRTC, encoder and connector functions
1556 (called from the top of the mid-layer) that pre-process requests and call
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1557 lower-level functions provided by the driver (at the bottom of the
1558 mid-layer). For instance, the
1559 <function>drm_crtc_helper_set_config</function> function can be used to
1560 fill the struct <structname>drm_crtc_funcs</structname>
1561 <structfield>set_config</structfield> field. When called, it will split
1562 the <methodname>set_config</methodname> operation in smaller, simpler
1563 operations and call the driver to handle them.
2d2ef822 1564 </para>
2d2ef822 1565 <para>
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1566 To use the mid-layer, drivers call <function>drm_crtc_helper_add</function>,
1567 <function>drm_encoder_helper_add</function> and
1568 <function>drm_connector_helper_add</function> functions to install their
1569 mid-layer bottom operations handlers, and fill the
1570 <structname>drm_crtc_funcs</structname>,
1571 <structname>drm_encoder_funcs</structname> and
1572 <structname>drm_connector_funcs</structname> structures with pointers to
1573 the mid-layer top API functions. Installing the mid-layer bottom operation
1574 handlers is best done right after registering the corresponding KMS object.
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1575 </para>
1576 <para>
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1577 The mid-layer is not split between CRTC, encoder and connector operations.
1578 To use it, a driver must provide bottom functions for all of the three KMS
1579 entities.
2d2ef822 1580 </para>
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1581 <sect2>
1582 <title>Atomic Modeset Helper Functions Reference</title>
1583 <sect3>
1584 <title>Overview</title>
1585!Pdrivers/gpu/drm/drm_atomic_helper.c overview
1586 </sect3>
1587 <sect3>
1588 <title>Implementing Asynchronous Atomic Commit</title>
1589!Pdrivers/gpu/drm/drm_atomic_helper.c implementing async commit
1590 </sect3>
1591 <sect3>
1592 <title>Atomic State Reset and Initialization</title>
1593!Pdrivers/gpu/drm/drm_atomic_helper.c atomic state reset and initialization
1594 </sect3>
dd275956 1595!Iinclude/drm/drm_atomic_helper.h
3150c7d0
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1596!Edrivers/gpu/drm/drm_atomic_helper.c
1597 </sect2>
0d4ed4c8 1598 <sect2>
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1599 <title>Modeset Helper Reference for Common Vtables</title>
1600!Iinclude/drm/drm_modeset_helper_vtables.h
1601!Pinclude/drm/drm_modeset_helper_vtables.h overview
3150c7d0 1602 </sect2>
0d4ed4c8 1603 <sect2>
2be94971 1604 <title>Legacy CRTC/Modeset Helper Functions Reference</title>
0d4ed4c8 1605!Edrivers/gpu/drm/drm_crtc_helper.c
3150c7d0 1606!Pdrivers/gpu/drm/drm_crtc_helper.c overview
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1607 </sect2>
1608 <sect2>
1609 <title>Output Probing Helper Functions Reference</title>
1610!Pdrivers/gpu/drm/drm_probe_helper.c output probing helper overview
1611!Edrivers/gpu/drm/drm_probe_helper.c
0d4ed4c8 1612 </sect2>
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1613 <sect2>
1614 <title>fbdev Helper Functions Reference</title>
1615!Pdrivers/gpu/drm/drm_fb_helper.c fbdev helpers
1616!Edrivers/gpu/drm/drm_fb_helper.c
207fd329 1617!Iinclude/drm/drm_fb_helper.h
02da16d0
NT
1618 </sect2>
1619 <sect2>
1620 <title>Framebuffer CMA Helper Functions Reference</title>
1621!Pdrivers/gpu/drm/drm_fb_cma_helper.c framebuffer cma helper functions
1622!Edrivers/gpu/drm/drm_fb_cma_helper.c
d0ddc033 1623 </sect2>
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1624 <sect2>
1625 <title>Display Port Helper Functions Reference</title>
1626!Pdrivers/gpu/drm/drm_dp_helper.c dp helpers
1627!Iinclude/drm/drm_dp_helper.h
1628!Edrivers/gpu/drm/drm_dp_helper.c
b3daa5ef
VS
1629 </sect2>
1630 <sect2>
1631 <title>Display Port Dual Mode Adaptor Helper Functions Reference</title>
1632!Pdrivers/gpu/drm/drm_dp_dual_mode_helper.c dp dual mode helpers
1633!Iinclude/drm/drm_dp_dual_mode_helper.h
1634!Edrivers/gpu/drm/drm_dp_dual_mode_helper.c
ad7f8a1f
DA
1635 </sect2>
1636 <sect2>
1637 <title>Display Port MST Helper Functions Reference</title>
1638!Pdrivers/gpu/drm/drm_dp_mst_topology.c dp mst helper
1639!Iinclude/drm/drm_dp_mst_helper.h
1640!Edrivers/gpu/drm/drm_dp_mst_topology.c
009081e0
TR
1641 </sect2>
1642 <sect2>
1643 <title>MIPI DSI Helper Functions Reference</title>
1644!Pdrivers/gpu/drm/drm_mipi_dsi.c dsi helpers
1645!Iinclude/drm/drm_mipi_dsi.h
1646!Edrivers/gpu/drm/drm_mipi_dsi.c
28164fda 1647 </sect2>
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1648 <sect2>
1649 <title>EDID Helper Functions Reference</title>
1650!Edrivers/gpu/drm/drm_edid.c
1651 </sect2>
03973536
VS
1652 <sect2>
1653 <title>Rectangle Utilities Reference</title>
1654!Pinclude/drm/drm_rect.h rect utils
1655!Iinclude/drm/drm_rect.h
1656!Edrivers/gpu/drm/drm_rect.c
cabaafc7
RC
1657 </sect2>
1658 <sect2>
1659 <title>Flip-work Helper Reference</title>
1660!Pinclude/drm/drm_flip_work.h flip utils
1661!Iinclude/drm/drm_flip_work.h
1662!Edrivers/gpu/drm/drm_flip_work.c
03973536 1663 </sect2>
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1664 <sect2>
1665 <title>HDMI Infoframes Helper Reference</title>
1666 <para>
1667 Strictly speaking this is not a DRM helper library but generally useable
1668 by any driver interfacing with HDMI outputs like v4l or alsa drivers.
1669 But it nicely fits into the overall topic of mode setting helper
1670 libraries and hence is also included here.
1671 </para>
1672!Iinclude/linux/hdmi.h
1673!Edrivers/video/hdmi.c
1674 </sect2>
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MR
1675 <sect2>
1676 <title id="drm-kms-planehelpers">Plane Helper Reference</title>
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DV
1677!Edrivers/gpu/drm/drm_plane_helper.c
1678!Pdrivers/gpu/drm/drm_plane_helper.c overview
6efa1f2f 1679 </sect2>
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DA
1680 <sect2>
1681 <title>Tile group</title>
1682!Pdrivers/gpu/drm/drm_crtc.c Tile group
1683 </sect2>
2331b4e4 1684 <sect2>
83127f67 1685 <title>Bridges</title>
2331b4e4 1686 <sect3>
83127f67 1687 <title>Overview</title>
2331b4e4
AT
1688!Pdrivers/gpu/drm/drm_bridge.c overview
1689 </sect3>
1690 <sect3>
83127f67 1691 <title>Default bridge callback sequence</title>
2331b4e4
AT
1692!Pdrivers/gpu/drm/drm_bridge.c bridge callbacks
1693 </sect3>
1694!Edrivers/gpu/drm/drm_bridge.c
1695 </sect2>
83127f67
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1696 <sect2>
1697 <title>Panel Helper Reference</title>
1698!Iinclude/drm/drm_panel.h
1699!Edrivers/gpu/drm/drm_panel.c
1700!Pdrivers/gpu/drm/drm_panel.c drm panel
1701 </sect2>
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1702 </sect1>
1703
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1704 <!-- Internals: kms properties -->
1705
1706 <sect1 id="drm-kms-properties">
1707 <title>KMS Properties</title>
1708 <para>
1709 Drivers may need to expose additional parameters to applications than
1710 those described in the previous sections. KMS supports attaching
1711 properties to CRTCs, connectors and planes and offers a userspace API to
1712 list, get and set the property values.
1713 </para>
1714 <para>
1715 Properties are identified by a name that uniquely defines the property
1716 purpose, and store an associated value. For all property types except blob
1717 properties the value is a 64-bit unsigned integer.
1718 </para>
1719 <para>
1720 KMS differentiates between properties and property instances. Drivers
1721 first create properties and then create and associate individual instances
1722 of those properties to objects. A property can be instantiated multiple
1723 times and associated with different objects. Values are stored in property
9a6594fc 1724 instances, and all other property information are stored in the property
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1725 and shared between all instances of the property.
1726 </para>
1727 <para>
1728 Every property is created with a type that influences how the KMS core
1729 handles the property. Supported property types are
1730 <variablelist>
1731 <varlistentry>
1732 <term>DRM_MODE_PROP_RANGE</term>
1733 <listitem><para>Range properties report their minimum and maximum
1734 admissible values. The KMS core verifies that values set by
1735 application fit in that range.</para></listitem>
1736 </varlistentry>
1737 <varlistentry>
1738 <term>DRM_MODE_PROP_ENUM</term>
1739 <listitem><para>Enumerated properties take a numerical value that
1740 ranges from 0 to the number of enumerated values defined by the
1741 property minus one, and associate a free-formed string name to each
1742 value. Applications can retrieve the list of defined value-name pairs
1743 and use the numerical value to get and set property instance values.
1744 </para></listitem>
1745 </varlistentry>
1746 <varlistentry>
1747 <term>DRM_MODE_PROP_BITMASK</term>
1748 <listitem><para>Bitmask properties are enumeration properties that
1749 additionally restrict all enumerated values to the 0..63 range.
1750 Bitmask property instance values combine one or more of the
1751 enumerated bits defined by the property.</para></listitem>
1752 </varlistentry>
1753 <varlistentry>
1754 <term>DRM_MODE_PROP_BLOB</term>
1755 <listitem><para>Blob properties store a binary blob without any format
1756 restriction. The binary blobs are created as KMS standalone objects,
1757 and blob property instance values store the ID of their associated
1758 blob object.</para>
1759 <para>Blob properties are only used for the connector EDID property
1760 and cannot be created by drivers.</para></listitem>
1761 </varlistentry>
1762 </variablelist>
1763 </para>
1764 <para>
1765 To create a property drivers call one of the following functions depending
1766 on the property type. All property creation functions take property flags
1767 and name, as well as type-specific arguments.
1768 <itemizedlist>
1769 <listitem>
1770 <synopsis>struct drm_property *drm_property_create_range(struct drm_device *dev, int flags,
1771 const char *name,
1772 uint64_t min, uint64_t max);</synopsis>
1773 <para>Create a range property with the given minimum and maximum
1774 values.</para>
1775 </listitem>
1776 <listitem>
1777 <synopsis>struct drm_property *drm_property_create_enum(struct drm_device *dev, int flags,
1778 const char *name,
1779 const struct drm_prop_enum_list *props,
1780 int num_values);</synopsis>
1781 <para>Create an enumerated property. The <parameter>props</parameter>
1782 argument points to an array of <parameter>num_values</parameter>
1783 value-name pairs.</para>
1784 </listitem>
1785 <listitem>
1786 <synopsis>struct drm_property *drm_property_create_bitmask(struct drm_device *dev,
1787 int flags, const char *name,
1788 const struct drm_prop_enum_list *props,
1789 int num_values);</synopsis>
1790 <para>Create a bitmask property. The <parameter>props</parameter>
1791 argument points to an array of <parameter>num_values</parameter>
1792 value-name pairs.</para>
1793 </listitem>
1794 </itemizedlist>
1795 </para>
1796 <para>
1797 Properties can additionally be created as immutable, in which case they
1798 will be read-only for applications but can be modified by the driver. To
1799 create an immutable property drivers must set the DRM_MODE_PROP_IMMUTABLE
1800 flag at property creation time.
1801 </para>
1802 <para>
1803 When no array of value-name pairs is readily available at property
1804 creation time for enumerated or range properties, drivers can create
1805 the property using the <function>drm_property_create</function> function
1806 and manually add enumeration value-name pairs by calling the
1807 <function>drm_property_add_enum</function> function. Care must be taken to
1808 properly specify the property type through the <parameter>flags</parameter>
1809 argument.
1810 </para>
1811 <para>
1812 After creating properties drivers can attach property instances to CRTC,
1813 connector and plane objects by calling the
1814 <function>drm_object_attach_property</function>. The function takes a
1815 pointer to the target object, a pointer to the previously created property
1816 and an initial instance value.
1817 </para>
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1818 <sect2>
1819 <title>Existing KMS Properties</title>
1820 <para>
1821 The following table gives description of drm properties exposed by various
1822 modules/drivers.
1823 </para>
1824 <table border="1" cellpadding="0" cellspacing="0">
1825 <tbody>
1826 <tr style="font-weight: bold;">
1827 <td valign="top" >Owner Module/Drivers</td>
1828 <td valign="top" >Group</td>
1829 <td valign="top" >Property Name</td>
1830 <td valign="top" >Type</td>
1831 <td valign="top" >Property Values</td>
1832 <td valign="top" >Object attached</td>
1833 <td valign="top" >Description/Restrictions</td>
1834 </tr>
1835 <tr>
5488dc16 1836 <td rowspan="42" valign="top" >DRM</td>
fcbcb3b0 1837 <td rowspan="2" valign="top" >Generic</td>
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1838 <td valign="top" >“rotation”</td>
1839 <td valign="top" >BITMASK</td>
1840 <td valign="top" >{ 0, "rotate-0" },
1841 { 1, "rotate-90" },
1842 { 2, "rotate-180" },
1843 { 3, "rotate-270" },
1844 { 4, "reflect-x" },
1845 { 5, "reflect-y" }</td>
1846 <td valign="top" >CRTC, Plane</td>
1847 <td valign="top" >rotate-(degrees) rotates the image by the specified amount in degrees
1848 in counter clockwise direction. reflect-x and reflect-y reflects the
1849 image along the specified axis prior to rotation</td>
1850 </tr>
1851 <tr>
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RF
1852 <td valign="top" >“scaling mode”</td>
1853 <td valign="top" >ENUM</td>
1854 <td valign="top" >{ "None", "Full", "Center", "Full aspect" }</td>
1855 <td valign="top" >Connector</td>
1856 <td valign="top" >Supported by: amdgpu, gma500, i915, nouveau and radeon.</td>
1857 </tr>
1858 <tr>
ae16c597 1859 <td rowspan="5" valign="top" >Connector</td>
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1860 <td valign="top" >“EDID”</td>
1861 <td valign="top" >BLOB | IMMUTABLE</td>
1862 <td valign="top" >0</td>
1863 <td valign="top" >Connector</td>
1864 <td valign="top" >Contains id of edid blob ptr object.</td>
1865 </tr>
1866 <tr>
1867 <td valign="top" >“DPMS”</td>
1868 <td valign="top" >ENUM</td>
1869 <td valign="top" >{ “On”, “Standby”, “Suspend”, “Off” }</td>
1870 <td valign="top" >Connector</td>
1871 <td valign="top" >Contains DPMS operation mode value.</td>
1872 </tr>
1873 <tr>
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1874 <td valign="top" >“PATH”</td>
1875 <td valign="top" >BLOB | IMMUTABLE</td>
1876 <td valign="top" >0</td>
1877 <td valign="top" >Connector</td>
1878 <td valign="top" >Contains topology path to a connector.</td>
1879 </tr>
1880 <tr>
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1881 <td valign="top" >“TILE”</td>
1882 <td valign="top" >BLOB | IMMUTABLE</td>
1883 <td valign="top" >0</td>
1884 <td valign="top" >Connector</td>
1885 <td valign="top" >Contains tiling information for a connector.</td>
1886 </tr>
1887 <tr>
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RC
1888 <td valign="top" >“CRTC_ID”</td>
1889 <td valign="top" >OBJECT</td>
1890 <td valign="top" >DRM_MODE_OBJECT_CRTC</td>
1891 <td valign="top" >Connector</td>
1892 <td valign="top" >CRTC that connector is attached to (atomic)</td>
1893 </tr>
1894 <tr>
6b4959f4 1895 <td rowspan="11" valign="top" >Plane</td>
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DL
1896 <td valign="top" >“type”</td>
1897 <td valign="top" >ENUM | IMMUTABLE</td>
1898 <td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
1899 <td valign="top" >Plane</td>
1900 <td valign="top" >Plane type</td>
1901 </tr>
1902 <tr>
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1903 <td valign="top" >“SRC_X”</td>
1904 <td valign="top" >RANGE</td>
1905 <td valign="top" >Min=0, Max=UINT_MAX</td>
1906 <td valign="top" >Plane</td>
1907 <td valign="top" >Scanout source x coordinate in 16.16 fixed point (atomic)</td>
1908 </tr>
1909 <tr>
1910 <td valign="top" >“SRC_Y”</td>
1911 <td valign="top" >RANGE</td>
1912 <td valign="top" >Min=0, Max=UINT_MAX</td>
1913 <td valign="top" >Plane</td>
1914 <td valign="top" >Scanout source y coordinate in 16.16 fixed point (atomic)</td>
1915 </tr>
1916 <tr>
1917 <td valign="top" >“SRC_W”</td>
1918 <td valign="top" >RANGE</td>
1919 <td valign="top" >Min=0, Max=UINT_MAX</td>
1920 <td valign="top" >Plane</td>
1921 <td valign="top" >Scanout source width in 16.16 fixed point (atomic)</td>
1922 </tr>
1923 <tr>
1924 <td valign="top" >“SRC_H”</td>
1925 <td valign="top" >RANGE</td>
1926 <td valign="top" >Min=0, Max=UINT_MAX</td>
1927 <td valign="top" >Plane</td>
1928 <td valign="top" >Scanout source height in 16.16 fixed point (atomic)</td>
1929 </tr>
1930 <tr>
1931 <td valign="top" >“CRTC_X”</td>
1932 <td valign="top" >SIGNED_RANGE</td>
1933 <td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
1934 <td valign="top" >Plane</td>
1935 <td valign="top" >Scanout CRTC (destination) x coordinate (atomic)</td>
1936 </tr>
1937 <tr>
1938 <td valign="top" >“CRTC_Y”</td>
1939 <td valign="top" >SIGNED_RANGE</td>
1940 <td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
1941 <td valign="top" >Plane</td>
1942 <td valign="top" >Scanout CRTC (destination) y coordinate (atomic)</td>
1943 </tr>
1944 <tr>
1945 <td valign="top" >“CRTC_W”</td>
1946 <td valign="top" >RANGE</td>
1947 <td valign="top" >Min=0, Max=UINT_MAX</td>
1948 <td valign="top" >Plane</td>
1949 <td valign="top" >Scanout CRTC (destination) width (atomic)</td>
1950 </tr>
1951 <tr>
1952 <td valign="top" >“CRTC_H”</td>
1953 <td valign="top" >RANGE</td>
1954 <td valign="top" >Min=0, Max=UINT_MAX</td>
1955 <td valign="top" >Plane</td>
1956 <td valign="top" >Scanout CRTC (destination) height (atomic)</td>
1957 </tr>
1958 <tr>
1959 <td valign="top" >“FB_ID”</td>
1960 <td valign="top" >OBJECT</td>
1961 <td valign="top" >DRM_MODE_OBJECT_FB</td>
1962 <td valign="top" >Plane</td>
1963 <td valign="top" >Scanout framebuffer (atomic)</td>
1964 </tr>
1965 <tr>
1966 <td valign="top" >“CRTC_ID”</td>
1967 <td valign="top" >OBJECT</td>
1968 <td valign="top" >DRM_MODE_OBJECT_CRTC</td>
1969 <td valign="top" >Plane</td>
1970 <td valign="top" >CRTC that plane is attached to (atomic)</td>
1971 </tr>
1972 <tr>
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1973 <td rowspan="2" valign="top" >DVI-I</td>
1974 <td valign="top" >“subconnector”</td>
1975 <td valign="top" >ENUM</td>
1976 <td valign="top" >{ “Unknown”, “DVI-D”, “DVI-A” }</td>
1977 <td valign="top" >Connector</td>
1978 <td valign="top" >TBD</td>
1979 </tr>
1980 <tr>
1981 <td valign="top" >“select subconnector”</td>
1982 <td valign="top" >ENUM</td>
1983 <td valign="top" >{ “Automatic”, “DVI-D”, “DVI-A” }</td>
1984 <td valign="top" >Connector</td>
1985 <td valign="top" >TBD</td>
1986 </tr>
1987 <tr>
1988 <td rowspan="13" valign="top" >TV</td>
1989 <td valign="top" >“subconnector”</td>
1990 <td valign="top" >ENUM</td>
1991 <td valign="top" >{ "Unknown", "Composite", "SVIDEO", "Component", "SCART" }</td>
1992 <td valign="top" >Connector</td>
1993 <td valign="top" >TBD</td>
1994 </tr>
1995 <tr>
1996 <td valign="top" >“select subconnector”</td>
1997 <td valign="top" >ENUM</td>
1998 <td valign="top" >{ "Automatic", "Composite", "SVIDEO", "Component", "SCART" }</td>
1999 <td valign="top" >Connector</td>
2000 <td valign="top" >TBD</td>
2001 </tr>
2002 <tr>
2003 <td valign="top" >“mode”</td>
2004 <td valign="top" >ENUM</td>
2005 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2006 <td valign="top" >Connector</td>
2007 <td valign="top" >TBD</td>
2008 </tr>
2009 <tr>
2010 <td valign="top" >“left margin”</td>
2011 <td valign="top" >RANGE</td>
2012 <td valign="top" >Min=0, Max=100</td>
2013 <td valign="top" >Connector</td>
2014 <td valign="top" >TBD</td>
2015 </tr>
2016 <tr>
2017 <td valign="top" >“right margin”</td>
2018 <td valign="top" >RANGE</td>
2019 <td valign="top" >Min=0, Max=100</td>
2020 <td valign="top" >Connector</td>
2021 <td valign="top" >TBD</td>
2022 </tr>
2023 <tr>
2024 <td valign="top" >“top margin”</td>
2025 <td valign="top" >RANGE</td>
2026 <td valign="top" >Min=0, Max=100</td>
2027 <td valign="top" >Connector</td>
2028 <td valign="top" >TBD</td>
2029 </tr>
2030 <tr>
2031 <td valign="top" >“bottom margin”</td>
2032 <td valign="top" >RANGE</td>
2033 <td valign="top" >Min=0, Max=100</td>
2034 <td valign="top" >Connector</td>
2035 <td valign="top" >TBD</td>
2036 </tr>
2037 <tr>
2038 <td valign="top" >“brightness”</td>
2039 <td valign="top" >RANGE</td>
2040 <td valign="top" >Min=0, Max=100</td>
2041 <td valign="top" >Connector</td>
2042 <td valign="top" >TBD</td>
2043 </tr>
2044 <tr>
2045 <td valign="top" >“contrast”</td>
2046 <td valign="top" >RANGE</td>
2047 <td valign="top" >Min=0, Max=100</td>
2048 <td valign="top" >Connector</td>
2049 <td valign="top" >TBD</td>
2050 </tr>
2051 <tr>
2052 <td valign="top" >“flicker reduction”</td>
2053 <td valign="top" >RANGE</td>
2054 <td valign="top" >Min=0, Max=100</td>
2055 <td valign="top" >Connector</td>
2056 <td valign="top" >TBD</td>
2057 </tr>
2058 <tr>
2059 <td valign="top" >“overscan”</td>
2060 <td valign="top" >RANGE</td>
2061 <td valign="top" >Min=0, Max=100</td>
2062 <td valign="top" >Connector</td>
2063 <td valign="top" >TBD</td>
2064 </tr>
2065 <tr>
2066 <td valign="top" >“saturation”</td>
2067 <td valign="top" >RANGE</td>
2068 <td valign="top" >Min=0, Max=100</td>
2069 <td valign="top" >Connector</td>
2070 <td valign="top" >TBD</td>
2071 </tr>
2072 <tr>
2073 <td valign="top" >“hue”</td>
2074 <td valign="top" >RANGE</td>
2075 <td valign="top" >Min=0, Max=100</td>
2076 <td valign="top" >Connector</td>
2077 <td valign="top" >TBD</td>
2078 </tr>
2079 <tr>
5bb2bbf5
DA
2080 <td rowspan="2" valign="top" >Virtual GPU</td>
2081 <td valign="top" >“suggested X”</td>
2082 <td valign="top" >RANGE</td>
2083 <td valign="top" >Min=0, Max=0xffffffff</td>
2084 <td valign="top" >Connector</td>
2085 <td valign="top" >property to suggest an X offset for a connector</td>
2086 </tr>
2087 <tr>
2088 <td valign="top" >“suggested Y”</td>
2089 <td valign="top" >RANGE</td>
2090 <td valign="top" >Min=0, Max=0xffffffff</td>
2091 <td valign="top" >Connector</td>
2092 <td valign="top" >property to suggest an Y offset for a connector</td>
2093 </tr>
2094 <tr>
fcbcb3b0 2095 <td rowspan="7" valign="top" >Optional</td>
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VK
2096 <td valign="top" >"aspect ratio"</td>
2097 <td valign="top" >ENUM</td>
2098 <td valign="top" >{ "None", "4:3", "16:9" }</td>
2099 <td valign="top" >Connector</td>
fcbcb3b0 2100 <td valign="top" >TDB</td>
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VK
2101 </tr>
2102 <tr>
6c6a3996
SK
2103 <td valign="top" >“dirty”</td>
2104 <td valign="top" >ENUM | IMMUTABLE</td>
2105 <td valign="top" >{ "Off", "On", "Annotate" }</td>
2106 <td valign="top" >Connector</td>
2107 <td valign="top" >TBD</td>
2108 </tr>
2109 <tr>
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LL
2110 <td valign="top" >“DEGAMMA_LUT”</td>
2111 <td valign="top" >BLOB</td>
2112 <td valign="top" >0</td>
2113 <td valign="top" >CRTC</td>
2114 <td valign="top" >DRM property to set the degamma lookup table
2115 (LUT) mapping pixel data from the framebuffer before it is
2116 given to the transformation matrix. The data is an interpreted
2117 as an array of struct drm_color_lut elements. Hardware might
2118 choose not to use the full precision of the LUT elements nor
2119 use all the elements of the LUT (for example the hardware
2120 might choose to interpolate between LUT[0] and LUT[4]). </td>
2121 </tr>
2122 <tr>
2123 <td valign="top" >“DEGAMMA_LUT_SIZE”</td>
2124 <td valign="top" >RANGE | IMMUTABLE</td>
2125 <td valign="top" >Min=0, Max=UINT_MAX</td>
2126 <td valign="top" >CRTC</td>
2127 <td valign="top" >DRM property to gives the size of the lookup
2128 table to be set on the DEGAMMA_LUT property (the size depends
2129 on the underlying hardware).</td>
2130 </tr>
2131 <tr>
2132 <td valign="top" >“CTM”</td>
2133 <td valign="top" >BLOB</td>
2134 <td valign="top" >0</td>
2135 <td valign="top" >CRTC</td>
2136 <td valign="top" >DRM property to set the current
2137 transformation matrix (CTM) apply to pixel data after the
2138 lookup through the degamma LUT and before the lookup through
2139 the gamma LUT. The data is an interpreted as a struct
2140 drm_color_ctm.</td>
2141 </tr>
2142 <tr>
2143 <td valign="top" >“GAMMA_LUT”</td>
2144 <td valign="top" >BLOB</td>
2145 <td valign="top" >0</td>
2146 <td valign="top" >CRTC</td>
2147 <td valign="top" >DRM property to set the gamma lookup table
2148 (LUT) mapping pixel data after to the transformation matrix to
2149 data sent to the connector. The data is an interpreted as an
2150 array of struct drm_color_lut elements. Hardware might choose
2151 not to use the full precision of the LUT elements nor use all
2152 the elements of the LUT (for example the hardware might choose
2153 to interpolate between LUT[0] and LUT[4]).</td>
2154 </tr>
2155 <tr>
2156 <td valign="top" >“GAMMA_LUT_SIZE”</td>
2157 <td valign="top" >RANGE | IMMUTABLE</td>
2158 <td valign="top" >Min=0, Max=UINT_MAX</td>
2159 <td valign="top" >CRTC</td>
2160 <td valign="top" >DRM property to gives the size of the lookup
2161 table to be set on the GAMMA_LUT property (the size depends on
2162 the underlying hardware).</td>
2163 </tr>
2164 <tr>
712a0dd9 2165 <td rowspan="20" valign="top" >i915</td>
4ba08faa 2166 <td rowspan="2" valign="top" >Generic</td>
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2167 <td valign="top" >"Broadcast RGB"</td>
2168 <td valign="top" >ENUM</td>
2169 <td valign="top" >{ "Automatic", "Full", "Limited 16:235" }</td>
2170 <td valign="top" >Connector</td>
82cf435b
LL
2171 <td valign="top" >When this property is set to Limited 16:235
2172 and CTM is set, the hardware will be programmed with the
2173 result of the multiplication of CTM by the limited range
2174 matrix to ensure the pixels normaly in the range 0..1.0 are
2175 remapped to the range 16/255..235/255.</td>
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2176 </tr>
2177 <tr>
2178 <td valign="top" >“audio”</td>
2179 <td valign="top" >ENUM</td>
2180 <td valign="top" >{ "force-dvi", "off", "auto", "on" }</td>
2181 <td valign="top" >Connector</td>
2182 <td valign="top" >TBD</td>
2183 </tr>
2184 <tr>
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2185 <td rowspan="17" valign="top" >SDVO-TV</td>
2186 <td valign="top" >“mode”</td>
2187 <td valign="top" >ENUM</td>
2188 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2189 <td valign="top" >Connector</td>
2190 <td valign="top" >TBD</td>
2191 </tr>
2192 <tr>
2193 <td valign="top" >"left_margin"</td>
2194 <td valign="top" >RANGE</td>
2195 <td valign="top" >Min=0, Max= SDVO dependent</td>
2196 <td valign="top" >Connector</td>
2197 <td valign="top" >TBD</td>
2198 </tr>
2199 <tr>
2200 <td valign="top" >"right_margin"</td>
2201 <td valign="top" >RANGE</td>
2202 <td valign="top" >Min=0, Max= SDVO dependent</td>
2203 <td valign="top" >Connector</td>
2204 <td valign="top" >TBD</td>
2205 </tr>
2206 <tr>
2207 <td valign="top" >"top_margin"</td>
2208 <td valign="top" >RANGE</td>
2209 <td valign="top" >Min=0, Max= SDVO dependent</td>
2210 <td valign="top" >Connector</td>
2211 <td valign="top" >TBD</td>
2212 </tr>
2213 <tr>
2214 <td valign="top" >"bottom_margin"</td>
2215 <td valign="top" >RANGE</td>
2216 <td valign="top" >Min=0, Max= SDVO dependent</td>
2217 <td valign="top" >Connector</td>
2218 <td valign="top" >TBD</td>
2219 </tr>
2220 <tr>
2221 <td valign="top" >“hpos”</td>
2222 <td valign="top" >RANGE</td>
2223 <td valign="top" >Min=0, Max= SDVO dependent</td>
2224 <td valign="top" >Connector</td>
2225 <td valign="top" >TBD</td>
2226 </tr>
2227 <tr>
2228 <td valign="top" >“vpos”</td>
2229 <td valign="top" >RANGE</td>
2230 <td valign="top" >Min=0, Max= SDVO dependent</td>
2231 <td valign="top" >Connector</td>
2232 <td valign="top" >TBD</td>
2233 </tr>
2234 <tr>
2235 <td valign="top" >“contrast”</td>
2236 <td valign="top" >RANGE</td>
2237 <td valign="top" >Min=0, Max= SDVO dependent</td>
2238 <td valign="top" >Connector</td>
2239 <td valign="top" >TBD</td>
2240 </tr>
2241 <tr>
2242 <td valign="top" >“saturation”</td>
2243 <td valign="top" >RANGE</td>
2244 <td valign="top" >Min=0, Max= SDVO dependent</td>
2245 <td valign="top" >Connector</td>
2246 <td valign="top" >TBD</td>
2247 </tr>
2248 <tr>
2249 <td valign="top" >“hue”</td>
2250 <td valign="top" >RANGE</td>
2251 <td valign="top" >Min=0, Max= SDVO dependent</td>
2252 <td valign="top" >Connector</td>
2253 <td valign="top" >TBD</td>
2254 </tr>
2255 <tr>
2256 <td valign="top" >“sharpness”</td>
2257 <td valign="top" >RANGE</td>
2258 <td valign="top" >Min=0, Max= SDVO dependent</td>
2259 <td valign="top" >Connector</td>
2260 <td valign="top" >TBD</td>
2261 </tr>
2262 <tr>
2263 <td valign="top" >“flicker_filter”</td>
2264 <td valign="top" >RANGE</td>
2265 <td valign="top" >Min=0, Max= SDVO dependent</td>
2266 <td valign="top" >Connector</td>
2267 <td valign="top" >TBD</td>
2268 </tr>
2269 <tr>
2270 <td valign="top" >“flicker_filter_adaptive”</td>
2271 <td valign="top" >RANGE</td>
2272 <td valign="top" >Min=0, Max= SDVO dependent</td>
2273 <td valign="top" >Connector</td>
2274 <td valign="top" >TBD</td>
2275 </tr>
2276 <tr>
2277 <td valign="top" >“flicker_filter_2d”</td>
2278 <td valign="top" >RANGE</td>
2279 <td valign="top" >Min=0, Max= SDVO dependent</td>
2280 <td valign="top" >Connector</td>
2281 <td valign="top" >TBD</td>
2282 </tr>
2283 <tr>
2284 <td valign="top" >“tv_chroma_filter”</td>
2285 <td valign="top" >RANGE</td>
2286 <td valign="top" >Min=0, Max= SDVO dependent</td>
2287 <td valign="top" >Connector</td>
2288 <td valign="top" >TBD</td>
2289 </tr>
2290 <tr>
2291 <td valign="top" >“tv_luma_filter”</td>
2292 <td valign="top" >RANGE</td>
2293 <td valign="top" >Min=0, Max= SDVO dependent</td>
2294 <td valign="top" >Connector</td>
2295 <td valign="top" >TBD</td>
2296 </tr>
2297 <tr>
2298 <td valign="top" >“dot_crawl”</td>
2299 <td valign="top" >RANGE</td>
2300 <td valign="top" >Min=0, Max=1</td>
2301 <td valign="top" >Connector</td>
2302 <td valign="top" >TBD</td>
2303 </tr>
2304 <tr>
2305 <td valign="top" >SDVO-TV/LVDS</td>
2306 <td valign="top" >“brightness”</td>
2307 <td valign="top" >RANGE</td>
2308 <td valign="top" >Min=0, Max= SDVO dependent</td>
2309 <td valign="top" >Connector</td>
2310 <td valign="top" >TBD</td>
2311 </tr>
2312 <tr>
4ba08faa
SK
2313 <td rowspan="2" valign="top" >CDV gma-500</td>
2314 <td rowspan="2" valign="top" >Generic</td>
6c6a3996
SK
2315 <td valign="top" >"Broadcast RGB"</td>
2316 <td valign="top" >ENUM</td>
2317 <td valign="top" >{ “Full”, “Limited 16:235” }</td>
2318 <td valign="top" >Connector</td>
2319 <td valign="top" >TBD</td>
2320 </tr>
2321 <tr>
2322 <td valign="top" >"Broadcast RGB"</td>
2323 <td valign="top" >ENUM</td>
2324 <td valign="top" >{ “off”, “auto”, “on” }</td>
2325 <td valign="top" >Connector</td>
2326 <td valign="top" >TBD</td>
2327 </tr>
2328 <tr>
4ba08faa
SK
2329 <td rowspan="19" valign="top" >Poulsbo</td>
2330 <td rowspan="1" valign="top" >Generic</td>
6c6a3996
SK
2331 <td valign="top" >“backlight”</td>
2332 <td valign="top" >RANGE</td>
2333 <td valign="top" >Min=0, Max=100</td>
2334 <td valign="top" >Connector</td>
2335 <td valign="top" >TBD</td>
2336 </tr>
2337 <tr>
6c6a3996
SK
2338 <td rowspan="17" valign="top" >SDVO-TV</td>
2339 <td valign="top" >“mode”</td>
2340 <td valign="top" >ENUM</td>
2341 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2342 <td valign="top" >Connector</td>
2343 <td valign="top" >TBD</td>
2344 </tr>
2345 <tr>
2346 <td valign="top" >"left_margin"</td>
2347 <td valign="top" >RANGE</td>
2348 <td valign="top" >Min=0, Max= SDVO dependent</td>
2349 <td valign="top" >Connector</td>
2350 <td valign="top" >TBD</td>
2351 </tr>
2352 <tr>
2353 <td valign="top" >"right_margin"</td>
2354 <td valign="top" >RANGE</td>
2355 <td valign="top" >Min=0, Max= SDVO dependent</td>
2356 <td valign="top" >Connector</td>
2357 <td valign="top" >TBD</td>
2358 </tr>
2359 <tr>
2360 <td valign="top" >"top_margin"</td>
2361 <td valign="top" >RANGE</td>
2362 <td valign="top" >Min=0, Max= SDVO dependent</td>
2363 <td valign="top" >Connector</td>
2364 <td valign="top" >TBD</td>
2365 </tr>
2366 <tr>
2367 <td valign="top" >"bottom_margin"</td>
2368 <td valign="top" >RANGE</td>
2369 <td valign="top" >Min=0, Max= SDVO dependent</td>
2370 <td valign="top" >Connector</td>
2371 <td valign="top" >TBD</td>
2372 </tr>
2373 <tr>
2374 <td valign="top" >“hpos”</td>
2375 <td valign="top" >RANGE</td>
2376 <td valign="top" >Min=0, Max= SDVO dependent</td>
2377 <td valign="top" >Connector</td>
2378 <td valign="top" >TBD</td>
2379 </tr>
2380 <tr>
2381 <td valign="top" >“vpos”</td>
2382 <td valign="top" >RANGE</td>
2383 <td valign="top" >Min=0, Max= SDVO dependent</td>
2384 <td valign="top" >Connector</td>
2385 <td valign="top" >TBD</td>
2386 </tr>
2387 <tr>
2388 <td valign="top" >“contrast”</td>
2389 <td valign="top" >RANGE</td>
2390 <td valign="top" >Min=0, Max= SDVO dependent</td>
2391 <td valign="top" >Connector</td>
2392 <td valign="top" >TBD</td>
2393 </tr>
2394 <tr>
2395 <td valign="top" >“saturation”</td>
2396 <td valign="top" >RANGE</td>
2397 <td valign="top" >Min=0, Max= SDVO dependent</td>
2398 <td valign="top" >Connector</td>
2399 <td valign="top" >TBD</td>
2400 </tr>
2401 <tr>
2402 <td valign="top" >“hue”</td>
2403 <td valign="top" >RANGE</td>
2404 <td valign="top" >Min=0, Max= SDVO dependent</td>
2405 <td valign="top" >Connector</td>
2406 <td valign="top" >TBD</td>
2407 </tr>
2408 <tr>
2409 <td valign="top" >“sharpness”</td>
2410 <td valign="top" >RANGE</td>
2411 <td valign="top" >Min=0, Max= SDVO dependent</td>
2412 <td valign="top" >Connector</td>
2413 <td valign="top" >TBD</td>
2414 </tr>
2415 <tr>
2416 <td valign="top" >“flicker_filter”</td>
2417 <td valign="top" >RANGE</td>
2418 <td valign="top" >Min=0, Max= SDVO dependent</td>
2419 <td valign="top" >Connector</td>
2420 <td valign="top" >TBD</td>
2421 </tr>
2422 <tr>
2423 <td valign="top" >“flicker_filter_adaptive”</td>
2424 <td valign="top" >RANGE</td>
2425 <td valign="top" >Min=0, Max= SDVO dependent</td>
2426 <td valign="top" >Connector</td>
2427 <td valign="top" >TBD</td>
2428 </tr>
2429 <tr>
2430 <td valign="top" >“flicker_filter_2d”</td>
2431 <td valign="top" >RANGE</td>
2432 <td valign="top" >Min=0, Max= SDVO dependent</td>
2433 <td valign="top" >Connector</td>
2434 <td valign="top" >TBD</td>
2435 </tr>
2436 <tr>
2437 <td valign="top" >“tv_chroma_filter”</td>
2438 <td valign="top" >RANGE</td>
2439 <td valign="top" >Min=0, Max= SDVO dependent</td>
2440 <td valign="top" >Connector</td>
2441 <td valign="top" >TBD</td>
2442 </tr>
2443 <tr>
2444 <td valign="top" >“tv_luma_filter”</td>
2445 <td valign="top" >RANGE</td>
2446 <td valign="top" >Min=0, Max= SDVO dependent</td>
2447 <td valign="top" >Connector</td>
2448 <td valign="top" >TBD</td>
2449 </tr>
2450 <tr>
2451 <td valign="top" >“dot_crawl”</td>
2452 <td valign="top" >RANGE</td>
2453 <td valign="top" >Min=0, Max=1</td>
2454 <td valign="top" >Connector</td>
2455 <td valign="top" >TBD</td>
2456 </tr>
2457 <tr>
2458 <td valign="top" >SDVO-TV/LVDS</td>
2459 <td valign="top" >“brightness”</td>
2460 <td valign="top" >RANGE</td>
2461 <td valign="top" >Min=0, Max= SDVO dependent</td>
2462 <td valign="top" >Connector</td>
2463 <td valign="top" >TBD</td>
2464 </tr>
2465 <tr>
2466 <td rowspan="11" valign="top" >armada</td>
2467 <td rowspan="2" valign="top" >CRTC</td>
2468 <td valign="top" >"CSC_YUV"</td>
2469 <td valign="top" >ENUM</td>
2470 <td valign="top" >{ "Auto" , "CCIR601", "CCIR709" }</td>
2471 <td valign="top" >CRTC</td>
2472 <td valign="top" >TBD</td>
2473 </tr>
2474 <tr>
2475 <td valign="top" >"CSC_RGB"</td>
2476 <td valign="top" >ENUM</td>
2477 <td valign="top" >{ "Auto", "Computer system", "Studio" }</td>
2478 <td valign="top" >CRTC</td>
2479 <td valign="top" >TBD</td>
2480 </tr>
2481 <tr>
2482 <td rowspan="9" valign="top" >Overlay</td>
2483 <td valign="top" >"colorkey"</td>
2484 <td valign="top" >RANGE</td>
2485 <td valign="top" >Min=0, Max=0xffffff</td>
2486 <td valign="top" >Plane</td>
2487 <td valign="top" >TBD</td>
2488 </tr>
2489 <tr>
2490 <td valign="top" >"colorkey_min"</td>
2491 <td valign="top" >RANGE</td>
2492 <td valign="top" >Min=0, Max=0xffffff</td>
2493 <td valign="top" >Plane</td>
2494 <td valign="top" >TBD</td>
2495 </tr>
2496 <tr>
2497 <td valign="top" >"colorkey_max"</td>
2498 <td valign="top" >RANGE</td>
2499 <td valign="top" >Min=0, Max=0xffffff</td>
2500 <td valign="top" >Plane</td>
2501 <td valign="top" >TBD</td>
2502 </tr>
2503 <tr>
2504 <td valign="top" >"colorkey_val"</td>
2505 <td valign="top" >RANGE</td>
2506 <td valign="top" >Min=0, Max=0xffffff</td>
2507 <td valign="top" >Plane</td>
2508 <td valign="top" >TBD</td>
2509 </tr>
2510 <tr>
2511 <td valign="top" >"colorkey_alpha"</td>
2512 <td valign="top" >RANGE</td>
2513 <td valign="top" >Min=0, Max=0xffffff</td>
2514 <td valign="top" >Plane</td>
2515 <td valign="top" >TBD</td>
2516 </tr>
2517 <tr>
2518 <td valign="top" >"colorkey_mode"</td>
2519 <td valign="top" >ENUM</td>
2520 <td valign="top" >{ "disabled", "Y component", "U component"
2521 , "V component", "RGB", “R component", "G component", "B component" }</td>
2522 <td valign="top" >Plane</td>
2523 <td valign="top" >TBD</td>
2524 </tr>
2525 <tr>
2526 <td valign="top" >"brightness"</td>
2527 <td valign="top" >RANGE</td>
2528 <td valign="top" >Min=0, Max=256 + 255</td>
2529 <td valign="top" >Plane</td>
2530 <td valign="top" >TBD</td>
2531 </tr>
2532 <tr>
2533 <td valign="top" >"contrast"</td>
2534 <td valign="top" >RANGE</td>
2535 <td valign="top" >Min=0, Max=0x7fff</td>
2536 <td valign="top" >Plane</td>
2537 <td valign="top" >TBD</td>
2538 </tr>
2539 <tr>
2540 <td valign="top" >"saturation"</td>
2541 <td valign="top" >RANGE</td>
2542 <td valign="top" >Min=0, Max=0x7fff</td>
2543 <td valign="top" >Plane</td>
2544 <td valign="top" >TBD</td>
2545 </tr>
2546 <tr>
2547 <td rowspan="2" valign="top" >exynos</td>
2548 <td valign="top" >CRTC</td>
2549 <td valign="top" >“mode”</td>
2550 <td valign="top" >ENUM</td>
2551 <td valign="top" >{ "normal", "blank" }</td>
2552 <td valign="top" >CRTC</td>
2553 <td valign="top" >TBD</td>
2554 </tr>
2555 <tr>
2556 <td valign="top" >Overlay</td>
2557 <td valign="top" >“zpos”</td>
2558 <td valign="top" >RANGE</td>
2559 <td valign="top" >Min=0, Max=MAX_PLANE-1</td>
2560 <td valign="top" >Plane</td>
2561 <td valign="top" >TBD</td>
2562 </tr>
2563 <tr>
4ba08faa 2564 <td rowspan="2" valign="top" >i2c/ch7006_drv</td>
6c6a3996
SK
2565 <td valign="top" >Generic</td>
2566 <td valign="top" >“scale”</td>
2567 <td valign="top" >RANGE</td>
2568 <td valign="top" >Min=0, Max=2</td>
2569 <td valign="top" >Connector</td>
2570 <td valign="top" >TBD</td>
2571 </tr>
2572 <tr>
4ba08faa 2573 <td rowspan="1" valign="top" >TV</td>
6c6a3996
SK
2574 <td valign="top" >“mode”</td>
2575 <td valign="top" >ENUM</td>
2576 <td valign="top" >{ "PAL", "PAL-M","PAL-N"}, ”PAL-Nc"
2577 , "PAL-60", "NTSC-M", "NTSC-J" }</td>
2578 <td valign="top" >Connector</td>
2579 <td valign="top" >TBD</td>
2580 </tr>
2581 <tr>
4ba08faa 2582 <td rowspan="15" valign="top" >nouveau</td>
6c6a3996
SK
2583 <td rowspan="6" valign="top" >NV10 Overlay</td>
2584 <td valign="top" >"colorkey"</td>
2585 <td valign="top" >RANGE</td>
2586 <td valign="top" >Min=0, Max=0x01ffffff</td>
2587 <td valign="top" >Plane</td>
2588 <td valign="top" >TBD</td>
2589 </tr>
2590 <tr>
2591 <td valign="top" >“contrast”</td>
2592 <td valign="top" >RANGE</td>
2593 <td valign="top" >Min=0, Max=8192-1</td>
2594 <td valign="top" >Plane</td>
2595 <td valign="top" >TBD</td>
2596 </tr>
2597 <tr>
2598 <td valign="top" >“brightness”</td>
2599 <td valign="top" >RANGE</td>
2600 <td valign="top" >Min=0, Max=1024</td>
2601 <td valign="top" >Plane</td>
2602 <td valign="top" >TBD</td>
2603 </tr>
2604 <tr>
2605 <td valign="top" >“hue”</td>
2606 <td valign="top" >RANGE</td>
2607 <td valign="top" >Min=0, Max=359</td>
2608 <td valign="top" >Plane</td>
2609 <td valign="top" >TBD</td>
2610 </tr>
2611 <tr>
2612 <td valign="top" >“saturation”</td>
2613 <td valign="top" >RANGE</td>
2614 <td valign="top" >Min=0, Max=8192-1</td>
2615 <td valign="top" >Plane</td>
2616 <td valign="top" >TBD</td>
2617 </tr>
2618 <tr>
2619 <td valign="top" >“iturbt_709”</td>
2620 <td valign="top" >RANGE</td>
2621 <td valign="top" >Min=0, Max=1</td>
2622 <td valign="top" >Plane</td>
2623 <td valign="top" >TBD</td>
2624 </tr>
2625 <tr>
2626 <td rowspan="2" valign="top" >Nv04 Overlay</td>
2627 <td valign="top" >“colorkey”</td>
2628 <td valign="top" >RANGE</td>
2629 <td valign="top" >Min=0, Max=0x01ffffff</td>
2630 <td valign="top" >Plane</td>
2631 <td valign="top" >TBD</td>
2632 </tr>
2633 <tr>
2634 <td valign="top" >“brightness”</td>
2635 <td valign="top" >RANGE</td>
2636 <td valign="top" >Min=0, Max=1024</td>
2637 <td valign="top" >Plane</td>
2638 <td valign="top" >TBD</td>
2639 </tr>
2640 <tr>
2641 <td rowspan="7" valign="top" >Display</td>
2642 <td valign="top" >“dithering mode”</td>
2643 <td valign="top" >ENUM</td>
2644 <td valign="top" >{ "auto", "off", "on" }</td>
2645 <td valign="top" >Connector</td>
2646 <td valign="top" >TBD</td>
2647 </tr>
2648 <tr>
2649 <td valign="top" >“dithering depth”</td>
2650 <td valign="top" >ENUM</td>
2651 <td valign="top" >{ "auto", "off", "on", "static 2x2", "dynamic 2x2", "temporal" }</td>
2652 <td valign="top" >Connector</td>
2653 <td valign="top" >TBD</td>
2654 </tr>
2655 <tr>
2656 <td valign="top" >“underscan”</td>
2657 <td valign="top" >ENUM</td>
2658 <td valign="top" >{ "auto", "6 bpc", "8 bpc" }</td>
2659 <td valign="top" >Connector</td>
2660 <td valign="top" >TBD</td>
2661 </tr>
2662 <tr>
2663 <td valign="top" >“underscan hborder”</td>
2664 <td valign="top" >RANGE</td>
2665 <td valign="top" >Min=0, Max=128</td>
2666 <td valign="top" >Connector</td>
2667 <td valign="top" >TBD</td>
2668 </tr>
2669 <tr>
2670 <td valign="top" >“underscan vborder”</td>
2671 <td valign="top" >RANGE</td>
2672 <td valign="top" >Min=0, Max=128</td>
2673 <td valign="top" >Connector</td>
2674 <td valign="top" >TBD</td>
2675 </tr>
2676 <tr>
2677 <td valign="top" >“vibrant hue”</td>
2678 <td valign="top" >RANGE</td>
2679 <td valign="top" >Min=0, Max=180</td>
2680 <td valign="top" >Connector</td>
2681 <td valign="top" >TBD</td>
2682 </tr>
2683 <tr>
2684 <td valign="top" >“color vibrance”</td>
2685 <td valign="top" >RANGE</td>
2686 <td valign="top" >Min=0, Max=200</td>
2687 <td valign="top" >Connector</td>
2688 <td valign="top" >TBD</td>
2689 </tr>
2690 <tr>
d4acc165 2691 <td valign="top" >omap</td>
712a0dd9 2692 <td valign="top" >Generic</td>
6c6a3996
SK
2693 <td valign="top" >“zorder”</td>
2694 <td valign="top" >RANGE</td>
2695 <td valign="top" >Min=0, Max=3</td>
2696 <td valign="top" >CRTC, Plane</td>
2697 <td valign="top" >TBD</td>
2698 </tr>
2699 <tr>
2700 <td valign="top" >qxl</td>
2701 <td valign="top" >Generic</td>
2702 <td valign="top" >“hotplug_mode_update"</td>
2703 <td valign="top" >RANGE</td>
2704 <td valign="top" >Min=0, Max=1</td>
2705 <td valign="top" >Connector</td>
2706 <td valign="top" >TBD</td>
2707 </tr>
2708 <tr>
4ba08faa 2709 <td rowspan="9" valign="top" >radeon</td>
6c6a3996
SK
2710 <td valign="top" >DVI-I</td>
2711 <td valign="top" >“coherent”</td>
2712 <td valign="top" >RANGE</td>
2713 <td valign="top" >Min=0, Max=1</td>
2714 <td valign="top" >Connector</td>
2715 <td valign="top" >TBD</td>
2716 </tr>
2717 <tr>
2718 <td valign="top" >DAC enable load detect</td>
2719 <td valign="top" >“load detection”</td>
2720 <td valign="top" >RANGE</td>
2721 <td valign="top" >Min=0, Max=1</td>
2722 <td valign="top" >Connector</td>
2723 <td valign="top" >TBD</td>
2724 </tr>
2725 <tr>
2726 <td valign="top" >TV Standard</td>
2727 <td valign="top" >"tv standard"</td>
2728 <td valign="top" >ENUM</td>
2729 <td valign="top" >{ "ntsc", "pal", "pal-m", "pal-60", "ntsc-j"
2730 , "scart-pal", "pal-cn", "secam" }</td>
2731 <td valign="top" >Connector</td>
2732 <td valign="top" >TBD</td>
2733 </tr>
2734 <tr>
2735 <td valign="top" >legacy TMDS PLL detect</td>
2736 <td valign="top" >"tmds_pll"</td>
2737 <td valign="top" >ENUM</td>
2738 <td valign="top" >{ "driver", "bios" }</td>
2739 <td valign="top" >-</td>
2740 <td valign="top" >TBD</td>
2741 </tr>
2742 <tr>
2743 <td rowspan="3" valign="top" >Underscan</td>
2744 <td valign="top" >"underscan"</td>
2745 <td valign="top" >ENUM</td>
2746 <td valign="top" >{ "off", "on", "auto" }</td>
2747 <td valign="top" >Connector</td>
2748 <td valign="top" >TBD</td>
2749 </tr>
2750 <tr>
2751 <td valign="top" >"underscan hborder"</td>
2752 <td valign="top" >RANGE</td>
2753 <td valign="top" >Min=0, Max=128</td>
2754 <td valign="top" >Connector</td>
2755 <td valign="top" >TBD</td>
2756 </tr>
2757 <tr>
2758 <td valign="top" >"underscan vborder"</td>
2759 <td valign="top" >RANGE</td>
2760 <td valign="top" >Min=0, Max=128</td>
2761 <td valign="top" >Connector</td>
2762 <td valign="top" >TBD</td>
2763 </tr>
2764 <tr>
2765 <td valign="top" >Audio</td>
2766 <td valign="top" >“audio”</td>
2767 <td valign="top" >ENUM</td>
2768 <td valign="top" >{ "off", "on", "auto" }</td>
2769 <td valign="top" >Connector</td>
2770 <td valign="top" >TBD</td>
2771 </tr>
2772 <tr>
2773 <td valign="top" >FMT Dithering</td>
2774 <td valign="top" >“dither”</td>
2775 <td valign="top" >ENUM</td>
2776 <td valign="top" >{ "off", "on" }</td>
2777 <td valign="top" >Connector</td>
2778 <td valign="top" >TBD</td>
2779 </tr>
2780 <tr>
6c6a3996
SK
2781 <td rowspan="3" valign="top" >rcar-du</td>
2782 <td rowspan="3" valign="top" >Generic</td>
2783 <td valign="top" >"alpha"</td>
2784 <td valign="top" >RANGE</td>
2785 <td valign="top" >Min=0, Max=255</td>
2786 <td valign="top" >Plane</td>
2787 <td valign="top" >TBD</td>
2788 </tr>
2789 <tr>
2790 <td valign="top" >"colorkey"</td>
2791 <td valign="top" >RANGE</td>
2792 <td valign="top" >Min=0, Max=0x01ffffff</td>
2793 <td valign="top" >Plane</td>
2794 <td valign="top" >TBD</td>
2795 </tr>
2796 <tr>
2797 <td valign="top" >"zpos"</td>
2798 <td valign="top" >RANGE</td>
2799 <td valign="top" >Min=1, Max=7</td>
2800 <td valign="top" >Plane</td>
2801 <td valign="top" >TBD</td>
2802 </tr>
2803 </tbody>
2804 </table>
2805 </sect2>
2d2ef822
JB
2806 </sect1>
2807
9cad9c95
LP
2808 <!-- Internals: vertical blanking -->
2809
2810 <sect1 id="drm-vertical-blank">
2811 <title>Vertical Blanking</title>
2812 <para>
2813 Vertical blanking plays a major role in graphics rendering. To achieve
2814 tear-free display, users must synchronize page flips and/or rendering to
2815 vertical blanking. The DRM API offers ioctls to perform page flips
2816 synchronized to vertical blanking and wait for vertical blanking.
2817 </para>
2818 <para>
2819 The DRM core handles most of the vertical blanking management logic, which
2820 involves filtering out spurious interrupts, keeping race-free blanking
2821 counters, coping with counter wrap-around and resets and keeping use
2822 counts. It relies on the driver to generate vertical blanking interrupts
2823 and optionally provide a hardware vertical blanking counter. Drivers must
2824 implement the following operations.
2825 </para>
2826 <itemizedlist>
2827 <listitem>
2828 <synopsis>int (*enable_vblank) (struct drm_device *dev, int crtc);
2829void (*disable_vblank) (struct drm_device *dev, int crtc);</synopsis>
2830 <para>
2831 Enable or disable vertical blanking interrupts for the given CRTC.
2832 </para>
2833 </listitem>
2834 <listitem>
2835 <synopsis>u32 (*get_vblank_counter) (struct drm_device *dev, int crtc);</synopsis>
2836 <para>
2837 Retrieve the value of the vertical blanking counter for the given
2838 CRTC. If the hardware maintains a vertical blanking counter its value
2839 should be returned. Otherwise drivers can use the
2840 <function>drm_vblank_count</function> helper function to handle this
2841 operation.
2842 </para>
2843 </listitem>
2844 </itemizedlist>
2d2ef822 2845 <para>
9cad9c95
LP
2846 Drivers must initialize the vertical blanking handling core with a call to
2847 <function>drm_vblank_init</function> in their
2848 <methodname>load</methodname> operation. The function will set the struct
2849 <structname>drm_device</structname>
2850 <structfield>vblank_disable_allowed</structfield> field to 0. This will
2851 keep vertical blanking interrupts enabled permanently until the first mode
2852 set operation, where <structfield>vblank_disable_allowed</structfield> is
2853 set to 1. The reason behind this is not clear. Drivers can set the field
2854 to 1 after <function>calling drm_vblank_init</function> to make vertical
2855 blanking interrupts dynamically managed from the beginning.
2d2ef822 2856 </para>
9cad9c95
LP
2857 <para>
2858 Vertical blanking interrupts can be enabled by the DRM core or by drivers
2859 themselves (for instance to handle page flipping operations). The DRM core
2860 maintains a vertical blanking use count to ensure that the interrupts are
2861 not disabled while a user still needs them. To increment the use count,
2862 drivers call <function>drm_vblank_get</function>. Upon return vertical
2863 blanking interrupts are guaranteed to be enabled.
2864 </para>
2865 <para>
2866 To decrement the use count drivers call
2867 <function>drm_vblank_put</function>. Only when the use count drops to zero
2868 will the DRM core disable the vertical blanking interrupts after a delay
2869 by scheduling a timer. The delay is accessible through the vblankoffdelay
2870 module parameter or the <varname>drm_vblank_offdelay</varname> global
2871 variable and expressed in milliseconds. Its default value is 5000 ms.
4ed0ce3d 2872 Zero means never disable, and a negative value means disable immediately.
00185e66
VS
2873 Drivers may override the behaviour by setting the
2874 <structname>drm_device</structname>
2875 <structfield>vblank_disable_immediate</structfield> flag, which when set
2876 causes vblank interrupts to be disabled immediately regardless of the
2877 drm_vblank_offdelay value. The flag should only be set if there's a
2878 properly working hardware vblank counter present.
9cad9c95
LP
2879 </para>
2880 <para>
2881 When a vertical blanking interrupt occurs drivers only need to call the
2882 <function>drm_handle_vblank</function> function to account for the
2883 interrupt.
2884 </para>
2885 <para>
2886 Resources allocated by <function>drm_vblank_init</function> must be freed
2887 with a call to <function>drm_vblank_cleanup</function> in the driver
2888 <methodname>unload</methodname> operation handler.
2889 </para>
f5752b38
DV
2890 <sect2>
2891 <title>Vertical Blanking and Interrupt Handling Functions Reference</title>
2892!Edrivers/gpu/drm/drm_irq.c
d743ecf3 2893!Finclude/drm/drmP.h drm_crtc_vblank_waitqueue
f5752b38 2894 </sect2>
9cad9c95
LP
2895 </sect1>
2896
2897 <!-- Internals: open/close, file operations and ioctls -->
2d2ef822 2898
9cad9c95
LP
2899 <sect1>
2900 <title>Open/Close, File Operations and IOCTLs</title>
2d2ef822 2901 <sect2>
9cad9c95
LP
2902 <title>Open and Close</title>
2903 <synopsis>int (*firstopen) (struct drm_device *);
2904void (*lastclose) (struct drm_device *);
2905int (*open) (struct drm_device *, struct drm_file *);
2906void (*preclose) (struct drm_device *, struct drm_file *);
2907void (*postclose) (struct drm_device *, struct drm_file *);</synopsis>
2908 <abstract>Open and close handlers. None of those methods are mandatory.
2909 </abstract>
2d2ef822 2910 <para>
9cad9c95 2911 The <methodname>firstopen</methodname> method is called by the DRM core
7d14bb6b
DV
2912 for legacy UMS (User Mode Setting) drivers only when an application
2913 opens a device that has no other opened file handle. UMS drivers can
2914 implement it to acquire device resources. KMS drivers can't use the
2915 method and must acquire resources in the <methodname>load</methodname>
2916 method instead.
2d2ef822
JB
2917 </para>
2918 <para>
7d14bb6b
DV
2919 Similarly the <methodname>lastclose</methodname> method is called when
2920 the last application holding a file handle opened on the device closes
2921 it, for both UMS and KMS drivers. Additionally, the method is also
2922 called at module unload time or, for hot-pluggable devices, when the
2923 device is unplugged. The <methodname>firstopen</methodname> and
9cad9c95 2924 <methodname>lastclose</methodname> calls can thus be unbalanced.
2d2ef822
JB
2925 </para>
2926 <para>
9cad9c95
LP
2927 The <methodname>open</methodname> method is called every time the device
2928 is opened by an application. Drivers can allocate per-file private data
2929 in this method and store them in the struct
2930 <structname>drm_file</structname> <structfield>driver_priv</structfield>
2931 field. Note that the <methodname>open</methodname> method is called
2932 before <methodname>firstopen</methodname>.
2933 </para>
2934 <para>
2935 The close operation is split into <methodname>preclose</methodname> and
2936 <methodname>postclose</methodname> methods. Drivers must stop and
2937 cleanup all per-file operations in the <methodname>preclose</methodname>
2938 method. For instance pending vertical blanking and page flip events must
2939 be cancelled. No per-file operation is allowed on the file handle after
2940 returning from the <methodname>preclose</methodname> method.
2941 </para>
2942 <para>
2943 Finally the <methodname>postclose</methodname> method is called as the
2944 last step of the close operation, right before calling the
2945 <methodname>lastclose</methodname> method if no other open file handle
2946 exists for the device. Drivers that have allocated per-file private data
2947 in the <methodname>open</methodname> method should free it here.
2948 </para>
2949 <para>
2950 The <methodname>lastclose</methodname> method should restore CRTC and
2951 plane properties to default value, so that a subsequent open of the
7d14bb6b
DV
2952 device will not inherit state from the previous user. It can also be
2953 used to execute delayed power switching state changes, e.g. in
6648f487
LW
2954 conjunction with the vga_switcheroo infrastructure (see
2955 <xref linkend="vga_switcheroo"/>). Beyond that KMS drivers should not
2956 do any further cleanup. Only legacy UMS drivers might need to clean up
2957 device state so that the vga console or an independent fbdev driver
2958 could take over.
2d2ef822
JB
2959 </para>
2960 </sect2>
2d2ef822 2961 <sect2>
9cad9c95 2962 <title>File Operations</title>
bcb877e4
DV
2963!Pdrivers/gpu/drm/drm_fops.c file operations
2964!Edrivers/gpu/drm/drm_fops.c
9cad9c95
LP
2965 </sect2>
2966 <sect2>
2967 <title>IOCTLs</title>
2968 <synopsis>struct drm_ioctl_desc *ioctls;
2969int num_ioctls;</synopsis>
2970 <abstract>Driver-specific ioctls descriptors table.</abstract>
2971 <para>
2972 Driver-specific ioctls numbers start at DRM_COMMAND_BASE. The ioctls
2973 descriptors table is indexed by the ioctl number offset from the base
2974 value. Drivers can use the DRM_IOCTL_DEF_DRV() macro to initialize the
2975 table entries.
2976 </para>
2977 <para>
2978 <programlisting>DRM_IOCTL_DEF_DRV(ioctl, func, flags)</programlisting>
2979 <para>
2980 <parameter>ioctl</parameter> is the ioctl name. Drivers must define
2981 the DRM_##ioctl and DRM_IOCTL_##ioctl macros to the ioctl number
2982 offset from DRM_COMMAND_BASE and the ioctl number respectively. The
2983 first macro is private to the device while the second must be exposed
2984 to userspace in a public header.
2985 </para>
2986 <para>
2987 <parameter>func</parameter> is a pointer to the ioctl handler function
2988 compatible with the <type>drm_ioctl_t</type> type.
2989 <programlisting>typedef int drm_ioctl_t(struct drm_device *dev, void *data,
2990 struct drm_file *file_priv);</programlisting>
2991 </para>
2992 <para>
2993 <parameter>flags</parameter> is a bitmask combination of the following
2994 values. It restricts how the ioctl is allowed to be called.
2995 <itemizedlist>
2996 <listitem><para>
2997 DRM_AUTH - Only authenticated callers allowed
2998 </para></listitem>
2999 <listitem><para>
3000 DRM_MASTER - The ioctl can only be called on the master file
3001 handle
3002 </para></listitem>
3003 <listitem><para>
3004 DRM_ROOT_ONLY - Only callers with the SYSADMIN capability allowed
3005 </para></listitem>
3006 <listitem><para>
3007 DRM_CONTROL_ALLOW - The ioctl can only be called on a control
3008 device
3009 </para></listitem>
3010 <listitem><para>
3011 DRM_UNLOCKED - The ioctl handler will be called without locking
ea487835
DV
3012 the DRM global mutex. This is the enforced default for kms drivers
3013 (i.e. using the DRIVER_MODESET flag) and hence shouldn't be used
3014 any more for new drivers.
9cad9c95
LP
3015 </para></listitem>
3016 </itemizedlist>
3017 </para>
2d2ef822 3018 </para>
0aaf20cf 3019!Edrivers/gpu/drm/drm_ioctl.c
2d2ef822 3020 </sect2>
2d2ef822 3021 </sect1>
2d2ef822 3022 <sect1>
4c6e2dfe 3023 <title>Legacy Support Code</title>
2d2ef822 3024 <para>
9a6594fc 3025 The section very briefly covers some of the old legacy support code which
4c6e2dfe
DV
3026 is only used by old DRM drivers which have done a so-called shadow-attach
3027 to the underlying device instead of registering as a real driver. This
9a6594fc 3028 also includes some of the old generic buffer management and command
4c6e2dfe 3029 submission code. Do not use any of this in new and modern drivers.
2d2ef822 3030 </para>
2d2ef822 3031
4c6e2dfe
DV
3032 <sect2>
3033 <title>Legacy Suspend/Resume</title>
3034 <para>
3035 The DRM core provides some suspend/resume code, but drivers wanting full
3036 suspend/resume support should provide save() and restore() functions.
3037 These are called at suspend, hibernate, or resume time, and should perform
3038 any state save or restore required by your device across suspend or
3039 hibernate states.
3040 </para>
3041 <synopsis>int (*suspend) (struct drm_device *, pm_message_t state);
3042 int (*resume) (struct drm_device *);</synopsis>
3043 <para>
3044 Those are legacy suspend and resume methods which
3045 <emphasis>only</emphasis> work with the legacy shadow-attach driver
3046 registration functions. New driver should use the power management
3047 interface provided by their bus type (usually through
3048 the struct <structname>device_driver</structname> dev_pm_ops) and set
3049 these methods to NULL.
3050 </para>
3051 </sect2>
3052
3053 <sect2>
3054 <title>Legacy DMA Services</title>
3055 <para>
3056 This should cover how DMA mapping etc. is supported by the core.
3057 These functions are deprecated and should not be used.
3058 </para>
3059 </sect2>
2d2ef822
JB
3060 </sect1>
3061 </chapter>
3062
9cad9c95
LP
3063<!-- TODO
3064
3065- Add a glossary
3066- Document the struct_mutex catch-all lock
3067- Document connector properties
3068
3069- Why is the load method optional?
3070- What are drivers supposed to set the initial display state to, and how?
3071 Connector's DPMS states are not initialized and are thus equal to
3072 DRM_MODE_DPMS_ON. The fbcon compatibility layer calls
3073 drm_helper_disable_unused_functions(), which disables unused encoders and
3074 CRTCs, but doesn't touch the connectors' DPMS state, and
3075 drm_helper_connector_dpms() in reaction to fbdev blanking events. Do drivers
3076 that don't implement (or just don't use) fbcon compatibility need to call
3077 those functions themselves?
3078- KMS drivers must call drm_vblank_pre_modeset() and drm_vblank_post_modeset()
3079 around mode setting. Should this be done in the DRM core?
3080- vblank_disable_allowed is set to 1 in the first drm_vblank_post_modeset()
3081 call and never set back to 0. It seems to be safe to permanently set it to 1
3082 in drm_vblank_init() for KMS driver, and it might be safe for UMS drivers as
3083 well. This should be investigated.
3084- crtc and connector .save and .restore operations are only used internally in
3085 drivers, should they be removed from the core?
3086- encoder mid-layer .save and .restore operations are only used internally in
3087 drivers, should they be removed from the core?
3088- encoder mid-layer .detect operation is only used internally in drivers,
3089 should it be removed from the core?
3090-->
3091
2d2ef822
JB
3092 <!-- External interfaces -->
3093
3094 <chapter id="drmExternals">
3095 <title>Userland interfaces</title>
3096 <para>
3097 The DRM core exports several interfaces to applications,
3098 generally intended to be used through corresponding libdrm
a5294e01 3099 wrapper functions. In addition, drivers export device-specific
7f0925ac 3100 interfaces for use by userspace drivers &amp; device-aware
2d2ef822
JB
3101 applications through ioctls and sysfs files.
3102 </para>
3103 <para>
3104 External interfaces include: memory mapping, context management,
3105 DMA operations, AGP management, vblank control, fence
3106 management, memory management, and output management.
3107 </para>
3108 <para>
bcd3cfc1
MW
3109 Cover generic ioctls and sysfs layout here. We only need high-level
3110 info, since man pages should cover the rest.
2d2ef822 3111 </para>
9cad9c95 3112
1793126f
DH
3113 <!-- External: render nodes -->
3114
3115 <sect1>
3116 <title>Render nodes</title>
3117 <para>
3118 DRM core provides multiple character-devices for user-space to use.
3119 Depending on which device is opened, user-space can perform a different
3120 set of operations (mainly ioctls). The primary node is always created
00153aeb
DV
3121 and called card&lt;num&gt;. Additionally, a currently
3122 unused control node, called controlD&lt;num&gt; is also
1793126f
DH
3123 created. The primary node provides all legacy operations and
3124 historically was the only interface used by userspace. With KMS, the
3125 control node was introduced. However, the planned KMS control interface
3126 has never been written and so the control node stays unused to date.
3127 </para>
3128 <para>
3129 With the increased use of offscreen renderers and GPGPU applications,
3130 clients no longer require running compositors or graphics servers to
3131 make use of a GPU. But the DRM API required unprivileged clients to
3132 authenticate to a DRM-Master prior to getting GPU access. To avoid this
3133 step and to grant clients GPU access without authenticating, render
3134 nodes were introduced. Render nodes solely serve render clients, that
3135 is, no modesetting or privileged ioctls can be issued on render nodes.
3136 Only non-global rendering commands are allowed. If a driver supports
00153aeb 3137 render nodes, it must advertise it via the DRIVER_RENDER
1793126f
DH
3138 DRM driver capability. If not supported, the primary node must be used
3139 for render clients together with the legacy drmAuth authentication
3140 procedure.
3141 </para>
3142 <para>
3143 If a driver advertises render node support, DRM core will create a
00153aeb 3144 separate render node called renderD&lt;num&gt;. There will
1793126f 3145 be one render node per device. No ioctls except PRIME-related ioctls
00153aeb 3146 will be allowed on this node. Especially GEM_OPEN will be
1793126f
DH
3147 explicitly prohibited. Render nodes are designed to avoid the
3148 buffer-leaks, which occur if clients guess the flink names or mmap
3149 offsets on the legacy interface. Additionally to this basic interface,
3150 drivers must mark their driver-dependent render-only ioctls as
00153aeb 3151 DRM_RENDER_ALLOW so render clients can use them. Driver
1793126f
DH
3152 authors must be careful not to allow any privileged ioctls on render
3153 nodes.
3154 </para>
3155 <para>
3156 With render nodes, user-space can now control access to the render node
3157 via basic file-system access-modes. A running graphics server which
3158 authenticates clients on the privileged primary/legacy node is no longer
3159 required. Instead, a client can open the render node and is immediately
3160 granted GPU access. Communication between clients (or servers) is done
3161 via PRIME. FLINK from render node to legacy node is not supported. New
3162 clients must not use the insecure FLINK interface.
3163 </para>
3164 <para>
3165 Besides dropping all modeset/global ioctls, render nodes also drop the
3166 DRM-Master concept. There is no reason to associate render clients with
3167 a DRM-Master as they are independent of any graphics server. Besides,
3168 they must work without any running master, anyway.
3169 Drivers must be able to run without a master object if they support
3170 render nodes. If, on the other hand, a driver requires shared state
3171 between clients which is visible to user-space and accessible beyond
3172 open-file boundaries, they cannot support render nodes.
3173 </para>
3174 </sect1>
3175
9cad9c95
LP
3176 <!-- External: vblank handling -->
3177
3178 <sect1>
3179 <title>VBlank event handling</title>
3180 <para>
3181 The DRM core exposes two vertical blank related ioctls:
3182 <variablelist>
3183 <varlistentry>
3184 <term>DRM_IOCTL_WAIT_VBLANK</term>
3185 <listitem>
3186 <para>
3187 This takes a struct drm_wait_vblank structure as its argument,
3188 and it is used to block or request a signal when a specified
3189 vblank event occurs.
3190 </para>
3191 </listitem>
3192 </varlistentry>
3193 <varlistentry>
3194 <term>DRM_IOCTL_MODESET_CTL</term>
3195 <listitem>
3196 <para>
8edffbb9
DV
3197 This was only used for user-mode-settind drivers around
3198 modesetting changes to allow the kernel to update the vblank
3199 interrupt after mode setting, since on many devices the vertical
3200 blank counter is reset to 0 at some point during modeset. Modern
3201 drivers should not call this any more since with kernel mode
3202 setting it is a no-op.
9cad9c95
LP
3203 </para>
3204 </listitem>
3205 </varlistentry>
3206 </variablelist>
9cad9c95
LP
3207 </para>
3208 </sect1>
3209
2d2ef822 3210 </chapter>
3519f70e
DV
3211</part>
3212<part id="drmDrivers">
3213 <title>DRM Drivers</title>
2d2ef822 3214
3519f70e
DV
3215 <partintro>
3216 <para>
7f817074
LW
3217 This second part of the GPU Driver Developer's Guide documents driver
3218 code, implementation details and also all the driver-specific userspace
3519f70e
DV
3219 interfaces. Especially since all hardware-acceleration interfaces to
3220 userspace are driver specific for efficiency and other reasons these
3221 interfaces can be rather substantial. Hence every driver has its own
3222 chapter.
3223 </para>
3224 </partintro>
2d2ef822 3225
3519f70e
DV
3226 <chapter id="drmI915">
3227 <title>drm/i915 Intel GFX Driver</title>
2d2ef822 3228 <para>
3519f70e
DV
3229 The drm/i915 driver supports all (with the exception of some very early
3230 models) integrated GFX chipsets with both Intel display and rendering
3231 blocks. This excludes a set of SoC platforms with an SGX rendering unit,
3232 those have basic support through the gma500 drm driver.
2d2ef822 3233 </para>
e4e7684f
DV
3234 <sect1>
3235 <title>Core Driver Infrastructure</title>
3236 <para>
3237 This section covers core driver infrastructure used by both the display
3238 and the GEM parts of the driver.
3239 </para>
3240 <sect2>
3241 <title>Runtime Power Management</title>
3242!Pdrivers/gpu/drm/i915/intel_runtime_pm.c runtime pm
3243!Idrivers/gpu/drm/i915/intel_runtime_pm.c
397f6fa6 3244!Idrivers/gpu/drm/i915/intel_uncore.c
e4e7684f 3245 </sect2>
fca52a55
DV
3246 <sect2>
3247 <title>Interrupt Handling</title>
3248!Pdrivers/gpu/drm/i915/i915_irq.c interrupt handling
3249!Fdrivers/gpu/drm/i915/i915_irq.c intel_irq_init intel_irq_init_hw intel_hpd_init
fca52a55
DV
3250!Fdrivers/gpu/drm/i915/i915_irq.c intel_runtime_pm_disable_interrupts
3251!Fdrivers/gpu/drm/i915/i915_irq.c intel_runtime_pm_enable_interrupts
3252 </sect2>
cf9d2890
YZ
3253 <sect2>
3254 <title>Intel GVT-g Guest Support(vGPU)</title>
3255!Pdrivers/gpu/drm/i915/i915_vgpu.c Intel GVT-g guest support
3256!Idrivers/gpu/drm/i915/i915_vgpu.c
3257 </sect2>
e4e7684f 3258 </sect1>
3519f70e
DV
3259 <sect1>
3260 <title>Display Hardware Handling</title>
3261 <para>
3262 This section covers everything related to the display hardware including
3263 the mode setting infrastructure, plane, sprite and cursor handling and
3264 display, output probing and related topics.
3265 </para>
3266 <sect2>
3267 <title>Mode Setting Infrastructure</title>
3268 <para>
3269 The i915 driver is thus far the only DRM driver which doesn't use the
3270 common DRM helper code to implement mode setting sequences. Thus it
3271 has its own tailor-made infrastructure for executing a display
3272 configuration change.
3273 </para>
3274 </sect2>
b680c37a
DV
3275 <sect2>
3276 <title>Frontbuffer Tracking</title>
3277!Pdrivers/gpu/drm/i915/intel_frontbuffer.c frontbuffer tracking
3278!Idrivers/gpu/drm/i915/intel_frontbuffer.c
b680c37a 3279!Fdrivers/gpu/drm/i915/i915_gem.c i915_gem_track_fb
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DV
3280 </sect2>
3281 <sect2>
3282 <title>Display FIFO Underrun Reporting</title>
3283!Pdrivers/gpu/drm/i915/intel_fifo_underrun.c fifo underrun handling
3284!Idrivers/gpu/drm/i915/intel_fifo_underrun.c
b680c37a 3285 </sect2>
3519f70e
DV
3286 <sect2>
3287 <title>Plane Configuration</title>
3288 <para>
3289 This section covers plane configuration and composition with the
3290 primary plane, sprites, cursors and overlays. This includes the
3291 infrastructure to do atomic vsync'ed updates of all this state and
3292 also tightly coupled topics like watermark setup and computation,
3293 framebuffer compression and panel self refresh.
3294 </para>
3295 </sect2>
ea2c67bb
MR
3296 <sect2>
3297 <title>Atomic Plane Helpers</title>
3298!Pdrivers/gpu/drm/i915/intel_atomic_plane.c atomic plane helpers
3299!Idrivers/gpu/drm/i915/intel_atomic_plane.c
3300 </sect2>
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3301 <sect2>
3302 <title>Output Probing</title>
3303 <para>
3304 This section covers output probing and related infrastructure like the
3305 hotplug interrupt storm detection and mitigation code. Note that the
3306 i915 driver still uses most of the common DRM helper code for output
3307 probing, so those sections fully apply.
3308 </para>
3309 </sect2>
856974a4
JN
3310 <sect2>
3311 <title>Hotplug</title>
3312!Pdrivers/gpu/drm/i915/intel_hotplug.c Hotplug
3313!Idrivers/gpu/drm/i915/intel_hotplug.c
3314 </sect2>
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JN
3315 <sect2>
3316 <title>High Definition Audio</title>
3317!Pdrivers/gpu/drm/i915/intel_audio.c High Definition Audio over HDMI and Display Port
3318!Idrivers/gpu/drm/i915/intel_audio.c
cb422619 3319!Iinclude/drm/i915_component.h
b2b89f55
RV
3320 </sect2>
3321 <sect2>
3322 <title>Panel Self Refresh PSR (PSR/SRD)</title>
3323!Pdrivers/gpu/drm/i915/intel_psr.c Panel Self Refresh (PSR/SRD)
3324!Idrivers/gpu/drm/i915/intel_psr.c
94b83957
RV
3325 </sect2>
3326 <sect2>
3327 <title>Frame Buffer Compression (FBC)</title>
3328!Pdrivers/gpu/drm/i915/intel_fbc.c Frame Buffer Compression (FBC)
3329!Idrivers/gpu/drm/i915/intel_fbc.c
b33a2815
VK
3330 </sect2>
3331 <sect2>
3332 <title>Display Refresh Rate Switching (DRRS)</title>
3333!Pdrivers/gpu/drm/i915/intel_dp.c Display Refresh Rate Switching (DRRS)
3334!Fdrivers/gpu/drm/i915/intel_dp.c intel_dp_set_drrs_state
3335!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_enable
3336!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_disable
3337!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_invalidate
3338!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_flush
3339!Fdrivers/gpu/drm/i915/intel_dp.c intel_dp_drrs_init
3340
28855d2a 3341 </sect2>
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VS
3342 <sect2>
3343 <title>DPIO</title>
3344!Pdrivers/gpu/drm/i915/i915_reg.h DPIO
3345 </sect2>
aa9145c4
AM
3346
3347 <sect2>
3348 <title>CSR firmware support for DMC</title>
3349!Pdrivers/gpu/drm/i915/intel_csr.c csr support for dmc
3350!Idrivers/gpu/drm/i915/intel_csr.c
3351 </sect2>
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JN
3352 <sect2>
3353 <title>Video BIOS Table (VBT)</title>
3354!Pdrivers/gpu/drm/i915/intel_bios.c Video BIOS Table (VBT)
3355!Idrivers/gpu/drm/i915/intel_bios.c
72341af4 3356!Idrivers/gpu/drm/i915/intel_vbt_defs.h
dd97950a 3357 </sect2>
3519f70e 3358 </sect1>
2d2ef822 3359
3519f70e
DV
3360 <sect1>
3361 <title>Memory Management and Command Submission</title>
3362 <para>
3363 This sections covers all things related to the GEM implementation in the
3364 i915 driver.
3365 </para>
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DV
3366 <sect2>
3367 <title>Batchbuffer Parsing</title>
3368!Pdrivers/gpu/drm/i915/i915_cmd_parser.c batch buffer command parser
3369!Idrivers/gpu/drm/i915/i915_cmd_parser.c
493018dc
BV
3370 </sect2>
3371 <sect2>
3372 <title>Batchbuffer Pools</title>
3373!Pdrivers/gpu/drm/i915/i915_gem_batch_pool.c batch pool
3374!Idrivers/gpu/drm/i915/i915_gem_batch_pool.c
122b2505 3375 </sect2>
73e4d07f
OM
3376 <sect2>
3377 <title>Logical Rings, Logical Ring Contexts and Execlists</title>
3378!Pdrivers/gpu/drm/i915/intel_lrc.c Logical Rings, Logical Ring Contexts and Execlists
3379!Idrivers/gpu/drm/i915/intel_lrc.c
3380 </sect2>
45f8f69a
TU
3381 <sect2>
3382 <title>Global GTT views</title>
3383!Pdrivers/gpu/drm/i915/i915_gem_gtt.c Global GTT views
3384!Idrivers/gpu/drm/i915/i915_gem_gtt.c
a794f62a
DV
3385 </sect2>
3386 <sect2>
3271dca4 3387 <title>GTT Fences and Swizzling</title>
a794f62a 3388!Idrivers/gpu/drm/i915/i915_gem_fence.c
3271dca4
DV
3389 <sect3>
3390 <title>Global GTT Fence Handling</title>
3391!Pdrivers/gpu/drm/i915/i915_gem_fence.c fence register handling
3392 </sect3>
3393 <sect3>
3394 <title>Hardware Tiling and Swizzling Details</title>
3395!Pdrivers/gpu/drm/i915/i915_gem_fence.c tiling swizzling details
3396 </sect3>
3397 </sect2>
3398 <sect2>
3399 <title>Object Tiling IOCTLs</title>
3400!Idrivers/gpu/drm/i915/i915_gem_tiling.c
3401!Pdrivers/gpu/drm/i915/i915_gem_tiling.c buffer object tiling
45f8f69a 3402 </sect2>
7838a63a
DV
3403 <sect2>
3404 <title>Buffer Object Eviction</title>
3405 <para>
eb0b44ad 3406 This section documents the interface functions for evicting buffer
7838a63a
DV
3407 objects to make space available in the virtual gpu address spaces.
3408 Note that this is mostly orthogonal to shrinking buffer objects
3409 caches, which has the goal to make main memory (shared with the gpu
3410 through the unified memory architecture) available.
3411 </para>
3412!Idrivers/gpu/drm/i915/i915_gem_evict.c
3413 </sect2>
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DV
3414 <sect2>
3415 <title>Buffer Object Memory Shrinking</title>
3416 <para>
3417 This section documents the interface function for shrinking memory
3418 usage of buffer object caches. Shrinking is used to make main memory
3419 available. Note that this is mostly orthogonal to evicting buffer
3420 objects, which has the goal to make space in gpu virtual address
3421 spaces.
3422 </para>
3423!Idrivers/gpu/drm/i915/i915_gem_shrinker.c
3424 </sect2>
3519f70e 3425 </sect1>
d1675198 3426 <sect1>
feda33ef 3427 <title>GuC</title>
d1675198 3428 <sect2>
feda33ef 3429 <title>GuC-specific firmware loader</title>
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AD
3430!Pdrivers/gpu/drm/i915/intel_guc_loader.c GuC-specific firmware loader
3431!Idrivers/gpu/drm/i915/intel_guc_loader.c
3432 </sect2>
3433 <sect2>
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AD
3434 <title>GuC-based command submission</title>
3435!Pdrivers/gpu/drm/i915/i915_guc_submission.c GuC-based command submission
cff4f55b 3436!Idrivers/gpu/drm/i915/i915_guc_submission.c
d1675198 3437 </sect2>
feda33ef
AD
3438 <sect2>
3439 <title>GuC Firmware Layout</title>
3440!Pdrivers/gpu/drm/i915/intel_guc_fwif.h GuC Firmware Layout
3441 </sect2>
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AD
3442 </sect1>
3443
198c974d
DCS
3444 <sect1>
3445 <title> Tracing </title>
3446 <para>
3447 This sections covers all things related to the tracepoints implemented in
3448 the i915 driver.
3449 </para>
3450 <sect2>
3451 <title> i915_ppgtt_create and i915_ppgtt_release </title>
3452!Pdrivers/gpu/drm/i915/i915_trace.h i915_ppgtt_create and i915_ppgtt_release tracepoints
3453 </sect2>
3454 <sect2>
3455 <title> i915_context_create and i915_context_free </title>
3456!Pdrivers/gpu/drm/i915/i915_trace.h i915_context_create and i915_context_free tracepoints
3457 </sect2>
3458 <sect2>
3459 <title> switch_mm </title>
3460!Pdrivers/gpu/drm/i915/i915_trace.h switch_mm tracepoint
3461 </sect2>
3462 </sect1>
3463
3519f70e 3464 </chapter>
fca52a55 3465!Cdrivers/gpu/drm/i915/i915_irq.c
3519f70e 3466</part>
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3467
3468<part id="vga_switcheroo">
3469 <title>vga_switcheroo</title>
3470 <partintro>
3471!Pdrivers/gpu/vga/vga_switcheroo.c Overview
3472 </partintro>
3473
3474 <chapter id="modes_of_use">
3475 <title>Modes of Use</title>
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LW
3476 <sect1>
3477 <title>Manual switching and manual power control</title>
6648f487 3478!Pdrivers/gpu/vga/vga_switcheroo.c Manual switching and manual power control
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LW
3479 </sect1>
3480 <sect1>
3481 <title>Driver power control</title>
6648f487 3482!Pdrivers/gpu/vga/vga_switcheroo.c Driver power control
3a848662 3483 </sect1>
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3484 </chapter>
3485
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3486 <chapter id="api">
3487 <title>API</title>
3488 <sect1>
3489 <title>Public functions</title>
6648f487 3490!Edrivers/gpu/vga/vga_switcheroo.c
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LW
3491 </sect1>
3492 <sect1>
3493 <title>Public structures</title>
6648f487
LW
3494!Finclude/linux/vga_switcheroo.h vga_switcheroo_handler
3495!Finclude/linux/vga_switcheroo.h vga_switcheroo_client_ops
3a848662
LW
3496 </sect1>
3497 <sect1>
3498 <title>Public constants</title>
156d7d41 3499!Finclude/linux/vga_switcheroo.h vga_switcheroo_handler_flags_t
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LW
3500!Finclude/linux/vga_switcheroo.h vga_switcheroo_client_id
3501!Finclude/linux/vga_switcheroo.h vga_switcheroo_state
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3502 </sect1>
3503 <sect1>
3504 <title>Private structures</title>
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3505!Fdrivers/gpu/vga/vga_switcheroo.c vgasr_priv
3506!Fdrivers/gpu/vga/vga_switcheroo.c vga_switcheroo_client
3a848662 3507 </sect1>
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3508 </chapter>
3509
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LW
3510 <chapter id="handlers">
3511 <title>Handlers</title>
3512 <sect1>
3513 <title>apple-gmux Handler</title>
3514!Pdrivers/platform/x86/apple-gmux.c Overview
3515!Pdrivers/platform/x86/apple-gmux.c Interrupt
3516 <sect2>
3517 <title>Graphics mux</title>
3518!Pdrivers/platform/x86/apple-gmux.c Graphics mux
3519 </sect2>
3520 <sect2>
3521 <title>Power control</title>
3522!Pdrivers/platform/x86/apple-gmux.c Power control
3523 </sect2>
3524 <sect2>
3525 <title>Backlight control</title>
3526!Pdrivers/platform/x86/apple-gmux.c Backlight control
3527 </sect2>
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LW
3528 <sect2>
3529 <title>Public functions</title>
3530!Iinclude/linux/apple-gmux.h
3531 </sect2>
3d7b75fd 3532 </sect1>
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LW
3533 </chapter>
3534
3535!Cdrivers/gpu/vga/vga_switcheroo.c
3536!Cinclude/linux/vga_switcheroo.h
3d7b75fd 3537!Cdrivers/platform/x86/apple-gmux.c
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3538</part>
3539
2d2ef822 3540</book>
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