drm: Document drm_encoder/crtc_helper_funcs
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1<?xml version="1.0" encoding="UTF-8"?>
2<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
3 "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
4
7f817074 5<book id="gpuDevelopersGuide">
2d2ef822 6 <bookinfo>
3a4579b4 7 <title>Linux GPU Driver Developer's Guide</title>
2d2ef822 8
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9 <authorgroup>
10 <author>
11 <firstname>Jesse</firstname>
12 <surname>Barnes</surname>
13 <contrib>Initial version</contrib>
14 <affiliation>
15 <orgname>Intel Corporation</orgname>
16 <address>
17 <email>jesse.barnes@intel.com</email>
18 </address>
19 </affiliation>
20 </author>
21 <author>
22 <firstname>Laurent</firstname>
23 <surname>Pinchart</surname>
24 <contrib>Driver internals</contrib>
25 <affiliation>
26 <orgname>Ideas on board SPRL</orgname>
27 <address>
28 <email>laurent.pinchart@ideasonboard.com</email>
29 </address>
30 </affiliation>
31 </author>
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32 <author>
33 <firstname>Daniel</firstname>
34 <surname>Vetter</surname>
35 <contrib>Contributions all over the place</contrib>
36 <affiliation>
37 <orgname>Intel Corporation</orgname>
38 <address>
39 <email>daniel.vetter@ffwll.ch</email>
40 </address>
41 </affiliation>
42 </author>
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43 <author>
44 <firstname>Lukas</firstname>
45 <surname>Wunner</surname>
46 <contrib>vga_switcheroo documentation</contrib>
47 <affiliation>
48 <address>
49 <email>lukas@wunner.de</email>
50 </address>
51 </affiliation>
52 </author>
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53 </authorgroup>
54
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55 <copyright>
56 <year>2008-2009</year>
3a05700d 57 <year>2013-2014</year>
9cad9c95 58 <holder>Intel Corporation</holder>
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59 </copyright>
60 <copyright>
61 <year>2012</year>
9cad9c95 62 <holder>Laurent Pinchart</holder>
2d2ef822 63 </copyright>
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64 <copyright>
65 <year>2015</year>
66 <holder>Lukas Wunner</holder>
67 </copyright>
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68
69 <legalnotice>
70 <para>
71 The contents of this file may be used under the terms of the GNU
72 General Public License version 2 (the "GPL") as distributed in
73 the kernel source COPYING file.
74 </para>
75 </legalnotice>
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76
77 <revhistory>
78 <!-- Put document revisions here, newest first. -->
79 <revision>
80 <revnumber>1.0</revnumber>
81 <date>2012-07-13</date>
82 <authorinitials>LP</authorinitials>
83 <revremark>Added extensive documentation about driver internals.
84 </revremark>
85 </revision>
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86 <revision>
87 <revnumber>1.1</revnumber>
88 <date>2015-10-11</date>
89 <authorinitials>LW</authorinitials>
90 <revremark>Added vga_switcheroo documentation.
91 </revremark>
92 </revision>
9cad9c95 93 </revhistory>
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94 </bookinfo>
95
96<toc></toc>
97
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98<part id="drmCore">
99 <title>DRM Core</title>
100 <partintro>
101 <para>
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102 This first part of the GPU Driver Developer's Guide documents core DRM
103 code, helper libraries for writing drivers and generic userspace
104 interfaces exposed by DRM drivers.
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105 </para>
106 </partintro>
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107
108 <chapter id="drmIntroduction">
109 <title>Introduction</title>
110 <para>
111 The Linux DRM layer contains code intended to support the needs
112 of complex graphics devices, usually containing programmable
113 pipelines well suited to 3D graphics acceleration. Graphics
f11aca04 114 drivers in the kernel may make use of DRM functions to make
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115 tasks like memory management, interrupt handling and DMA easier,
116 and provide a uniform interface to applications.
117 </para>
118 <para>
119 A note on versions: this guide covers features found in the DRM
120 tree, including the TTM memory manager, output configuration and
121 mode setting, and the new vblank internals, in addition to all
122 the regular features found in current kernels.
123 </para>
124 <para>
125 [Insert diagram of typical DRM stack here]
126 </para>
127 </chapter>
128
129 <!-- Internals -->
130
131 <chapter id="drmInternals">
132 <title>DRM Internals</title>
133 <para>
134 This chapter documents DRM internals relevant to driver authors
135 and developers working to add support for the latest features to
136 existing drivers.
137 </para>
138 <para>
a78f6787 139 First, we go over some typical driver initialization
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140 requirements, like setting up command buffers, creating an
141 initial output configuration, and initializing core services.
a78f6787 142 Subsequent sections cover core internals in more detail,
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143 providing implementation notes and examples.
144 </para>
145 <para>
146 The DRM layer provides several services to graphics drivers,
147 many of them driven by the application interfaces it provides
148 through libdrm, the library that wraps most of the DRM ioctls.
149 These include vblank event handling, memory
150 management, output management, framebuffer management, command
151 submission &amp; fencing, suspend/resume support, and DMA
152 services.
153 </para>
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154
155 <!-- Internals: driver init -->
156
157 <sect1>
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158 <title>Driver Initialization</title>
159 <para>
160 At the core of every DRM driver is a <structname>drm_driver</structname>
161 structure. Drivers typically statically initialize a drm_driver structure,
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162 and then pass it to <function>drm_dev_alloc()</function> to allocate a
163 device instance. After the device instance is fully initialized it can be
164 registered (which makes it accessible from userspace) using
165 <function>drm_dev_register()</function>.
b528ae71 166 </para>
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167 <para>
168 The <structname>drm_driver</structname> structure contains static
169 information that describes the driver and features it supports, and
170 pointers to methods that the DRM core will call to implement the DRM API.
171 We will first go through the <structname>drm_driver</structname> static
172 information fields, and will then describe individual operations in
173 details as they get used in later sections.
2d2ef822 174 </para>
2d2ef822 175 <sect2>
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176 <title>Driver Information</title>
177 <sect3>
178 <title>Driver Features</title>
179 <para>
180 Drivers inform the DRM core about their requirements and supported
181 features by setting appropriate flags in the
182 <structfield>driver_features</structfield> field. Since those flags
183 influence the DRM core behaviour since registration time, most of them
184 must be set to registering the <structname>drm_driver</structname>
185 instance.
186 </para>
187 <synopsis>u32 driver_features;</synopsis>
188 <variablelist>
189 <title>Driver Feature Flags</title>
190 <varlistentry>
191 <term>DRIVER_USE_AGP</term>
192 <listitem><para>
193 Driver uses AGP interface, the DRM core will manage AGP resources.
194 </para></listitem>
195 </varlistentry>
196 <varlistentry>
197 <term>DRIVER_REQUIRE_AGP</term>
198 <listitem><para>
199 Driver needs AGP interface to function. AGP initialization failure
200 will become a fatal error.
201 </para></listitem>
202 </varlistentry>
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203 <varlistentry>
204 <term>DRIVER_PCI_DMA</term>
205 <listitem><para>
206 Driver is capable of PCI DMA, mapping of PCI DMA buffers to
207 userspace will be enabled. Deprecated.
208 </para></listitem>
209 </varlistentry>
210 <varlistentry>
211 <term>DRIVER_SG</term>
212 <listitem><para>
213 Driver can perform scatter/gather DMA, allocation and mapping of
214 scatter/gather buffers will be enabled. Deprecated.
215 </para></listitem>
216 </varlistentry>
217 <varlistentry>
218 <term>DRIVER_HAVE_DMA</term>
219 <listitem><para>
220 Driver supports DMA, the userspace DMA API will be supported.
221 Deprecated.
222 </para></listitem>
223 </varlistentry>
224 <varlistentry>
225 <term>DRIVER_HAVE_IRQ</term><term>DRIVER_IRQ_SHARED</term>
226 <listitem><para>
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227 DRIVER_HAVE_IRQ indicates whether the driver has an IRQ handler
228 managed by the DRM Core. The core will support simple IRQ handler
229 installation when the flag is set. The installation process is
230 described in <xref linkend="drm-irq-registration"/>.</para>
231 <para>DRIVER_IRQ_SHARED indicates whether the device &amp; handler
232 support shared IRQs (note that this is required of PCI drivers).
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233 </para></listitem>
234 </varlistentry>
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235 <varlistentry>
236 <term>DRIVER_GEM</term>
237 <listitem><para>
238 Driver use the GEM memory manager.
239 </para></listitem>
240 </varlistentry>
241 <varlistentry>
242 <term>DRIVER_MODESET</term>
243 <listitem><para>
244 Driver supports mode setting interfaces (KMS).
245 </para></listitem>
246 </varlistentry>
247 <varlistentry>
248 <term>DRIVER_PRIME</term>
249 <listitem><para>
250 Driver implements DRM PRIME buffer sharing.
251 </para></listitem>
252 </varlistentry>
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253 <varlistentry>
254 <term>DRIVER_RENDER</term>
255 <listitem><para>
256 Driver supports dedicated render nodes.
257 </para></listitem>
258 </varlistentry>
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259 <varlistentry>
260 <term>DRIVER_ATOMIC</term>
261 <listitem><para>
262 Driver supports atomic properties. In this case the driver
263 must implement appropriate obj->atomic_get_property() vfuncs
264 for any modeset objects with driver specific properties.
265 </para></listitem>
266 </varlistentry>
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267 </variablelist>
268 </sect3>
269 <sect3>
270 <title>Major, Minor and Patchlevel</title>
271 <synopsis>int major;
272int minor;
273int patchlevel;</synopsis>
274 <para>
275 The DRM core identifies driver versions by a major, minor and patch
276 level triplet. The information is printed to the kernel log at
277 initialization time and passed to userspace through the
278 DRM_IOCTL_VERSION ioctl.
279 </para>
280 <para>
281 The major and minor numbers are also used to verify the requested driver
282 API version passed to DRM_IOCTL_SET_VERSION. When the driver API changes
283 between minor versions, applications can call DRM_IOCTL_SET_VERSION to
284 select a specific version of the API. If the requested major isn't equal
285 to the driver major, or the requested minor is larger than the driver
286 minor, the DRM_IOCTL_SET_VERSION call will return an error. Otherwise
287 the driver's set_version() method will be called with the requested
288 version.
289 </para>
290 </sect3>
291 <sect3>
292 <title>Name, Description and Date</title>
293 <synopsis>char *name;
294char *desc;
295char *date;</synopsis>
296 <para>
297 The driver name is printed to the kernel log at initialization time,
298 used for IRQ registration and passed to userspace through
299 DRM_IOCTL_VERSION.
300 </para>
301 <para>
302 The driver description is a purely informative string passed to
303 userspace through the DRM_IOCTL_VERSION ioctl and otherwise unused by
304 the kernel.
305 </para>
306 <para>
307 The driver date, formatted as YYYYMMDD, is meant to identify the date of
308 the latest modification to the driver. However, as most drivers fail to
309 update it, its value is mostly useless. The DRM core prints it to the
310 kernel log at initialization time and passes it to userspace through the
311 DRM_IOCTL_VERSION ioctl.
312 </para>
313 </sect3>
314 </sect2>
c6a1af8a 315 <sect2>
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316 <title>Device Instance and Driver Handling</title>
317!Pdrivers/gpu/drm/drm_drv.c driver instance overview
25196484 318!Edrivers/gpu/drm/drm_drv.c
c6a1af8a 319 </sect2>
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320 <sect2>
321 <title>Driver Load</title>
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322 <sect3 id="drm-irq-registration">
323 <title>IRQ Registration</title>
324 <para>
325 The DRM core tries to facilitate IRQ handler registration and
326 unregistration by providing <function>drm_irq_install</function> and
327 <function>drm_irq_uninstall</function> functions. Those functions only
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328 support a single interrupt per device, devices that use more than one
329 IRQs need to be handled manually.
9cad9c95 330 </para>
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331 <sect4>
332 <title>Managed IRQ Registration</title>
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333 <para>
334 <function>drm_irq_install</function> starts by calling the
335 <methodname>irq_preinstall</methodname> driver operation. The operation
336 is optional and must make sure that the interrupt will not get fired by
337 clearing all pending interrupt flags or disabling the interrupt.
338 </para>
339 <para>
bb0f1b5c 340 The passed-in IRQ will then be requested by a call to
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341 <function>request_irq</function>. If the DRIVER_IRQ_SHARED driver
342 feature flag is set, a shared (IRQF_SHARED) IRQ handler will be
343 requested.
344 </para>
345 <para>
346 The IRQ handler function must be provided as the mandatory irq_handler
347 driver operation. It will get passed directly to
348 <function>request_irq</function> and thus has the same prototype as all
349 IRQ handlers. It will get called with a pointer to the DRM device as the
350 second argument.
351 </para>
352 <para>
353 Finally the function calls the optional
354 <methodname>irq_postinstall</methodname> driver operation. The operation
355 usually enables interrupts (excluding the vblank interrupt, which is
356 enabled separately), but drivers may choose to enable/disable interrupts
357 at a different time.
358 </para>
359 <para>
360 <function>drm_irq_uninstall</function> is similarly used to uninstall an
361 IRQ handler. It starts by waking up all processes waiting on a vblank
362 interrupt to make sure they don't hang, and then calls the optional
363 <methodname>irq_uninstall</methodname> driver operation. The operation
364 must disable all hardware interrupts. Finally the function frees the IRQ
365 by calling <function>free_irq</function>.
366 </para>
367 </sect4>
368 <sect4>
369 <title>Manual IRQ Registration</title>
370 <para>
371 Drivers that require multiple interrupt handlers can't use the managed
372 IRQ registration functions. In that case IRQs must be registered and
373 unregistered manually (usually with the <function>request_irq</function>
374 and <function>free_irq</function> functions, or their devm_* equivalent).
375 </para>
376 <para>
377 When manually registering IRQs, drivers must not set the DRIVER_HAVE_IRQ
378 driver feature flag, and must not provide the
379 <methodname>irq_handler</methodname> driver operation. They must set the
380 <structname>drm_device</structname> <structfield>irq_enabled</structfield>
381 field to 1 upon registration of the IRQs, and clear it to 0 after
382 unregistering the IRQs.
383 </para>
384 </sect4>
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385 </sect3>
386 <sect3>
387 <title>Memory Manager Initialization</title>
388 <para>
389 Every DRM driver requires a memory manager which must be initialized at
390 load time. DRM currently contains two memory managers, the Translation
391 Table Manager (TTM) and the Graphics Execution Manager (GEM).
392 This document describes the use of the GEM memory manager only. See
393 <xref linkend="drm-memory-management"/> for details.
394 </para>
395 </sect3>
396 <sect3>
397 <title>Miscellaneous Device Configuration</title>
398 <para>
399 Another task that may be necessary for PCI devices during configuration
400 is mapping the video BIOS. On many devices, the VBIOS describes device
401 configuration, LCD panel timings (if any), and contains flags indicating
402 device state. Mapping the BIOS can be done using the pci_map_rom() call,
403 a convenience function that takes care of mapping the actual ROM,
404 whether it has been shadowed into memory (typically at address 0xc0000)
405 or exists on the PCI device in the ROM BAR. Note that after the ROM has
406 been mapped and any necessary information has been extracted, it should
407 be unmapped; on many devices, the ROM address decoder is shared with
408 other BARs, so leaving it mapped could cause undesired behaviour like
409 hangs or memory corruption.
410 <!--!Fdrivers/pci/rom.c pci_map_rom-->
411 </para>
412 </sect3>
2d2ef822 413 </sect2>
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414 <sect2>
415 <title>Bus-specific Device Registration and PCI Support</title>
416 <para>
417 A number of functions are provided to help with device registration.
418 The functions deal with PCI and platform devices respectively and are
419 only provided for historical reasons. These are all deprecated and
420 shouldn't be used in new drivers. Besides that there's a few
421 helpers for pci drivers.
422 </para>
423!Edrivers/gpu/drm/drm_pci.c
424!Edrivers/gpu/drm/drm_platform.c
425 </sect2>
9cad9c95 426 </sect1>
2d2ef822 427
9cad9c95 428 <!-- Internals: memory management -->
2d2ef822 429
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430 <sect1 id="drm-memory-management">
431 <title>Memory management</title>
432 <para>
433 Modern Linux systems require large amount of graphics memory to store
434 frame buffers, textures, vertices and other graphics-related data. Given
435 the very dynamic nature of many of that data, managing graphics memory
436 efficiently is thus crucial for the graphics stack and plays a central
437 role in the DRM infrastructure.
438 </para>
439 <para>
440 The DRM core includes two memory managers, namely Translation Table Maps
441 (TTM) and Graphics Execution Manager (GEM). TTM was the first DRM memory
442 manager to be developed and tried to be a one-size-fits-them all
f884ab15 443 solution. It provides a single userspace API to accommodate the need of
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444 all hardware, supporting both Unified Memory Architecture (UMA) devices
445 and devices with dedicated video RAM (i.e. most discrete video cards).
446 This resulted in a large, complex piece of code that turned out to be
447 hard to use for driver development.
448 </para>
449 <para>
450 GEM started as an Intel-sponsored project in reaction to TTM's
451 complexity. Its design philosophy is completely different: instead of
452 providing a solution to every graphics memory-related problems, GEM
453 identified common code between drivers and created a support library to
454 share it. GEM has simpler initialization and execution requirements than
9a6594fc 455 TTM, but has no video RAM management capabilities and is thus limited to
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456 UMA devices.
457 </para>
2d2ef822 458 <sect2>
9cad9c95 459 <title>The Translation Table Manager (TTM)</title>
2d2ef822 460 <para>
79058100 461 TTM design background and information belongs here.
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462 </para>
463 <sect3>
79058100 464 <title>TTM initialization</title>
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465 <warning><para>This section is outdated.</para></warning>
466 <para>
467 Drivers wishing to support TTM must fill out a drm_bo_driver
468 structure. The structure contains several fields with function
469 pointers for initializing the TTM, allocating and freeing memory,
470 waiting for command completion and fence synchronization, and memory
471 migration. See the radeon_ttm.c file for an example of usage.
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472 </para>
473 <para>
474 The ttm_global_reference structure is made up of several fields:
475 </para>
476 <programlisting>
477 struct ttm_global_reference {
478 enum ttm_global_types global_type;
479 size_t size;
480 void *object;
481 int (*init) (struct ttm_global_reference *);
482 void (*release) (struct ttm_global_reference *);
483 };
484 </programlisting>
485 <para>
486 There should be one global reference structure for your memory
487 manager as a whole, and there will be others for each object
488 created by the memory manager at runtime. Your global TTM should
489 have a type of TTM_GLOBAL_TTM_MEM. The size field for the global
490 object should be sizeof(struct ttm_mem_global), and the init and
491 release hooks should point at your driver-specific init and
492 release routines, which probably eventually call
493 ttm_mem_global_init and ttm_mem_global_release, respectively.
494 </para>
495 <para>
496 Once your global TTM accounting structure is set up and initialized
497 by calling ttm_global_item_ref() on it,
498 you need to create a buffer object TTM to
499 provide a pool for buffer object allocation by clients and the
500 kernel itself. The type of this object should be TTM_GLOBAL_TTM_BO,
501 and its size should be sizeof(struct ttm_bo_global). Again,
502 driver-specific init and release functions may be provided,
503 likely eventually calling ttm_bo_global_init() and
504 ttm_bo_global_release(), respectively. Also, like the previous
505 object, ttm_global_item_ref() is used to create an initial reference
506 count for the TTM, which will call your initialization function.
507 </para>
2d2ef822 508 </sect3>
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509 </sect2>
510 <sect2 id="drm-gem">
511 <title>The Graphics Execution Manager (GEM)</title>
512 <para>
513 The GEM design approach has resulted in a memory manager that doesn't
514 provide full coverage of all (or even all common) use cases in its
515 userspace or kernel API. GEM exposes a set of standard memory-related
516 operations to userspace and a set of helper functions to drivers, and let
517 drivers implement hardware-specific operations with their own private API.
518 </para>
519 <para>
520 The GEM userspace API is described in the
521 <ulink url="http://lwn.net/Articles/283798/"><citetitle>GEM - the Graphics
522 Execution Manager</citetitle></ulink> article on LWN. While slightly
523 outdated, the document provides a good overview of the GEM API principles.
524 Buffer allocation and read and write operations, described as part of the
525 common GEM API, are currently implemented using driver-specific ioctls.
526 </para>
527 <para>
528 GEM is data-agnostic. It manages abstract buffer objects without knowing
529 what individual buffers contain. APIs that require knowledge of buffer
530 contents or purpose, such as buffer allocation or synchronization
531 primitives, are thus outside of the scope of GEM and must be implemented
532 using driver-specific ioctls.
533 </para>
534 <para>
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535 On a fundamental level, GEM involves several operations:
536 <itemizedlist>
537 <listitem>Memory allocation and freeing</listitem>
538 <listitem>Command execution</listitem>
539 <listitem>Aperture management at command execution time</listitem>
540 </itemizedlist>
541 Buffer object allocation is relatively straightforward and largely
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542 provided by Linux's shmem layer, which provides memory to back each
543 object.
544 </para>
545 <para>
546 Device-specific operations, such as command execution, pinning, buffer
79058100 547 read &amp; write, mapping, and domain ownership transfers are left to
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548 driver-specific ioctls.
549 </para>
550 <sect3>
551 <title>GEM Initialization</title>
552 <para>
553 Drivers that use GEM must set the DRIVER_GEM bit in the struct
554 <structname>drm_driver</structname>
555 <structfield>driver_features</structfield> field. The DRM core will
556 then automatically initialize the GEM core before calling the
557 <methodname>load</methodname> operation. Behind the scene, this will
558 create a DRM Memory Manager object which provides an address space
559 pool for object allocation.
560 </para>
561 <para>
562 In a KMS configuration, drivers need to allocate and initialize a
563 command ring buffer following core GEM initialization if required by
564 the hardware. UMA devices usually have what is called a "stolen"
565 memory region, which provides space for the initial framebuffer and
566 large, contiguous memory regions required by the device. This space is
567 typically not managed by GEM, and must be initialized separately into
568 its own DRM MM object.
569 </para>
570 </sect3>
2d2ef822 571 <sect3>
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572 <title>GEM Objects Creation</title>
573 <para>
574 GEM splits creation of GEM objects and allocation of the memory that
575 backs them in two distinct operations.
576 </para>
577 <para>
578 GEM objects are represented by an instance of struct
579 <structname>drm_gem_object</structname>. Drivers usually need to extend
580 GEM objects with private information and thus create a driver-specific
581 GEM object structure type that embeds an instance of struct
582 <structname>drm_gem_object</structname>.
583 </para>
584 <para>
585 To create a GEM object, a driver allocates memory for an instance of its
586 specific GEM object type and initializes the embedded struct
587 <structname>drm_gem_object</structname> with a call to
588 <function>drm_gem_object_init</function>. The function takes a pointer to
589 the DRM device, a pointer to the GEM object and the buffer object size
590 in bytes.
591 </para>
592 <para>
593 GEM uses shmem to allocate anonymous pageable memory.
594 <function>drm_gem_object_init</function> will create an shmfs file of
595 the requested size and store it into the struct
596 <structname>drm_gem_object</structname> <structfield>filp</structfield>
597 field. The memory is used as either main storage for the object when the
598 graphics hardware uses system memory directly or as a backing store
599 otherwise.
600 </para>
601 <para>
602 Drivers are responsible for the actual physical pages allocation by
603 calling <function>shmem_read_mapping_page_gfp</function> for each page.
604 Note that they can decide to allocate pages when initializing the GEM
605 object, or to delay allocation until the memory is needed (for instance
606 when a page fault occurs as a result of a userspace memory access or
607 when the driver needs to start a DMA transfer involving the memory).
608 </para>
609 <para>
610 Anonymous pageable memory allocation is not always desired, for instance
611 when the hardware requires physically contiguous system memory as is
612 often the case in embedded devices. Drivers can create GEM objects with
613 no shmfs backing (called private GEM objects) by initializing them with
614 a call to <function>drm_gem_private_object_init</function> instead of
615 <function>drm_gem_object_init</function>. Storage for private GEM
616 objects must be managed by drivers.
617 </para>
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618 </sect3>
619 <sect3>
620 <title>GEM Objects Lifetime</title>
621 <para>
622 All GEM objects are reference-counted by the GEM core. References can be
623 acquired and release by <function>calling drm_gem_object_reference</function>
624 and <function>drm_gem_object_unreference</function> respectively. The
625 caller must hold the <structname>drm_device</structname>
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626 <structfield>struct_mutex</structfield> lock when calling
627 <function>drm_gem_object_reference</function>. As a convenience, GEM
628 provides <function>drm_gem_object_unreference_unlocked</function>
629 functions that can be called without holding the lock.
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630 </para>
631 <para>
632 When the last reference to a GEM object is released the GEM core calls
633 the <structname>drm_driver</structname>
634 <methodname>gem_free_object</methodname> operation. That operation is
635 mandatory for GEM-enabled drivers and must free the GEM object and all
636 associated resources.
637 </para>
638 <para>
639 <synopsis>void (*gem_free_object) (struct drm_gem_object *obj);</synopsis>
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640 Drivers are responsible for freeing all GEM object resources. This includes
641 the resources created by the GEM core, which need to be released with
642 <function>drm_gem_object_release</function>.
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643 </para>
644 </sect3>
645 <sect3>
646 <title>GEM Objects Naming</title>
647 <para>
648 Communication between userspace and the kernel refers to GEM objects
649 using local handles, global names or, more recently, file descriptors.
650 All of those are 32-bit integer values; the usual Linux kernel limits
651 apply to the file descriptors.
652 </para>
653 <para>
654 GEM handles are local to a DRM file. Applications get a handle to a GEM
655 object through a driver-specific ioctl, and can use that handle to refer
656 to the GEM object in other standard or driver-specific ioctls. Closing a
657 DRM file handle frees all its GEM handles and dereferences the
658 associated GEM objects.
659 </para>
660 <para>
661 To create a handle for a GEM object drivers call
662 <function>drm_gem_handle_create</function>. The function takes a pointer
663 to the DRM file and the GEM object and returns a locally unique handle.
664 When the handle is no longer needed drivers delete it with a call to
665 <function>drm_gem_handle_delete</function>. Finally the GEM object
666 associated with a handle can be retrieved by a call to
667 <function>drm_gem_object_lookup</function>.
668 </para>
669 <para>
670 Handles don't take ownership of GEM objects, they only take a reference
671 to the object that will be dropped when the handle is destroyed. To
672 avoid leaking GEM objects, drivers must make sure they drop the
673 reference(s) they own (such as the initial reference taken at object
674 creation time) as appropriate, without any special consideration for the
675 handle. For example, in the particular case of combined GEM object and
676 handle creation in the implementation of the
677 <methodname>dumb_create</methodname> operation, drivers must drop the
678 initial reference to the GEM object before returning the handle.
679 </para>
680 <para>
681 GEM names are similar in purpose to handles but are not local to DRM
682 files. They can be passed between processes to reference a GEM object
683 globally. Names can't be used directly to refer to objects in the DRM
684 API, applications must convert handles to names and names to handles
685 using the DRM_IOCTL_GEM_FLINK and DRM_IOCTL_GEM_OPEN ioctls
686 respectively. The conversion is handled by the DRM core without any
687 driver-specific support.
688 </para>
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689 <para>
690 GEM also supports buffer sharing with dma-buf file descriptors through
691 PRIME. GEM-based drivers must use the provided helpers functions to
692 implement the exporting and importing correctly. See <xref linkend="drm-prime-support" />.
693 Since sharing file descriptors is inherently more secure than the
694 easily guessable and global GEM names it is the preferred buffer
695 sharing mechanism. Sharing buffers through GEM names is only supported
696 for legacy userspace. Furthermore PRIME also allows cross-device
697 buffer sharing since it is based on dma-bufs.
698 </para>
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699 </sect3>
700 <sect3 id="drm-gem-objects-mapping">
701 <title>GEM Objects Mapping</title>
702 <para>
703 Because mapping operations are fairly heavyweight GEM favours
704 read/write-like access to buffers, implemented through driver-specific
705 ioctls, over mapping buffers to userspace. However, when random access
706 to the buffer is needed (to perform software rendering for instance),
707 direct access to the object can be more efficient.
708 </para>
709 <para>
710 The mmap system call can't be used directly to map GEM objects, as they
711 don't have their own file handle. Two alternative methods currently
712 co-exist to map GEM objects to userspace. The first method uses a
713 driver-specific ioctl to perform the mapping operation, calling
714 <function>do_mmap</function> under the hood. This is often considered
715 dubious, seems to be discouraged for new GEM-enabled drivers, and will
716 thus not be described here.
717 </para>
718 <para>
719 The second method uses the mmap system call on the DRM file handle.
720 <synopsis>void *mmap(void *addr, size_t length, int prot, int flags, int fd,
721 off_t offset);</synopsis>
722 DRM identifies the GEM object to be mapped by a fake offset passed
723 through the mmap offset argument. Prior to being mapped, a GEM object
724 must thus be associated with a fake offset. To do so, drivers must call
df2e0900 725 <function>drm_gem_create_mmap_offset</function> on the object.
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726 </para>
727 <para>
728 Once allocated, the fake offset value
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729 must be passed to the application in a driver-specific way and can then
730 be used as the mmap offset argument.
731 </para>
732 <para>
733 The GEM core provides a helper method <function>drm_gem_mmap</function>
734 to handle object mapping. The method can be set directly as the mmap
735 file operation handler. It will look up the GEM object based on the
736 offset value and set the VMA operations to the
737 <structname>drm_driver</structname> <structfield>gem_vm_ops</structfield>
738 field. Note that <function>drm_gem_mmap</function> doesn't map memory to
739 userspace, but relies on the driver-provided fault handler to map pages
740 individually.
741 </para>
742 <para>
743 To use <function>drm_gem_mmap</function>, drivers must fill the struct
744 <structname>drm_driver</structname> <structfield>gem_vm_ops</structfield>
745 field with a pointer to VM operations.
746 </para>
747 <para>
748 <synopsis>struct vm_operations_struct *gem_vm_ops
749
750 struct vm_operations_struct {
751 void (*open)(struct vm_area_struct * area);
752 void (*close)(struct vm_area_struct * area);
753 int (*fault)(struct vm_area_struct *vma, struct vm_fault *vmf);
754 };</synopsis>
755 </para>
756 <para>
757 The <methodname>open</methodname> and <methodname>close</methodname>
758 operations must update the GEM object reference count. Drivers can use
759 the <function>drm_gem_vm_open</function> and
760 <function>drm_gem_vm_close</function> helper functions directly as open
761 and close handlers.
762 </para>
763 <para>
764 The fault operation handler is responsible for mapping individual pages
765 to userspace when a page fault occurs. Depending on the memory
766 allocation scheme, drivers can allocate pages at fault time, or can
767 decide to allocate memory for the GEM object at the time the object is
768 created.
769 </para>
770 <para>
771 Drivers that want to map the GEM object upfront instead of handling page
772 faults can implement their own mmap file operation handler.
773 </para>
774 </sect3>
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775 <sect3>
776 <title>Memory Coherency</title>
777 <para>
778 When mapped to the device or used in a command buffer, backing pages
779 for an object are flushed to memory and marked write combined so as to
780 be coherent with the GPU. Likewise, if the CPU accesses an object
781 after the GPU has finished rendering to the object, then the object
782 must be made coherent with the CPU's view of memory, usually involving
783 GPU cache flushing of various kinds. This core CPU&lt;-&gt;GPU
784 coherency management is provided by a device-specific ioctl, which
785 evaluates an object's current domain and performs any necessary
786 flushing or synchronization to put the object into the desired
787 coherency domain (note that the object may be busy, i.e. an active
788 render target; in that case, setting the domain blocks the client and
789 waits for rendering to complete before performing any necessary
790 flushing operations).
791 </para>
792 </sect3>
793 <sect3>
794 <title>Command Execution</title>
795 <para>
79058100 796 Perhaps the most important GEM function for GPU devices is providing a
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797 command execution interface to clients. Client programs construct
798 command buffers containing references to previously allocated memory
799 objects, and then submit them to GEM. At that point, GEM takes care to
800 bind all the objects into the GTT, execute the buffer, and provide
801 necessary synchronization between clients accessing the same buffers.
802 This often involves evicting some objects from the GTT and re-binding
803 others (a fairly expensive operation), and providing relocation
804 support which hides fixed GTT offsets from clients. Clients must take
805 care not to submit command buffers that reference more objects than
806 can fit in the GTT; otherwise, GEM will reject them and no rendering
807 will occur. Similarly, if several objects in the buffer require fence
808 registers to be allocated for correct rendering (e.g. 2D blits on
809 pre-965 chips), care must be taken not to require more fence registers
810 than are available to the client. Such resource management should be
811 abstracted from the client in libdrm.
812 </para>
2d2ef822 813 </sect3>
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814 </sect2>
815 <sect2>
816 <title>GEM Function Reference</title>
89d61fc0 817!Edrivers/gpu/drm/drm_gem.c
decc60bf 818!Iinclude/drm/drm_gem.h
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819 </sect2>
820 <sect2>
821 <title>VMA Offset Manager</title>
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822!Pdrivers/gpu/drm/drm_vma_manager.c vma offset manager
823!Edrivers/gpu/drm/drm_vma_manager.c
824!Iinclude/drm/drm_vma_manager.h
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825 </sect2>
826 <sect2 id="drm-prime-support">
827 <title>PRIME Buffer Sharing</title>
828 <para>
829 PRIME is the cross device buffer sharing framework in drm, originally
830 created for the OPTIMUS range of multi-gpu platforms. To userspace
831 PRIME buffers are dma-buf based file descriptors.
832 </para>
833 <sect3>
834 <title>Overview and Driver Interface</title>
835 <para>
836 Similar to GEM global names, PRIME file descriptors are
837 also used to share buffer objects across processes. They offer
838 additional security: as file descriptors must be explicitly sent over
839 UNIX domain sockets to be shared between applications, they can't be
840 guessed like the globally unique GEM names.
841 </para>
842 <para>
843 Drivers that support the PRIME
844 API must set the DRIVER_PRIME bit in the struct
845 <structname>drm_driver</structname>
846 <structfield>driver_features</structfield> field, and implement the
847 <methodname>prime_handle_to_fd</methodname> and
848 <methodname>prime_fd_to_handle</methodname> operations.
849 </para>
850 <para>
851 <synopsis>int (*prime_handle_to_fd)(struct drm_device *dev,
852 struct drm_file *file_priv, uint32_t handle,
853 uint32_t flags, int *prime_fd);
251261db 854int (*prime_fd_to_handle)(struct drm_device *dev,
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855 struct drm_file *file_priv, int prime_fd,
856 uint32_t *handle);</synopsis>
857 Those two operations convert a handle to a PRIME file descriptor and
858 vice versa. Drivers must use the kernel dma-buf buffer sharing framework
859 to manage the PRIME file descriptors. Similar to the mode setting
860 API PRIME is agnostic to the underlying buffer object manager, as
861 long as handles are 32bit unsigned integers.
862 </para>
863 <para>
864 While non-GEM drivers must implement the operations themselves, GEM
865 drivers must use the <function>drm_gem_prime_handle_to_fd</function>
866 and <function>drm_gem_prime_fd_to_handle</function> helper functions.
867 Those helpers rely on the driver
868 <methodname>gem_prime_export</methodname> and
869 <methodname>gem_prime_import</methodname> operations to create a dma-buf
870 instance from a GEM object (dma-buf exporter role) and to create a GEM
871 object from a dma-buf instance (dma-buf importer role).
872 </para>
873 <para>
874 <synopsis>struct dma_buf * (*gem_prime_export)(struct drm_device *dev,
875 struct drm_gem_object *obj,
876 int flags);
251261db 877struct drm_gem_object * (*gem_prime_import)(struct drm_device *dev,
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878 struct dma_buf *dma_buf);</synopsis>
879 These two operations are mandatory for GEM drivers that support
880 PRIME.
881 </para>
251261db 882 </sect3>
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883 <sect3>
884 <title>PRIME Helper Functions</title>
885!Pdrivers/gpu/drm/drm_prime.c PRIME Helpers
886 </sect3>
887 </sect2>
888 <sect2>
889 <title>PRIME Function References</title>
39cc344a 890!Edrivers/gpu/drm/drm_prime.c
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891 </sect2>
892 <sect2>
893 <title>DRM MM Range Allocator</title>
894 <sect3>
895 <title>Overview</title>
93110be6 896!Pdrivers/gpu/drm/drm_mm.c Overview
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897 </sect3>
898 <sect3>
899 <title>LRU Scan/Eviction Support</title>
93110be6 900!Pdrivers/gpu/drm/drm_mm.c lru scan roaster
79058100 901 </sect3>
93110be6 902 </sect2>
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903 <sect2>
904 <title>DRM MM Range Allocator Function References</title>
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905!Edrivers/gpu/drm/drm_mm.c
906!Iinclude/drm/drm_mm.h
79058100 907 </sect2>
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908 <sect2>
909 <title>CMA Helper Functions Reference</title>
910!Pdrivers/gpu/drm/drm_gem_cma_helper.c cma helpers
911!Edrivers/gpu/drm/drm_gem_cma_helper.c
912!Iinclude/drm/drm_gem_cma_helper.h
913 </sect2>
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914 </sect1>
915
916 <!-- Internals: mode setting -->
2d2ef822 917
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918 <sect1 id="drm-mode-setting">
919 <title>Mode Setting</title>
920 <para>
921 Drivers must initialize the mode setting core by calling
922 <function>drm_mode_config_init</function> on the DRM device. The function
923 initializes the <structname>drm_device</structname>
924 <structfield>mode_config</structfield> field and never fails. Once done,
925 mode configuration must be setup by initializing the following fields.
926 </para>
927 <itemizedlist>
928 <listitem>
929 <synopsis>int min_width, min_height;
930int max_width, max_height;</synopsis>
931 <para>
932 Minimum and maximum width and height of the frame buffers in pixel
933 units.
934 </para>
935 </listitem>
936 <listitem>
937 <synopsis>struct drm_mode_config_funcs *funcs;</synopsis>
938 <para>Mode setting functions.</para>
939 </listitem>
940 </itemizedlist>
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941 <sect2>
942 <title>Display Modes Function Reference</title>
f5aabb97 943!Iinclude/drm/drm_modes.h
3ec0db81 944!Edrivers/gpu/drm/drm_modes.c
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945 </sect2>
946 <sect2>
947 <title>Atomic Mode Setting Function Reference</title>
948!Edrivers/gpu/drm/drm_atomic.c
c0714fc9 949!Idrivers/gpu/drm/drm_atomic.c
3ec0db81 950 </sect2>
2d2ef822 951 <sect2>
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952 <title>Frame Buffer Creation</title>
953 <synopsis>struct drm_framebuffer *(*fb_create)(struct drm_device *dev,
954 struct drm_file *file_priv,
955 struct drm_mode_fb_cmd2 *mode_cmd);</synopsis>
2d2ef822 956 <para>
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957 Frame buffers are abstract memory objects that provide a source of
958 pixels to scanout to a CRTC. Applications explicitly request the
959 creation of frame buffers through the DRM_IOCTL_MODE_ADDFB(2) ioctls and
960 receive an opaque handle that can be passed to the KMS CRTC control,
961 plane configuration and page flip functions.
962 </para>
963 <para>
964 Frame buffers rely on the underneath memory manager for low-level memory
965 operations. When creating a frame buffer applications pass a memory
966 handle (or a list of memory handles for multi-planar formats) through
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967 the <parameter>drm_mode_fb_cmd2</parameter> argument. For drivers using
968 GEM as their userspace buffer management interface this would be a GEM
969 handle. Drivers are however free to use their own backing storage object
970 handles, e.g. vmwgfx directly exposes special TTM handles to userspace
971 and so expects TTM handles in the create ioctl and not GEM handles.
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972 </para>
973 <para>
974 Drivers must first validate the requested frame buffer parameters passed
975 through the mode_cmd argument. In particular this is where invalid
976 sizes, pixel formats or pitches can be caught.
977 </para>
978 <para>
979 If the parameters are deemed valid, drivers then create, initialize and
980 return an instance of struct <structname>drm_framebuffer</structname>.
981 If desired the instance can be embedded in a larger driver-specific
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982 structure. Drivers must fill its <structfield>width</structfield>,
983 <structfield>height</structfield>, <structfield>pitches</structfield>,
984 <structfield>offsets</structfield>, <structfield>depth</structfield>,
985 <structfield>bits_per_pixel</structfield> and
986 <structfield>pixel_format</structfield> fields from the values passed
987 through the <parameter>drm_mode_fb_cmd2</parameter> argument. They
988 should call the <function>drm_helper_mode_fill_fb_struct</function>
989 helper function to do so.
990 </para>
991
992 <para>
065a5027 993 The initialization of the new framebuffer instance is finalized with a
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994 call to <function>drm_framebuffer_init</function> which takes a pointer
995 to DRM frame buffer operations (struct
996 <structname>drm_framebuffer_funcs</structname>). Note that this function
997 publishes the framebuffer and so from this point on it can be accessed
998 concurrently from other threads. Hence it must be the last step in the
999 driver's framebuffer initialization sequence. Frame buffer operations
1000 are
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1001 <itemizedlist>
1002 <listitem>
1003 <synopsis>int (*create_handle)(struct drm_framebuffer *fb,
1004 struct drm_file *file_priv, unsigned int *handle);</synopsis>
1005 <para>
1006 Create a handle to the frame buffer underlying memory object. If
1007 the frame buffer uses a multi-plane format, the handle will
1008 reference the memory object associated with the first plane.
1009 </para>
1010 <para>
1011 Drivers call <function>drm_gem_handle_create</function> to create
1012 the handle.
1013 </para>
1014 </listitem>
1015 <listitem>
1016 <synopsis>void (*destroy)(struct drm_framebuffer *framebuffer);</synopsis>
1017 <para>
1018 Destroy the frame buffer object and frees all associated
1019 resources. Drivers must call
1020 <function>drm_framebuffer_cleanup</function> to free resources
1021 allocated by the DRM core for the frame buffer object, and must
1022 make sure to unreference all memory objects associated with the
1023 frame buffer. Handles created by the
1024 <methodname>create_handle</methodname> operation are released by
1025 the DRM core.
1026 </para>
1027 </listitem>
1028 <listitem>
1029 <synopsis>int (*dirty)(struct drm_framebuffer *framebuffer,
1030 struct drm_file *file_priv, unsigned flags, unsigned color,
1031 struct drm_clip_rect *clips, unsigned num_clips);</synopsis>
1032 <para>
1033 This optional operation notifies the driver that a region of the
1034 frame buffer has changed in response to a DRM_IOCTL_MODE_DIRTYFB
1035 ioctl call.
1036 </para>
1037 </listitem>
1038 </itemizedlist>
1039 </para>
1040 <para>
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1041 The lifetime of a drm framebuffer is controlled with a reference count,
1042 drivers can grab additional references with
9ee984a5 1043 <function>drm_framebuffer_reference</function>and drop them
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1044 again with <function>drm_framebuffer_unreference</function>. For
1045 driver-private framebuffers for which the last reference is never
1046 dropped (e.g. for the fbdev framebuffer when the struct
1047 <structname>drm_framebuffer</structname> is embedded into the fbdev
1048 helper struct) drivers can manually clean up a framebuffer at module
1049 unload time with
1050 <function>drm_framebuffer_unregister_private</function>.
9ee984a5 1051 </para>
9cad9c95 1052 </sect2>
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1053 <sect2>
1054 <title>Dumb Buffer Objects</title>
1055 <para>
1056 The KMS API doesn't standardize backing storage object creation and
1057 leaves it to driver-specific ioctls. Furthermore actually creating a
1058 buffer object even for GEM-based drivers is done through a
1059 driver-specific ioctl - GEM only has a common userspace interface for
1060 sharing and destroying objects. While not an issue for full-fledged
1061 graphics stacks that include device-specific userspace components (in
1062 libdrm for instance), this limit makes DRM-based early boot graphics
1063 unnecessarily complex.
1064 </para>
1065 <para>
1066 Dumb objects partly alleviate the problem by providing a standard
1067 API to create dumb buffers suitable for scanout, which can then be used
1068 to create KMS frame buffers.
1069 </para>
1070 <para>
1071 To support dumb objects drivers must implement the
1072 <methodname>dumb_create</methodname>,
1073 <methodname>dumb_destroy</methodname> and
1074 <methodname>dumb_map_offset</methodname> operations.
1075 </para>
1076 <itemizedlist>
1077 <listitem>
1078 <synopsis>int (*dumb_create)(struct drm_file *file_priv, struct drm_device *dev,
1079 struct drm_mode_create_dumb *args);</synopsis>
1080 <para>
1081 The <methodname>dumb_create</methodname> operation creates a driver
1082 object (GEM or TTM handle) suitable for scanout based on the
1083 width, height and depth from the struct
1084 <structname>drm_mode_create_dumb</structname> argument. It fills the
1085 argument's <structfield>handle</structfield>,
1086 <structfield>pitch</structfield> and <structfield>size</structfield>
1087 fields with a handle for the newly created object and its line
1088 pitch and size in bytes.
1089 </para>
1090 </listitem>
1091 <listitem>
1092 <synopsis>int (*dumb_destroy)(struct drm_file *file_priv, struct drm_device *dev,
1093 uint32_t handle);</synopsis>
1094 <para>
1095 The <methodname>dumb_destroy</methodname> operation destroys a dumb
1096 object created by <methodname>dumb_create</methodname>.
1097 </para>
1098 </listitem>
1099 <listitem>
1100 <synopsis>int (*dumb_map_offset)(struct drm_file *file_priv, struct drm_device *dev,
1101 uint32_t handle, uint64_t *offset);</synopsis>
1102 <para>
1103 The <methodname>dumb_map_offset</methodname> operation associates an
1104 mmap fake offset with the object given by the handle and returns
1105 it. Drivers must use the
1106 <function>drm_gem_create_mmap_offset</function> function to
1107 associate the fake offset as described in
1108 <xref linkend="drm-gem-objects-mapping"/>.
1109 </para>
1110 </listitem>
1111 </itemizedlist>
1112 <para>
1113 Note that dumb objects may not be used for gpu acceleration, as has been
1114 attempted on some ARM embedded platforms. Such drivers really must have
1115 a hardware-specific ioctl to allocate suitable buffer objects.
1116 </para>
1117 </sect2>
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1118 <sect2>
1119 <title>Output Polling</title>
1120 <synopsis>void (*output_poll_changed)(struct drm_device *dev);</synopsis>
1121 <para>
1122 This operation notifies the driver that the status of one or more
1123 connectors has changed. Drivers that use the fb helper can just call the
1124 <function>drm_fb_helper_hotplug_event</function> function to handle this
1125 operation.
1126 </para>
1127 </sect2>
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1128 <sect2>
1129 <title>Locking</title>
1130 <para>
1131 Beside some lookup structures with their own locking (which is hidden
1132 behind the interface functions) most of the modeset state is protected
1133 by the <code>dev-&lt;mode_config.lock</code> mutex and additionally
1134 per-crtc locks to allow cursor updates, pageflips and similar operations
1135 to occur concurrently with background tasks like output detection.
1136 Operations which cross domains like a full modeset always grab all
1137 locks. Drivers there need to protect resources shared between crtcs with
1138 additional locking. They also need to be careful to always grab the
1139 relevant crtc locks if a modset functions touches crtc state, e.g. for
1140 load detection (which does only grab the <code>mode_config.lock</code>
1141 to allow concurrent screen updates on live crtcs).
1142 </para>
1143 </sect2>
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1144 </sect1>
1145
1146 <!-- Internals: kms initialization and cleanup -->
1147
1148 <sect1 id="drm-kms-init">
1149 <title>KMS Initialization and Cleanup</title>
1150 <para>
1151 A KMS device is abstracted and exposed as a set of planes, CRTCs, encoders
1152 and connectors. KMS drivers must thus create and initialize all those
1153 objects at load time after initializing mode setting.
1154 </para>
1155 <sect2>
1156 <title>CRTCs (struct <structname>drm_crtc</structname>)</title>
1157 <para>
1158 A CRTC is an abstraction representing a part of the chip that contains a
1159 pointer to a scanout buffer. Therefore, the number of CRTCs available
1160 determines how many independent scanout buffers can be active at any
1161 given time. The CRTC structure contains several fields to support this:
1162 a pointer to some video memory (abstracted as a frame buffer object), a
1163 display mode, and an (x, y) offset into the video memory to support
1164 panning or configurations where one piece of video memory spans multiple
1165 CRTCs.
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1166 </para>
1167 <sect3>
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1168 <title>CRTC Initialization</title>
1169 <para>
1170 A KMS device must create and register at least one struct
1171 <structname>drm_crtc</structname> instance. The instance is allocated
1172 and zeroed by the driver, possibly as part of a larger structure, and
1173 registered with a call to <function>drm_crtc_init</function> with a
1174 pointer to CRTC functions.
1175 </para>
1176 </sect3>
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1177 </sect2>
1178 <sect2>
1179 <title>Planes (struct <structname>drm_plane</structname>)</title>
1180 <para>
1181 A plane represents an image source that can be blended with or overlayed
1182 on top of a CRTC during the scanout process. Planes are associated with
1183 a frame buffer to crop a portion of the image memory (source) and
1184 optionally scale it to a destination size. The result is then blended
1185 with or overlayed on top of a CRTC.
1186 </para>
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1187 <para>
1188 The DRM core recognizes three types of planes:
1189 <itemizedlist>
1190 <listitem>
1191 DRM_PLANE_TYPE_PRIMARY represents a "main" plane for a CRTC. Primary
ef21bf73 1192 planes are the planes operated upon by CRTC modesetting and flipping
f6da8c6e 1193 operations described in the page_flip hook in <structname>drm_crtc_funcs</structname>.
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1194 </listitem>
1195 <listitem>
1196 DRM_PLANE_TYPE_CURSOR represents a "cursor" plane for a CRTC. Cursor
1197 planes are the planes operated upon by the DRM_IOCTL_MODE_CURSOR and
1198 DRM_IOCTL_MODE_CURSOR2 ioctls.
1199 </listitem>
1200 <listitem>
1201 DRM_PLANE_TYPE_OVERLAY represents all non-primary, non-cursor planes.
1202 Some drivers refer to these types of planes as "sprites" internally.
1203 </listitem>
1204 </itemizedlist>
1205 For compatibility with legacy userspace, only overlay planes are made
1206 available to userspace by default. Userspace clients may set the
1207 DRM_CLIENT_CAP_UNIVERSAL_PLANES client capability bit to indicate that
1208 they wish to receive a universal plane list containing all plane types.
1209 </para>
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1210 <sect3>
1211 <title>Plane Initialization</title>
1212 <para>
6efa1f2f 1213 To create a plane, a KMS drivers allocates and
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1214 zeroes an instances of struct <structname>drm_plane</structname>
1215 (possibly as part of a larger structure) and registers it with a call
6efa1f2f 1216 to <function>drm_universal_plane_init</function>. The function takes a bitmask
9cad9c95 1217 of the CRTCs that can be associated with the plane, a pointer to the
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1218 plane functions, a list of format supported formats, and the type of
1219 plane (primary, cursor, or overlay) being initialized.
1220 </para>
1221 <para>
1222 Cursor and overlay planes are optional. All drivers should provide
1223 one primary plane per CRTC (although this requirement may change in
1224 the future); drivers that do not wish to provide special handling for
1225 primary planes may make use of the helper functions described in
1226 <xref linkend="drm-kms-planehelpers"/> to create and register a
1227 primary plane with standard capabilities.
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1228 </para>
1229 </sect3>
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1230 </sect2>
1231 <sect2>
1232 <title>Encoders (struct <structname>drm_encoder</structname>)</title>
1233 <para>
1234 An encoder takes pixel data from a CRTC and converts it to a format
1235 suitable for any attached connectors. On some devices, it may be
1236 possible to have a CRTC send data to more than one encoder. In that
1237 case, both encoders would receive data from the same scanout buffer,
1238 resulting in a "cloned" display configuration across the connectors
1239 attached to each encoder.
1240 </para>
1241 <sect3>
1242 <title>Encoder Initialization</title>
1243 <para>
1244 As for CRTCs, a KMS driver must create, initialize and register at
1245 least one struct <structname>drm_encoder</structname> instance. The
1246 instance is allocated and zeroed by the driver, possibly as part of a
1247 larger structure.
1248 </para>
1249 <para>
1250 Drivers must initialize the struct <structname>drm_encoder</structname>
1251 <structfield>possible_crtcs</structfield> and
1252 <structfield>possible_clones</structfield> fields before registering the
1253 encoder. Both fields are bitmasks of respectively the CRTCs that the
1254 encoder can be connected to, and sibling encoders candidate for cloning.
1255 </para>
1256 <para>
1257 After being initialized, the encoder must be registered with a call to
1258 <function>drm_encoder_init</function>. The function takes a pointer to
1259 the encoder functions and an encoder type. Supported types are
1260 <itemizedlist>
1261 <listitem>
1262 DRM_MODE_ENCODER_DAC for VGA and analog on DVI-I/DVI-A
1263 </listitem>
1264 <listitem>
1265 DRM_MODE_ENCODER_TMDS for DVI, HDMI and (embedded) DisplayPort
1266 </listitem>
1267 <listitem>
1268 DRM_MODE_ENCODER_LVDS for display panels
1269 </listitem>
1270 <listitem>
1271 DRM_MODE_ENCODER_TVDAC for TV output (Composite, S-Video, Component,
1272 SCART)
1273 </listitem>
1274 <listitem>
1275 DRM_MODE_ENCODER_VIRTUAL for virtual machine displays
1276 </listitem>
1277 </itemizedlist>
1278 </para>
1279 <para>
1280 Encoders must be attached to a CRTC to be used. DRM drivers leave
1281 encoders unattached at initialization time. Applications (or the fbdev
1282 compatibility layer when implemented) are responsible for attaching the
1283 encoders they want to use to a CRTC.
1284 </para>
1285 </sect3>
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1286 </sect2>
1287 <sect2>
1288 <title>Connectors (struct <structname>drm_connector</structname>)</title>
1289 <para>
1290 A connector is the final destination for pixel data on a device, and
1291 usually connects directly to an external display device like a monitor
1292 or laptop panel. A connector can only be attached to one encoder at a
1293 time. The connector is also the structure where information about the
1294 attached display is kept, so it contains fields for display data, EDID
1295 data, DPMS &amp; connection status, and information about modes
1296 supported on the attached displays.
1297 </para>
1298 <sect3>
1299 <title>Connector Initialization</title>
1300 <para>
1301 Finally a KMS driver must create, initialize, register and attach at
1302 least one struct <structname>drm_connector</structname> instance. The
1303 instance is created as other KMS objects and initialized by setting the
1304 following fields.
1305 </para>
1306 <variablelist>
1307 <varlistentry>
1308 <term><structfield>interlace_allowed</structfield></term>
1309 <listitem><para>
1310 Whether the connector can handle interlaced modes.
1311 </para></listitem>
1312 </varlistentry>
1313 <varlistentry>
1314 <term><structfield>doublescan_allowed</structfield></term>
1315 <listitem><para>
1316 Whether the connector can handle doublescan.
1317 </para></listitem>
1318 </varlistentry>
1319 <varlistentry>
1320 <term><structfield>display_info
1321 </structfield></term>
1322 <listitem><para>
1323 Display information is filled from EDID information when a display
1324 is detected. For non hot-pluggable displays such as flat panels in
1325 embedded systems, the driver should initialize the
1326 <structfield>display_info</structfield>.<structfield>width_mm</structfield>
1327 and
1328 <structfield>display_info</structfield>.<structfield>height_mm</structfield>
1329 fields with the physical size of the display.
1330 </para></listitem>
1331 </varlistentry>
1332 <varlistentry>
1333 <term id="drm-kms-connector-polled"><structfield>polled</structfield></term>
1334 <listitem><para>
1335 Connector polling mode, a combination of
1336 <variablelist>
1337 <varlistentry>
1338 <term>DRM_CONNECTOR_POLL_HPD</term>
1339 <listitem><para>
1340 The connector generates hotplug events and doesn't need to be
1341 periodically polled. The CONNECT and DISCONNECT flags must not
1342 be set together with the HPD flag.
1343 </para></listitem>
1344 </varlistentry>
1345 <varlistentry>
1346 <term>DRM_CONNECTOR_POLL_CONNECT</term>
1347 <listitem><para>
1348 Periodically poll the connector for connection.
1349 </para></listitem>
1350 </varlistentry>
1351 <varlistentry>
1352 <term>DRM_CONNECTOR_POLL_DISCONNECT</term>
1353 <listitem><para>
1354 Periodically poll the connector for disconnection.
1355 </para></listitem>
1356 </varlistentry>
1357 </variablelist>
1358 Set to 0 for connectors that don't support connection status
1359 discovery.
1360 </para></listitem>
1361 </varlistentry>
1362 </variablelist>
1363 <para>
1364 The connector is then registered with a call to
1365 <function>drm_connector_init</function> with a pointer to the connector
1366 functions and a connector type, and exposed through sysfs with a call to
34ea3d38 1367 <function>drm_connector_register</function>.
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1368 </para>
1369 <para>
1370 Supported connector types are
1371 <itemizedlist>
1372 <listitem>DRM_MODE_CONNECTOR_VGA</listitem>
1373 <listitem>DRM_MODE_CONNECTOR_DVII</listitem>
1374 <listitem>DRM_MODE_CONNECTOR_DVID</listitem>
1375 <listitem>DRM_MODE_CONNECTOR_DVIA</listitem>
1376 <listitem>DRM_MODE_CONNECTOR_Composite</listitem>
1377 <listitem>DRM_MODE_CONNECTOR_SVIDEO</listitem>
1378 <listitem>DRM_MODE_CONNECTOR_LVDS</listitem>
1379 <listitem>DRM_MODE_CONNECTOR_Component</listitem>
1380 <listitem>DRM_MODE_CONNECTOR_9PinDIN</listitem>
1381 <listitem>DRM_MODE_CONNECTOR_DisplayPort</listitem>
1382 <listitem>DRM_MODE_CONNECTOR_HDMIA</listitem>
1383 <listitem>DRM_MODE_CONNECTOR_HDMIB</listitem>
1384 <listitem>DRM_MODE_CONNECTOR_TV</listitem>
1385 <listitem>DRM_MODE_CONNECTOR_eDP</listitem>
1386 <listitem>DRM_MODE_CONNECTOR_VIRTUAL</listitem>
1387 </itemizedlist>
1388 </para>
1389 <para>
1390 Connectors must be attached to an encoder to be used. For devices that
1391 map connectors to encoders 1:1, the connector should be attached at
1392 initialization time with a call to
1393 <function>drm_mode_connector_attach_encoder</function>. The driver must
1394 also set the <structname>drm_connector</structname>
1395 <structfield>encoder</structfield> field to point to the attached
1396 encoder.
1397 </para>
1398 <para>
1399 Finally, drivers must initialize the connectors state change detection
1400 with a call to <function>drm_kms_helper_poll_init</function>. If at
1401 least one connector is pollable but can't generate hotplug interrupts
1402 (indicated by the DRM_CONNECTOR_POLL_CONNECT and
1403 DRM_CONNECTOR_POLL_DISCONNECT connector flags), a delayed work will
1404 automatically be queued to periodically poll for changes. Connectors
1405 that can generate hotplug interrupts must be marked with the
1406 DRM_CONNECTOR_POLL_HPD flag instead, and their interrupt handler must
1407 call <function>drm_helper_hpd_irq_event</function>. The function will
1408 queue a delayed work to check the state of all connectors, but no
1409 periodic polling will be done.
1410 </para>
1411 </sect3>
1412 <sect3>
1413 <title>Connector Operations</title>
1414 <note><para>
1415 Unless otherwise state, all operations are mandatory.
1416 </para></note>
1417 <sect4>
1418 <title>DPMS</title>
1419 <synopsis>void (*dpms)(struct drm_connector *connector, int mode);</synopsis>
1420 <para>
1421 The DPMS operation sets the power state of a connector. The mode
1422 argument is one of
1423 <itemizedlist>
1424 <listitem><para>DRM_MODE_DPMS_ON</para></listitem>
1425 <listitem><para>DRM_MODE_DPMS_STANDBY</para></listitem>
1426 <listitem><para>DRM_MODE_DPMS_SUSPEND</para></listitem>
1427 <listitem><para>DRM_MODE_DPMS_OFF</para></listitem>
1428 </itemizedlist>
1429 </para>
1430 <para>
1431 In all but DPMS_ON mode the encoder to which the connector is attached
1432 should put the display in low-power mode by driving its signals
1433 appropriately. If more than one connector is attached to the encoder
1434 care should be taken not to change the power state of other displays as
1435 a side effect. Low-power mode should be propagated to the encoders and
1436 CRTCs when all related connectors are put in low-power mode.
1437 </para>
1438 </sect4>
1439 <sect4>
1440 <title>Modes</title>
1441 <synopsis>int (*fill_modes)(struct drm_connector *connector, uint32_t max_width,
1442 uint32_t max_height);</synopsis>
1443 <para>
1444 Fill the mode list with all supported modes for the connector. If the
1445 <parameter>max_width</parameter> and <parameter>max_height</parameter>
1446 arguments are non-zero, the implementation must ignore all modes wider
1447 than <parameter>max_width</parameter> or higher than
1448 <parameter>max_height</parameter>.
1449 </para>
1450 <para>
1451 The connector must also fill in this operation its
1452 <structfield>display_info</structfield>
1453 <structfield>width_mm</structfield> and
1454 <structfield>height_mm</structfield> fields with the connected display
1455 physical size in millimeters. The fields should be set to 0 if the value
1456 isn't known or is not applicable (for instance for projector devices).
1457 </para>
1458 </sect4>
1459 <sect4>
1460 <title>Connection Status</title>
1461 <para>
1462 The connection status is updated through polling or hotplug events when
1463 supported (see <xref linkend="drm-kms-connector-polled"/>). The status
1464 value is reported to userspace through ioctls and must not be used
1465 inside the driver, as it only gets initialized by a call to
1466 <function>drm_mode_getconnector</function> from userspace.
1467 </para>
1468 <synopsis>enum drm_connector_status (*detect)(struct drm_connector *connector,
1469 bool force);</synopsis>
1470 <para>
1471 Check to see if anything is attached to the connector. The
1472 <parameter>force</parameter> parameter is set to false whilst polling or
1473 to true when checking the connector due to user request.
1474 <parameter>force</parameter> can be used by the driver to avoid
1475 expensive, destructive operations during automated probing.
1476 </para>
1477 <para>
1478 Return connector_status_connected if something is connected to the
1479 connector, connector_status_disconnected if nothing is connected and
1480 connector_status_unknown if the connection state isn't known.
1481 </para>
1482 <para>
1483 Drivers should only return connector_status_connected if the connection
1484 status has really been probed as connected. Connectors that can't detect
1485 the connection status, or failed connection status probes, should return
1486 connector_status_unknown.
1487 </para>
1488 </sect4>
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1489 </sect3>
1490 </sect2>
1491 <sect2>
1492 <title>Cleanup</title>
1493 <para>
1494 The DRM core manages its objects' lifetime. When an object is not needed
1495 anymore the core calls its destroy function, which must clean up and
1496 free every resource allocated for the object. Every
1497 <function>drm_*_init</function> call must be matched with a
1498 corresponding <function>drm_*_cleanup</function> call to cleanup CRTCs
1499 (<function>drm_crtc_cleanup</function>), planes
1500 (<function>drm_plane_cleanup</function>), encoders
1501 (<function>drm_encoder_cleanup</function>) and connectors
1502 (<function>drm_connector_cleanup</function>). Furthermore, connectors
1503 that have been added to sysfs must be removed by a call to
34ea3d38 1504 <function>drm_connector_unregister</function> before calling
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1505 <function>drm_connector_cleanup</function>.
1506 </para>
1507 <para>
1508 Connectors state change detection must be cleanup up with a call to
1509 <function>drm_kms_helper_poll_fini</function>.
1510 </para>
1511 </sect2>
1512 <sect2>
1513 <title>Output discovery and initialization example</title>
1514 <programlisting><![CDATA[
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1515void intel_crt_init(struct drm_device *dev)
1516{
1517 struct drm_connector *connector;
1518 struct intel_output *intel_output;
1519
1520 intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
1521 if (!intel_output)
1522 return;
1523
1524 connector = &intel_output->base;
1525 drm_connector_init(dev, &intel_output->base,
1526 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
1527
1528 drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
1529 DRM_MODE_ENCODER_DAC);
1530
1531 drm_mode_connector_attach_encoder(&intel_output->base,
1532 &intel_output->enc);
1533
1534 /* Set up the DDC bus. */
1535 intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
1536 if (!intel_output->ddc_bus) {
1537 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1538 "failed.\n");
1539 return;
1540 }
1541
1542 intel_output->type = INTEL_OUTPUT_ANALOG;
1543 connector->interlace_allowed = 0;
1544 connector->doublescan_allowed = 0;
1545
1546 drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
1547 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
1548
34ea3d38 1549 drm_connector_register(connector);
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1550}]]></programlisting>
1551 <para>
1552 In the example above (taken from the i915 driver), a CRTC, connector and
1553 encoder combination is created. A device-specific i2c bus is also
1554 created for fetching EDID data and performing monitor detection. Once
1555 the process is complete, the new connector is registered with sysfs to
1556 make its properties available to applications.
1557 </para>
2d2ef822 1558 </sect2>
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1559 <sect2>
1560 <title>KMS API Functions</title>
1561!Edrivers/gpu/drm/drm_crtc.c
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1562 </sect2>
1563 <sect2>
1564 <title>KMS Data Structures</title>
1565!Iinclude/drm/drm_crtc.h
065a50ed 1566 </sect2>
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1567 <sect2>
1568 <title>KMS Locking</title>
1569!Pdrivers/gpu/drm/drm_modeset_lock.c kms locking
1570!Iinclude/drm/drm_modeset_lock.h
1571!Edrivers/gpu/drm/drm_modeset_lock.c
1572 </sect2>
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1573 </sect1>
1574
e4949f29 1575 <!-- Internals: kms helper functions -->
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1576
1577 <sect1>
e4949f29 1578 <title>Mode Setting Helper Functions</title>
2d2ef822 1579 <para>
6efa1f2f 1580 The plane, CRTC, encoder and connector functions provided by the drivers
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1581 implement the DRM API. They're called by the DRM core and ioctl handlers
1582 to handle device state changes and configuration request. As implementing
1583 those functions often requires logic not specific to drivers, mid-layer
1584 helper functions are available to avoid duplicating boilerplate code.
1585 </para>
1586 <para>
1587 The DRM core contains one mid-layer implementation. The mid-layer provides
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1588 implementations of several plane, CRTC, encoder and connector functions
1589 (called from the top of the mid-layer) that pre-process requests and call
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1590 lower-level functions provided by the driver (at the bottom of the
1591 mid-layer). For instance, the
1592 <function>drm_crtc_helper_set_config</function> function can be used to
1593 fill the struct <structname>drm_crtc_funcs</structname>
1594 <structfield>set_config</structfield> field. When called, it will split
1595 the <methodname>set_config</methodname> operation in smaller, simpler
1596 operations and call the driver to handle them.
2d2ef822 1597 </para>
2d2ef822 1598 <para>
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1599 To use the mid-layer, drivers call <function>drm_crtc_helper_add</function>,
1600 <function>drm_encoder_helper_add</function> and
1601 <function>drm_connector_helper_add</function> functions to install their
1602 mid-layer bottom operations handlers, and fill the
1603 <structname>drm_crtc_funcs</structname>,
1604 <structname>drm_encoder_funcs</structname> and
1605 <structname>drm_connector_funcs</structname> structures with pointers to
1606 the mid-layer top API functions. Installing the mid-layer bottom operation
1607 handlers is best done right after registering the corresponding KMS object.
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1608 </para>
1609 <para>
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1610 The mid-layer is not split between CRTC, encoder and connector operations.
1611 To use it, a driver must provide bottom functions for all of the three KMS
1612 entities.
2d2ef822 1613 </para>
9cad9c95 1614 <sect2>
2be94971 1615 <title>Legacy CRTC Helper Operations</title>
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1616 <itemizedlist>
1617 <listitem id="drm-helper-crtc-mode-fixup">
1618 <synopsis>bool (*mode_fixup)(struct drm_crtc *crtc,
1619 const struct drm_display_mode *mode,
1620 struct drm_display_mode *adjusted_mode);</synopsis>
1621 <para>
1622 Let CRTCs adjust the requested mode or reject it completely. This
1623 operation returns true if the mode is accepted (possibly after being
1624 adjusted) or false if it is rejected.
1625 </para>
1626 <para>
1627 The <methodname>mode_fixup</methodname> operation should reject the
1628 mode if it can't reasonably use it. The definition of "reasonable"
1629 is currently fuzzy in this context. One possible behaviour would be
1630 to set the adjusted mode to the panel timings when a fixed-mode
1631 panel is used with hardware capable of scaling. Another behaviour
1632 would be to accept any input mode and adjust it to the closest mode
1633 supported by the hardware (FIXME: This needs to be clarified).
1634 </para>
1635 </listitem>
1636 <listitem>
1637 <synopsis>int (*mode_set_base)(struct drm_crtc *crtc, int x, int y,
1638 struct drm_framebuffer *old_fb)</synopsis>
1639 <para>
1640 Move the CRTC on the current frame buffer (stored in
1641 <literal>crtc-&gt;fb</literal>) to position (x,y). Any of the frame
1642 buffer, x position or y position may have been modified.
1643 </para>
1644 <para>
1645 This helper operation is optional. If not provided, the
1646 <function>drm_crtc_helper_set_config</function> function will fall
1647 back to the <methodname>mode_set</methodname> helper operation.
1648 </para>
1649 <note><para>
1650 FIXME: Why are x and y passed as arguments, as they can be accessed
1651 through <literal>crtc-&gt;x</literal> and
1652 <literal>crtc-&gt;y</literal>?
1653 </para></note>
1654 </listitem>
1655 <listitem>
1656 <synopsis>void (*prepare)(struct drm_crtc *crtc);</synopsis>
1657 <para>
1658 Prepare the CRTC for mode setting. This operation is called after
1659 validating the requested mode. Drivers use it to perform
1660 device-specific operations required before setting the new mode.
1661 </para>
1662 </listitem>
1663 <listitem>
1664 <synopsis>int (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode,
1665 struct drm_display_mode *adjusted_mode, int x, int y,
1666 struct drm_framebuffer *old_fb);</synopsis>
1667 <para>
1668 Set a new mode, position and frame buffer. Depending on the device
1669 requirements, the mode can be stored internally by the driver and
1670 applied in the <methodname>commit</methodname> operation, or
1671 programmed to the hardware immediately.
1672 </para>
1673 <para>
1674 The <methodname>mode_set</methodname> operation returns 0 on success
1675 or a negative error code if an error occurs.
1676 </para>
1677 </listitem>
1678 <listitem>
1679 <synopsis>void (*commit)(struct drm_crtc *crtc);</synopsis>
1680 <para>
1681 Commit a mode. This operation is called after setting the new mode.
1682 Upon return the device must use the new mode and be fully
1683 operational.
1684 </para>
1685 </listitem>
1686 </itemizedlist>
1687 </sect2>
1688 <sect2>
1689 <title>Encoder Helper Operations</title>
1690 <itemizedlist>
1691 <listitem>
1692 <synopsis>bool (*mode_fixup)(struct drm_encoder *encoder,
1693 const struct drm_display_mode *mode,
1694 struct drm_display_mode *adjusted_mode);</synopsis>
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1695 <para>
1696 Let encoders adjust the requested mode or reject it completely. This
1697 operation returns true if the mode is accepted (possibly after being
1698 adjusted) or false if it is rejected. See the
1699 <link linkend="drm-helper-crtc-mode-fixup">mode_fixup CRTC helper
1700 operation</link> for an explanation of the allowed adjustments.
1701 </para>
1702 </listitem>
1703 <listitem>
1704 <synopsis>void (*prepare)(struct drm_encoder *encoder);</synopsis>
1705 <para>
1706 Prepare the encoder for mode setting. This operation is called after
1707 validating the requested mode. Drivers use it to perform
1708 device-specific operations required before setting the new mode.
1709 </para>
1710 </listitem>
1711 <listitem>
1712 <synopsis>void (*mode_set)(struct drm_encoder *encoder,
1713 struct drm_display_mode *mode,
1714 struct drm_display_mode *adjusted_mode);</synopsis>
1715 <para>
1716 Set a new mode. Depending on the device requirements, the mode can
1717 be stored internally by the driver and applied in the
1718 <methodname>commit</methodname> operation, or programmed to the
1719 hardware immediately.
1720 </para>
1721 </listitem>
1722 <listitem>
1723 <synopsis>void (*commit)(struct drm_encoder *encoder);</synopsis>
1724 <para>
1725 Commit a mode. This operation is called after setting the new mode.
1726 Upon return the device must use the new mode and be fully
1727 operational.
1728 </para>
1729 </listitem>
1730 </itemizedlist>
1731 </sect2>
1732 <sect2>
1733 <title>Connector Helper Operations</title>
1734 <itemizedlist>
1735 <listitem>
1736 <synopsis>struct drm_encoder *(*best_encoder)(struct drm_connector *connector);</synopsis>
1737 <para>
1738 Return a pointer to the best encoder for the connecter. Device that
1739 map connectors to encoders 1:1 simply return the pointer to the
1740 associated encoder. This operation is mandatory.
1741 </para>
1742 </listitem>
1743 <listitem>
1744 <synopsis>int (*get_modes)(struct drm_connector *connector);</synopsis>
1745 <para>
1746 Fill the connector's <structfield>probed_modes</structfield> list
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1747 by parsing EDID data with <function>drm_add_edid_modes</function>,
1748 adding standard VESA DMT modes with <function>drm_add_modes_noedid</function>,
1749 or calling <function>drm_mode_probed_add</function> directly for every
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1750 supported mode and return the number of modes it has detected. This
1751 operation is mandatory.
1752 </para>
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1753 <para>
1754 Note that the caller function will automatically add standard VESA
1755 DMT modes up to 1024x768 if the <methodname>get_modes</methodname>
1756 helper operation returns no mode and if the connector status is
1757 connector_status_connected. There is no need to call
1758 <function>drm_add_edid_modes</function> manually in that case.
1759 </para>
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1760 <para>
1761 The <structfield>vrefresh</structfield> value is computed by
1762 <function>drm_helper_probe_single_connector_modes</function>.
1763 </para>
1764 <para>
f41c2581 1765 When parsing EDID data, <function>drm_add_edid_modes</function> fills the
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1766 connector <structfield>display_info</structfield>
1767 <structfield>width_mm</structfield> and
1768 <structfield>height_mm</structfield> fields. When creating modes
1769 manually the <methodname>get_modes</methodname> helper operation must
1770 set the <structfield>display_info</structfield>
1771 <structfield>width_mm</structfield> and
1772 <structfield>height_mm</structfield> fields if they haven't been set
065a5027 1773 already (for instance at initialization time when a fixed-size panel is
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1774 attached to the connector). The mode <structfield>width_mm</structfield>
1775 and <structfield>height_mm</structfield> fields are only used internally
1776 during EDID parsing and should not be set when creating modes manually.
1777 </para>
1778 </listitem>
1779 <listitem>
1780 <synopsis>int (*mode_valid)(struct drm_connector *connector,
1781 struct drm_display_mode *mode);</synopsis>
1782 <para>
1783 Verify whether a mode is valid for the connector. Return MODE_OK for
1784 supported modes and one of the enum drm_mode_status values (MODE_*)
f9b0e251 1785 for unsupported modes. This operation is optional.
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1786 </para>
1787 <para>
1788 As the mode rejection reason is currently not used beside for
1789 immediately removing the unsupported mode, an implementation can
1790 return MODE_BAD regardless of the exact reason why the mode is not
1791 valid.
1792 </para>
1793 <note><para>
1794 Note that the <methodname>mode_valid</methodname> helper operation is
1795 only called for modes detected by the device, and
1796 <emphasis>not</emphasis> for modes set by the user through the CRTC
1797 <methodname>set_config</methodname> operation.
1798 </para></note>
1799 </listitem>
1800 </itemizedlist>
1801 </sect2>
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1802 <sect2>
1803 <title>Atomic Modeset Helper Functions Reference</title>
1804 <sect3>
1805 <title>Overview</title>
1806!Pdrivers/gpu/drm/drm_atomic_helper.c overview
1807 </sect3>
1808 <sect3>
1809 <title>Implementing Asynchronous Atomic Commit</title>
1810!Pdrivers/gpu/drm/drm_atomic_helper.c implementing async commit
1811 </sect3>
1812 <sect3>
1813 <title>Atomic State Reset and Initialization</title>
1814!Pdrivers/gpu/drm/drm_atomic_helper.c atomic state reset and initialization
1815 </sect3>
dd275956 1816!Iinclude/drm/drm_atomic_helper.h
3150c7d0 1817!Edrivers/gpu/drm/drm_atomic_helper.c
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1818 </sect2>
1819 <sect2>
1820 <title>Modeset Helper Reference for Common Vtables</title>
1821!Iinclude/drm/drm_modeset_helper_vtables.h
1822!Pinclude/drm/drm_modeset_helper_vtables.h overview
3150c7d0 1823 </sect2>
0d4ed4c8 1824 <sect2>
2be94971 1825 <title>Legacy CRTC/Modeset Helper Functions Reference</title>
0d4ed4c8 1826!Edrivers/gpu/drm/drm_crtc_helper.c
3150c7d0 1827!Pdrivers/gpu/drm/drm_crtc_helper.c overview
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1828 </sect2>
1829 <sect2>
1830 <title>Output Probing Helper Functions Reference</title>
1831!Pdrivers/gpu/drm/drm_probe_helper.c output probing helper overview
1832!Edrivers/gpu/drm/drm_probe_helper.c
0d4ed4c8 1833 </sect2>
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1834 <sect2>
1835 <title>fbdev Helper Functions Reference</title>
1836!Pdrivers/gpu/drm/drm_fb_helper.c fbdev helpers
1837!Edrivers/gpu/drm/drm_fb_helper.c
207fd329 1838!Iinclude/drm/drm_fb_helper.h
d0ddc033 1839 </sect2>
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1840 <sect2>
1841 <title>Display Port Helper Functions Reference</title>
1842!Pdrivers/gpu/drm/drm_dp_helper.c dp helpers
1843!Iinclude/drm/drm_dp_helper.h
1844!Edrivers/gpu/drm/drm_dp_helper.c
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1845 </sect2>
1846 <sect2>
1847 <title>Display Port MST Helper Functions Reference</title>
1848!Pdrivers/gpu/drm/drm_dp_mst_topology.c dp mst helper
1849!Iinclude/drm/drm_dp_mst_helper.h
1850!Edrivers/gpu/drm/drm_dp_mst_topology.c
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1851 </sect2>
1852 <sect2>
1853 <title>MIPI DSI Helper Functions Reference</title>
1854!Pdrivers/gpu/drm/drm_mipi_dsi.c dsi helpers
1855!Iinclude/drm/drm_mipi_dsi.h
1856!Edrivers/gpu/drm/drm_mipi_dsi.c
28164fda 1857 </sect2>
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1858 <sect2>
1859 <title>EDID Helper Functions Reference</title>
1860!Edrivers/gpu/drm/drm_edid.c
1861 </sect2>
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1862 <sect2>
1863 <title>Rectangle Utilities Reference</title>
1864!Pinclude/drm/drm_rect.h rect utils
1865!Iinclude/drm/drm_rect.h
1866!Edrivers/gpu/drm/drm_rect.c
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1867 </sect2>
1868 <sect2>
1869 <title>Flip-work Helper Reference</title>
1870!Pinclude/drm/drm_flip_work.h flip utils
1871!Iinclude/drm/drm_flip_work.h
1872!Edrivers/gpu/drm/drm_flip_work.c
03973536 1873 </sect2>
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1874 <sect2>
1875 <title>HDMI Infoframes Helper Reference</title>
1876 <para>
1877 Strictly speaking this is not a DRM helper library but generally useable
1878 by any driver interfacing with HDMI outputs like v4l or alsa drivers.
1879 But it nicely fits into the overall topic of mode setting helper
1880 libraries and hence is also included here.
1881 </para>
1882!Iinclude/linux/hdmi.h
1883!Edrivers/video/hdmi.c
1884 </sect2>
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1885 <sect2>
1886 <title id="drm-kms-planehelpers">Plane Helper Reference</title>
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1887!Edrivers/gpu/drm/drm_plane_helper.c
1888!Pdrivers/gpu/drm/drm_plane_helper.c overview
6efa1f2f 1889 </sect2>
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1890 <sect2>
1891 <title>Tile group</title>
1892!Pdrivers/gpu/drm/drm_crtc.c Tile group
1893 </sect2>
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1894 <sect2>
1895 <title>Bridges</title>
1896 <sect3>
1897 <title>Overview</title>
1898!Pdrivers/gpu/drm/drm_bridge.c overview
1899 </sect3>
1900 <sect3>
1901 <title>Default bridge callback sequence</title>
1902!Pdrivers/gpu/drm/drm_bridge.c bridge callbacks
1903 </sect3>
1904!Edrivers/gpu/drm/drm_bridge.c
1905 </sect2>
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1906 </sect1>
1907
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1908 <!-- Internals: kms properties -->
1909
1910 <sect1 id="drm-kms-properties">
1911 <title>KMS Properties</title>
1912 <para>
1913 Drivers may need to expose additional parameters to applications than
1914 those described in the previous sections. KMS supports attaching
1915 properties to CRTCs, connectors and planes and offers a userspace API to
1916 list, get and set the property values.
1917 </para>
1918 <para>
1919 Properties are identified by a name that uniquely defines the property
1920 purpose, and store an associated value. For all property types except blob
1921 properties the value is a 64-bit unsigned integer.
1922 </para>
1923 <para>
1924 KMS differentiates between properties and property instances. Drivers
1925 first create properties and then create and associate individual instances
1926 of those properties to objects. A property can be instantiated multiple
1927 times and associated with different objects. Values are stored in property
9a6594fc 1928 instances, and all other property information are stored in the property
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1929 and shared between all instances of the property.
1930 </para>
1931 <para>
1932 Every property is created with a type that influences how the KMS core
1933 handles the property. Supported property types are
1934 <variablelist>
1935 <varlistentry>
1936 <term>DRM_MODE_PROP_RANGE</term>
1937 <listitem><para>Range properties report their minimum and maximum
1938 admissible values. The KMS core verifies that values set by
1939 application fit in that range.</para></listitem>
1940 </varlistentry>
1941 <varlistentry>
1942 <term>DRM_MODE_PROP_ENUM</term>
1943 <listitem><para>Enumerated properties take a numerical value that
1944 ranges from 0 to the number of enumerated values defined by the
1945 property minus one, and associate a free-formed string name to each
1946 value. Applications can retrieve the list of defined value-name pairs
1947 and use the numerical value to get and set property instance values.
1948 </para></listitem>
1949 </varlistentry>
1950 <varlistentry>
1951 <term>DRM_MODE_PROP_BITMASK</term>
1952 <listitem><para>Bitmask properties are enumeration properties that
1953 additionally restrict all enumerated values to the 0..63 range.
1954 Bitmask property instance values combine one or more of the
1955 enumerated bits defined by the property.</para></listitem>
1956 </varlistentry>
1957 <varlistentry>
1958 <term>DRM_MODE_PROP_BLOB</term>
1959 <listitem><para>Blob properties store a binary blob without any format
1960 restriction. The binary blobs are created as KMS standalone objects,
1961 and blob property instance values store the ID of their associated
1962 blob object.</para>
1963 <para>Blob properties are only used for the connector EDID property
1964 and cannot be created by drivers.</para></listitem>
1965 </varlistentry>
1966 </variablelist>
1967 </para>
1968 <para>
1969 To create a property drivers call one of the following functions depending
1970 on the property type. All property creation functions take property flags
1971 and name, as well as type-specific arguments.
1972 <itemizedlist>
1973 <listitem>
1974 <synopsis>struct drm_property *drm_property_create_range(struct drm_device *dev, int flags,
1975 const char *name,
1976 uint64_t min, uint64_t max);</synopsis>
1977 <para>Create a range property with the given minimum and maximum
1978 values.</para>
1979 </listitem>
1980 <listitem>
1981 <synopsis>struct drm_property *drm_property_create_enum(struct drm_device *dev, int flags,
1982 const char *name,
1983 const struct drm_prop_enum_list *props,
1984 int num_values);</synopsis>
1985 <para>Create an enumerated property. The <parameter>props</parameter>
1986 argument points to an array of <parameter>num_values</parameter>
1987 value-name pairs.</para>
1988 </listitem>
1989 <listitem>
1990 <synopsis>struct drm_property *drm_property_create_bitmask(struct drm_device *dev,
1991 int flags, const char *name,
1992 const struct drm_prop_enum_list *props,
1993 int num_values);</synopsis>
1994 <para>Create a bitmask property. The <parameter>props</parameter>
1995 argument points to an array of <parameter>num_values</parameter>
1996 value-name pairs.</para>
1997 </listitem>
1998 </itemizedlist>
1999 </para>
2000 <para>
2001 Properties can additionally be created as immutable, in which case they
2002 will be read-only for applications but can be modified by the driver. To
2003 create an immutable property drivers must set the DRM_MODE_PROP_IMMUTABLE
2004 flag at property creation time.
2005 </para>
2006 <para>
2007 When no array of value-name pairs is readily available at property
2008 creation time for enumerated or range properties, drivers can create
2009 the property using the <function>drm_property_create</function> function
2010 and manually add enumeration value-name pairs by calling the
2011 <function>drm_property_add_enum</function> function. Care must be taken to
2012 properly specify the property type through the <parameter>flags</parameter>
2013 argument.
2014 </para>
2015 <para>
2016 After creating properties drivers can attach property instances to CRTC,
2017 connector and plane objects by calling the
2018 <function>drm_object_attach_property</function>. The function takes a
2019 pointer to the target object, a pointer to the previously created property
2020 and an initial instance value.
2021 </para>
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2022 <sect2>
2023 <title>Existing KMS Properties</title>
2024 <para>
2025 The following table gives description of drm properties exposed by various
2026 modules/drivers.
2027 </para>
2028 <table border="1" cellpadding="0" cellspacing="0">
2029 <tbody>
2030 <tr style="font-weight: bold;">
2031 <td valign="top" >Owner Module/Drivers</td>
2032 <td valign="top" >Group</td>
2033 <td valign="top" >Property Name</td>
2034 <td valign="top" >Type</td>
2035 <td valign="top" >Property Values</td>
2036 <td valign="top" >Object attached</td>
2037 <td valign="top" >Description/Restrictions</td>
2038 </tr>
2039 <tr>
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2040 <td rowspan="37" valign="top" >DRM</td>
2041 <td valign="top" >Generic</td>
2042 <td valign="top" >“rotation”</td>
2043 <td valign="top" >BITMASK</td>
2044 <td valign="top" >{ 0, "rotate-0" },
2045 { 1, "rotate-90" },
2046 { 2, "rotate-180" },
2047 { 3, "rotate-270" },
2048 { 4, "reflect-x" },
2049 { 5, "reflect-y" }</td>
2050 <td valign="top" >CRTC, Plane</td>
2051 <td valign="top" >rotate-(degrees) rotates the image by the specified amount in degrees
2052 in counter clockwise direction. reflect-x and reflect-y reflects the
2053 image along the specified axis prior to rotation</td>
2054 </tr>
2055 <tr>
ae16c597 2056 <td rowspan="5" valign="top" >Connector</td>
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2057 <td valign="top" >“EDID”</td>
2058 <td valign="top" >BLOB | IMMUTABLE</td>
2059 <td valign="top" >0</td>
2060 <td valign="top" >Connector</td>
2061 <td valign="top" >Contains id of edid blob ptr object.</td>
2062 </tr>
2063 <tr>
2064 <td valign="top" >“DPMS”</td>
2065 <td valign="top" >ENUM</td>
2066 <td valign="top" >{ “On”, “Standby”, “Suspend”, “Off” }</td>
2067 <td valign="top" >Connector</td>
2068 <td valign="top" >Contains DPMS operation mode value.</td>
2069 </tr>
2070 <tr>
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DA
2071 <td valign="top" >“PATH”</td>
2072 <td valign="top" >BLOB | IMMUTABLE</td>
2073 <td valign="top" >0</td>
2074 <td valign="top" >Connector</td>
2075 <td valign="top" >Contains topology path to a connector.</td>
2076 </tr>
2077 <tr>
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2078 <td valign="top" >“TILE”</td>
2079 <td valign="top" >BLOB | IMMUTABLE</td>
2080 <td valign="top" >0</td>
2081 <td valign="top" >Connector</td>
2082 <td valign="top" >Contains tiling information for a connector.</td>
2083 </tr>
2084 <tr>
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RC
2085 <td valign="top" >“CRTC_ID”</td>
2086 <td valign="top" >OBJECT</td>
2087 <td valign="top" >DRM_MODE_OBJECT_CRTC</td>
2088 <td valign="top" >Connector</td>
2089 <td valign="top" >CRTC that connector is attached to (atomic)</td>
2090 </tr>
2091 <tr>
6b4959f4 2092 <td rowspan="11" valign="top" >Plane</td>
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2093 <td valign="top" >“type”</td>
2094 <td valign="top" >ENUM | IMMUTABLE</td>
2095 <td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
2096 <td valign="top" >Plane</td>
2097 <td valign="top" >Plane type</td>
2098 </tr>
2099 <tr>
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2100 <td valign="top" >“SRC_X”</td>
2101 <td valign="top" >RANGE</td>
2102 <td valign="top" >Min=0, Max=UINT_MAX</td>
2103 <td valign="top" >Plane</td>
2104 <td valign="top" >Scanout source x coordinate in 16.16 fixed point (atomic)</td>
2105 </tr>
2106 <tr>
2107 <td valign="top" >“SRC_Y”</td>
2108 <td valign="top" >RANGE</td>
2109 <td valign="top" >Min=0, Max=UINT_MAX</td>
2110 <td valign="top" >Plane</td>
2111 <td valign="top" >Scanout source y coordinate in 16.16 fixed point (atomic)</td>
2112 </tr>
2113 <tr>
2114 <td valign="top" >“SRC_W”</td>
2115 <td valign="top" >RANGE</td>
2116 <td valign="top" >Min=0, Max=UINT_MAX</td>
2117 <td valign="top" >Plane</td>
2118 <td valign="top" >Scanout source width in 16.16 fixed point (atomic)</td>
2119 </tr>
2120 <tr>
2121 <td valign="top" >“SRC_H”</td>
2122 <td valign="top" >RANGE</td>
2123 <td valign="top" >Min=0, Max=UINT_MAX</td>
2124 <td valign="top" >Plane</td>
2125 <td valign="top" >Scanout source height in 16.16 fixed point (atomic)</td>
2126 </tr>
2127 <tr>
2128 <td valign="top" >“CRTC_X”</td>
2129 <td valign="top" >SIGNED_RANGE</td>
2130 <td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
2131 <td valign="top" >Plane</td>
2132 <td valign="top" >Scanout CRTC (destination) x coordinate (atomic)</td>
2133 </tr>
2134 <tr>
2135 <td valign="top" >“CRTC_Y”</td>
2136 <td valign="top" >SIGNED_RANGE</td>
2137 <td valign="top" >Min=INT_MIN, Max=INT_MAX</td>
2138 <td valign="top" >Plane</td>
2139 <td valign="top" >Scanout CRTC (destination) y coordinate (atomic)</td>
2140 </tr>
2141 <tr>
2142 <td valign="top" >“CRTC_W”</td>
2143 <td valign="top" >RANGE</td>
2144 <td valign="top" >Min=0, Max=UINT_MAX</td>
2145 <td valign="top" >Plane</td>
2146 <td valign="top" >Scanout CRTC (destination) width (atomic)</td>
2147 </tr>
2148 <tr>
2149 <td valign="top" >“CRTC_H”</td>
2150 <td valign="top" >RANGE</td>
2151 <td valign="top" >Min=0, Max=UINT_MAX</td>
2152 <td valign="top" >Plane</td>
2153 <td valign="top" >Scanout CRTC (destination) height (atomic)</td>
2154 </tr>
2155 <tr>
2156 <td valign="top" >“FB_ID”</td>
2157 <td valign="top" >OBJECT</td>
2158 <td valign="top" >DRM_MODE_OBJECT_FB</td>
2159 <td valign="top" >Plane</td>
2160 <td valign="top" >Scanout framebuffer (atomic)</td>
2161 </tr>
2162 <tr>
2163 <td valign="top" >“CRTC_ID”</td>
2164 <td valign="top" >OBJECT</td>
2165 <td valign="top" >DRM_MODE_OBJECT_CRTC</td>
2166 <td valign="top" >Plane</td>
2167 <td valign="top" >CRTC that plane is attached to (atomic)</td>
2168 </tr>
2169 <tr>
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2170 <td rowspan="2" valign="top" >DVI-I</td>
2171 <td valign="top" >“subconnector”</td>
2172 <td valign="top" >ENUM</td>
2173 <td valign="top" >{ “Unknown”, “DVI-D”, “DVI-A” }</td>
2174 <td valign="top" >Connector</td>
2175 <td valign="top" >TBD</td>
2176 </tr>
2177 <tr>
2178 <td valign="top" >“select subconnector”</td>
2179 <td valign="top" >ENUM</td>
2180 <td valign="top" >{ “Automatic”, “DVI-D”, “DVI-A” }</td>
2181 <td valign="top" >Connector</td>
2182 <td valign="top" >TBD</td>
2183 </tr>
2184 <tr>
2185 <td rowspan="13" valign="top" >TV</td>
2186 <td valign="top" >“subconnector”</td>
2187 <td valign="top" >ENUM</td>
2188 <td valign="top" >{ "Unknown", "Composite", "SVIDEO", "Component", "SCART" }</td>
2189 <td valign="top" >Connector</td>
2190 <td valign="top" >TBD</td>
2191 </tr>
2192 <tr>
2193 <td valign="top" >“select subconnector”</td>
2194 <td valign="top" >ENUM</td>
2195 <td valign="top" >{ "Automatic", "Composite", "SVIDEO", "Component", "SCART" }</td>
2196 <td valign="top" >Connector</td>
2197 <td valign="top" >TBD</td>
2198 </tr>
2199 <tr>
2200 <td valign="top" >“mode”</td>
2201 <td valign="top" >ENUM</td>
2202 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2203 <td valign="top" >Connector</td>
2204 <td valign="top" >TBD</td>
2205 </tr>
2206 <tr>
2207 <td valign="top" >“left margin”</td>
2208 <td valign="top" >RANGE</td>
2209 <td valign="top" >Min=0, Max=100</td>
2210 <td valign="top" >Connector</td>
2211 <td valign="top" >TBD</td>
2212 </tr>
2213 <tr>
2214 <td valign="top" >“right margin”</td>
2215 <td valign="top" >RANGE</td>
2216 <td valign="top" >Min=0, Max=100</td>
2217 <td valign="top" >Connector</td>
2218 <td valign="top" >TBD</td>
2219 </tr>
2220 <tr>
2221 <td valign="top" >“top margin”</td>
2222 <td valign="top" >RANGE</td>
2223 <td valign="top" >Min=0, Max=100</td>
2224 <td valign="top" >Connector</td>
2225 <td valign="top" >TBD</td>
2226 </tr>
2227 <tr>
2228 <td valign="top" >“bottom margin”</td>
2229 <td valign="top" >RANGE</td>
2230 <td valign="top" >Min=0, Max=100</td>
2231 <td valign="top" >Connector</td>
2232 <td valign="top" >TBD</td>
2233 </tr>
2234 <tr>
2235 <td valign="top" >“brightness”</td>
2236 <td valign="top" >RANGE</td>
2237 <td valign="top" >Min=0, Max=100</td>
2238 <td valign="top" >Connector</td>
2239 <td valign="top" >TBD</td>
2240 </tr>
2241 <tr>
2242 <td valign="top" >“contrast”</td>
2243 <td valign="top" >RANGE</td>
2244 <td valign="top" >Min=0, Max=100</td>
2245 <td valign="top" >Connector</td>
2246 <td valign="top" >TBD</td>
2247 </tr>
2248 <tr>
2249 <td valign="top" >“flicker reduction”</td>
2250 <td valign="top" >RANGE</td>
2251 <td valign="top" >Min=0, Max=100</td>
2252 <td valign="top" >Connector</td>
2253 <td valign="top" >TBD</td>
2254 </tr>
2255 <tr>
2256 <td valign="top" >“overscan”</td>
2257 <td valign="top" >RANGE</td>
2258 <td valign="top" >Min=0, Max=100</td>
2259 <td valign="top" >Connector</td>
2260 <td valign="top" >TBD</td>
2261 </tr>
2262 <tr>
2263 <td valign="top" >“saturation”</td>
2264 <td valign="top" >RANGE</td>
2265 <td valign="top" >Min=0, Max=100</td>
2266 <td valign="top" >Connector</td>
2267 <td valign="top" >TBD</td>
2268 </tr>
2269 <tr>
2270 <td valign="top" >“hue”</td>
2271 <td valign="top" >RANGE</td>
2272 <td valign="top" >Min=0, Max=100</td>
2273 <td valign="top" >Connector</td>
2274 <td valign="top" >TBD</td>
2275 </tr>
2276 <tr>
5bb2bbf5
DA
2277 <td rowspan="2" valign="top" >Virtual GPU</td>
2278 <td valign="top" >“suggested X”</td>
2279 <td valign="top" >RANGE</td>
2280 <td valign="top" >Min=0, Max=0xffffffff</td>
2281 <td valign="top" >Connector</td>
2282 <td valign="top" >property to suggest an X offset for a connector</td>
2283 </tr>
2284 <tr>
2285 <td valign="top" >“suggested Y”</td>
2286 <td valign="top" >RANGE</td>
2287 <td valign="top" >Min=0, Max=0xffffffff</td>
2288 <td valign="top" >Connector</td>
2289 <td valign="top" >property to suggest an Y offset for a connector</td>
2290 </tr>
2291 <tr>
726a280d 2292 <td rowspan="3" valign="top" >Optional</td>
6c6a3996
SK
2293 <td valign="top" >“scaling mode”</td>
2294 <td valign="top" >ENUM</td>
2295 <td valign="top" >{ "None", "Full", "Center", "Full aspect" }</td>
2296 <td valign="top" >Connector</td>
2297 <td valign="top" >TBD</td>
2298 </tr>
2299 <tr>
726a280d
VK
2300 <td valign="top" >"aspect ratio"</td>
2301 <td valign="top" >ENUM</td>
2302 <td valign="top" >{ "None", "4:3", "16:9" }</td>
2303 <td valign="top" >Connector</td>
2304 <td valign="top" >DRM property to set aspect ratio from user space app.
2305 This enum is made generic to allow addition of custom aspect
2306 ratios.</td>
2307 </tr>
2308 <tr>
6c6a3996
SK
2309 <td valign="top" >“dirty”</td>
2310 <td valign="top" >ENUM | IMMUTABLE</td>
2311 <td valign="top" >{ "Off", "On", "Annotate" }</td>
2312 <td valign="top" >Connector</td>
2313 <td valign="top" >TBD</td>
2314 </tr>
2315 <tr>
712a0dd9 2316 <td rowspan="20" valign="top" >i915</td>
4ba08faa 2317 <td rowspan="2" valign="top" >Generic</td>
6c6a3996
SK
2318 <td valign="top" >"Broadcast RGB"</td>
2319 <td valign="top" >ENUM</td>
2320 <td valign="top" >{ "Automatic", "Full", "Limited 16:235" }</td>
2321 <td valign="top" >Connector</td>
2322 <td valign="top" >TBD</td>
2323 </tr>
2324 <tr>
2325 <td valign="top" >“audio”</td>
2326 <td valign="top" >ENUM</td>
2327 <td valign="top" >{ "force-dvi", "off", "auto", "on" }</td>
2328 <td valign="top" >Connector</td>
2329 <td valign="top" >TBD</td>
2330 </tr>
2331 <tr>
6c6a3996
SK
2332 <td rowspan="17" valign="top" >SDVO-TV</td>
2333 <td valign="top" >“mode”</td>
2334 <td valign="top" >ENUM</td>
2335 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2336 <td valign="top" >Connector</td>
2337 <td valign="top" >TBD</td>
2338 </tr>
2339 <tr>
2340 <td valign="top" >"left_margin"</td>
2341 <td valign="top" >RANGE</td>
2342 <td valign="top" >Min=0, Max= SDVO dependent</td>
2343 <td valign="top" >Connector</td>
2344 <td valign="top" >TBD</td>
2345 </tr>
2346 <tr>
2347 <td valign="top" >"right_margin"</td>
2348 <td valign="top" >RANGE</td>
2349 <td valign="top" >Min=0, Max= SDVO dependent</td>
2350 <td valign="top" >Connector</td>
2351 <td valign="top" >TBD</td>
2352 </tr>
2353 <tr>
2354 <td valign="top" >"top_margin"</td>
2355 <td valign="top" >RANGE</td>
2356 <td valign="top" >Min=0, Max= SDVO dependent</td>
2357 <td valign="top" >Connector</td>
2358 <td valign="top" >TBD</td>
2359 </tr>
2360 <tr>
2361 <td valign="top" >"bottom_margin"</td>
2362 <td valign="top" >RANGE</td>
2363 <td valign="top" >Min=0, Max= SDVO dependent</td>
2364 <td valign="top" >Connector</td>
2365 <td valign="top" >TBD</td>
2366 </tr>
2367 <tr>
2368 <td valign="top" >“hpos”</td>
2369 <td valign="top" >RANGE</td>
2370 <td valign="top" >Min=0, Max= SDVO dependent</td>
2371 <td valign="top" >Connector</td>
2372 <td valign="top" >TBD</td>
2373 </tr>
2374 <tr>
2375 <td valign="top" >“vpos”</td>
2376 <td valign="top" >RANGE</td>
2377 <td valign="top" >Min=0, Max= SDVO dependent</td>
2378 <td valign="top" >Connector</td>
2379 <td valign="top" >TBD</td>
2380 </tr>
2381 <tr>
2382 <td valign="top" >“contrast”</td>
2383 <td valign="top" >RANGE</td>
2384 <td valign="top" >Min=0, Max= SDVO dependent</td>
2385 <td valign="top" >Connector</td>
2386 <td valign="top" >TBD</td>
2387 </tr>
2388 <tr>
2389 <td valign="top" >“saturation”</td>
2390 <td valign="top" >RANGE</td>
2391 <td valign="top" >Min=0, Max= SDVO dependent</td>
2392 <td valign="top" >Connector</td>
2393 <td valign="top" >TBD</td>
2394 </tr>
2395 <tr>
2396 <td valign="top" >“hue”</td>
2397 <td valign="top" >RANGE</td>
2398 <td valign="top" >Min=0, Max= SDVO dependent</td>
2399 <td valign="top" >Connector</td>
2400 <td valign="top" >TBD</td>
2401 </tr>
2402 <tr>
2403 <td valign="top" >“sharpness”</td>
2404 <td valign="top" >RANGE</td>
2405 <td valign="top" >Min=0, Max= SDVO dependent</td>
2406 <td valign="top" >Connector</td>
2407 <td valign="top" >TBD</td>
2408 </tr>
2409 <tr>
2410 <td valign="top" >“flicker_filter”</td>
2411 <td valign="top" >RANGE</td>
2412 <td valign="top" >Min=0, Max= SDVO dependent</td>
2413 <td valign="top" >Connector</td>
2414 <td valign="top" >TBD</td>
2415 </tr>
2416 <tr>
2417 <td valign="top" >“flicker_filter_adaptive”</td>
2418 <td valign="top" >RANGE</td>
2419 <td valign="top" >Min=0, Max= SDVO dependent</td>
2420 <td valign="top" >Connector</td>
2421 <td valign="top" >TBD</td>
2422 </tr>
2423 <tr>
2424 <td valign="top" >“flicker_filter_2d”</td>
2425 <td valign="top" >RANGE</td>
2426 <td valign="top" >Min=0, Max= SDVO dependent</td>
2427 <td valign="top" >Connector</td>
2428 <td valign="top" >TBD</td>
2429 </tr>
2430 <tr>
2431 <td valign="top" >“tv_chroma_filter”</td>
2432 <td valign="top" >RANGE</td>
2433 <td valign="top" >Min=0, Max= SDVO dependent</td>
2434 <td valign="top" >Connector</td>
2435 <td valign="top" >TBD</td>
2436 </tr>
2437 <tr>
2438 <td valign="top" >“tv_luma_filter”</td>
2439 <td valign="top" >RANGE</td>
2440 <td valign="top" >Min=0, Max= SDVO dependent</td>
2441 <td valign="top" >Connector</td>
2442 <td valign="top" >TBD</td>
2443 </tr>
2444 <tr>
2445 <td valign="top" >“dot_crawl”</td>
2446 <td valign="top" >RANGE</td>
2447 <td valign="top" >Min=0, Max=1</td>
2448 <td valign="top" >Connector</td>
2449 <td valign="top" >TBD</td>
2450 </tr>
2451 <tr>
2452 <td valign="top" >SDVO-TV/LVDS</td>
2453 <td valign="top" >“brightness”</td>
2454 <td valign="top" >RANGE</td>
2455 <td valign="top" >Min=0, Max= SDVO dependent</td>
2456 <td valign="top" >Connector</td>
2457 <td valign="top" >TBD</td>
2458 </tr>
2459 <tr>
4ba08faa
SK
2460 <td rowspan="2" valign="top" >CDV gma-500</td>
2461 <td rowspan="2" valign="top" >Generic</td>
6c6a3996
SK
2462 <td valign="top" >"Broadcast RGB"</td>
2463 <td valign="top" >ENUM</td>
2464 <td valign="top" >{ “Full”, “Limited 16:235” }</td>
2465 <td valign="top" >Connector</td>
2466 <td valign="top" >TBD</td>
2467 </tr>
2468 <tr>
2469 <td valign="top" >"Broadcast RGB"</td>
2470 <td valign="top" >ENUM</td>
2471 <td valign="top" >{ “off”, “auto”, “on” }</td>
2472 <td valign="top" >Connector</td>
2473 <td valign="top" >TBD</td>
2474 </tr>
2475 <tr>
4ba08faa
SK
2476 <td rowspan="19" valign="top" >Poulsbo</td>
2477 <td rowspan="1" valign="top" >Generic</td>
6c6a3996
SK
2478 <td valign="top" >“backlight”</td>
2479 <td valign="top" >RANGE</td>
2480 <td valign="top" >Min=0, Max=100</td>
2481 <td valign="top" >Connector</td>
2482 <td valign="top" >TBD</td>
2483 </tr>
2484 <tr>
6c6a3996
SK
2485 <td rowspan="17" valign="top" >SDVO-TV</td>
2486 <td valign="top" >“mode”</td>
2487 <td valign="top" >ENUM</td>
2488 <td valign="top" >{ "NTSC_M", "NTSC_J", "NTSC_443", "PAL_B" } etc.</td>
2489 <td valign="top" >Connector</td>
2490 <td valign="top" >TBD</td>
2491 </tr>
2492 <tr>
2493 <td valign="top" >"left_margin"</td>
2494 <td valign="top" >RANGE</td>
2495 <td valign="top" >Min=0, Max= SDVO dependent</td>
2496 <td valign="top" >Connector</td>
2497 <td valign="top" >TBD</td>
2498 </tr>
2499 <tr>
2500 <td valign="top" >"right_margin"</td>
2501 <td valign="top" >RANGE</td>
2502 <td valign="top" >Min=0, Max= SDVO dependent</td>
2503 <td valign="top" >Connector</td>
2504 <td valign="top" >TBD</td>
2505 </tr>
2506 <tr>
2507 <td valign="top" >"top_margin"</td>
2508 <td valign="top" >RANGE</td>
2509 <td valign="top" >Min=0, Max= SDVO dependent</td>
2510 <td valign="top" >Connector</td>
2511 <td valign="top" >TBD</td>
2512 </tr>
2513 <tr>
2514 <td valign="top" >"bottom_margin"</td>
2515 <td valign="top" >RANGE</td>
2516 <td valign="top" >Min=0, Max= SDVO dependent</td>
2517 <td valign="top" >Connector</td>
2518 <td valign="top" >TBD</td>
2519 </tr>
2520 <tr>
2521 <td valign="top" >“hpos”</td>
2522 <td valign="top" >RANGE</td>
2523 <td valign="top" >Min=0, Max= SDVO dependent</td>
2524 <td valign="top" >Connector</td>
2525 <td valign="top" >TBD</td>
2526 </tr>
2527 <tr>
2528 <td valign="top" >“vpos”</td>
2529 <td valign="top" >RANGE</td>
2530 <td valign="top" >Min=0, Max= SDVO dependent</td>
2531 <td valign="top" >Connector</td>
2532 <td valign="top" >TBD</td>
2533 </tr>
2534 <tr>
2535 <td valign="top" >“contrast”</td>
2536 <td valign="top" >RANGE</td>
2537 <td valign="top" >Min=0, Max= SDVO dependent</td>
2538 <td valign="top" >Connector</td>
2539 <td valign="top" >TBD</td>
2540 </tr>
2541 <tr>
2542 <td valign="top" >“saturation”</td>
2543 <td valign="top" >RANGE</td>
2544 <td valign="top" >Min=0, Max= SDVO dependent</td>
2545 <td valign="top" >Connector</td>
2546 <td valign="top" >TBD</td>
2547 </tr>
2548 <tr>
2549 <td valign="top" >“hue”</td>
2550 <td valign="top" >RANGE</td>
2551 <td valign="top" >Min=0, Max= SDVO dependent</td>
2552 <td valign="top" >Connector</td>
2553 <td valign="top" >TBD</td>
2554 </tr>
2555 <tr>
2556 <td valign="top" >“sharpness”</td>
2557 <td valign="top" >RANGE</td>
2558 <td valign="top" >Min=0, Max= SDVO dependent</td>
2559 <td valign="top" >Connector</td>
2560 <td valign="top" >TBD</td>
2561 </tr>
2562 <tr>
2563 <td valign="top" >“flicker_filter”</td>
2564 <td valign="top" >RANGE</td>
2565 <td valign="top" >Min=0, Max= SDVO dependent</td>
2566 <td valign="top" >Connector</td>
2567 <td valign="top" >TBD</td>
2568 </tr>
2569 <tr>
2570 <td valign="top" >“flicker_filter_adaptive”</td>
2571 <td valign="top" >RANGE</td>
2572 <td valign="top" >Min=0, Max= SDVO dependent</td>
2573 <td valign="top" >Connector</td>
2574 <td valign="top" >TBD</td>
2575 </tr>
2576 <tr>
2577 <td valign="top" >“flicker_filter_2d”</td>
2578 <td valign="top" >RANGE</td>
2579 <td valign="top" >Min=0, Max= SDVO dependent</td>
2580 <td valign="top" >Connector</td>
2581 <td valign="top" >TBD</td>
2582 </tr>
2583 <tr>
2584 <td valign="top" >“tv_chroma_filter”</td>
2585 <td valign="top" >RANGE</td>
2586 <td valign="top" >Min=0, Max= SDVO dependent</td>
2587 <td valign="top" >Connector</td>
2588 <td valign="top" >TBD</td>
2589 </tr>
2590 <tr>
2591 <td valign="top" >“tv_luma_filter”</td>
2592 <td valign="top" >RANGE</td>
2593 <td valign="top" >Min=0, Max= SDVO dependent</td>
2594 <td valign="top" >Connector</td>
2595 <td valign="top" >TBD</td>
2596 </tr>
2597 <tr>
2598 <td valign="top" >“dot_crawl”</td>
2599 <td valign="top" >RANGE</td>
2600 <td valign="top" >Min=0, Max=1</td>
2601 <td valign="top" >Connector</td>
2602 <td valign="top" >TBD</td>
2603 </tr>
2604 <tr>
2605 <td valign="top" >SDVO-TV/LVDS</td>
2606 <td valign="top" >“brightness”</td>
2607 <td valign="top" >RANGE</td>
2608 <td valign="top" >Min=0, Max= SDVO dependent</td>
2609 <td valign="top" >Connector</td>
2610 <td valign="top" >TBD</td>
2611 </tr>
2612 <tr>
2613 <td rowspan="11" valign="top" >armada</td>
2614 <td rowspan="2" valign="top" >CRTC</td>
2615 <td valign="top" >"CSC_YUV"</td>
2616 <td valign="top" >ENUM</td>
2617 <td valign="top" >{ "Auto" , "CCIR601", "CCIR709" }</td>
2618 <td valign="top" >CRTC</td>
2619 <td valign="top" >TBD</td>
2620 </tr>
2621 <tr>
2622 <td valign="top" >"CSC_RGB"</td>
2623 <td valign="top" >ENUM</td>
2624 <td valign="top" >{ "Auto", "Computer system", "Studio" }</td>
2625 <td valign="top" >CRTC</td>
2626 <td valign="top" >TBD</td>
2627 </tr>
2628 <tr>
2629 <td rowspan="9" valign="top" >Overlay</td>
2630 <td valign="top" >"colorkey"</td>
2631 <td valign="top" >RANGE</td>
2632 <td valign="top" >Min=0, Max=0xffffff</td>
2633 <td valign="top" >Plane</td>
2634 <td valign="top" >TBD</td>
2635 </tr>
2636 <tr>
2637 <td valign="top" >"colorkey_min"</td>
2638 <td valign="top" >RANGE</td>
2639 <td valign="top" >Min=0, Max=0xffffff</td>
2640 <td valign="top" >Plane</td>
2641 <td valign="top" >TBD</td>
2642 </tr>
2643 <tr>
2644 <td valign="top" >"colorkey_max"</td>
2645 <td valign="top" >RANGE</td>
2646 <td valign="top" >Min=0, Max=0xffffff</td>
2647 <td valign="top" >Plane</td>
2648 <td valign="top" >TBD</td>
2649 </tr>
2650 <tr>
2651 <td valign="top" >"colorkey_val"</td>
2652 <td valign="top" >RANGE</td>
2653 <td valign="top" >Min=0, Max=0xffffff</td>
2654 <td valign="top" >Plane</td>
2655 <td valign="top" >TBD</td>
2656 </tr>
2657 <tr>
2658 <td valign="top" >"colorkey_alpha"</td>
2659 <td valign="top" >RANGE</td>
2660 <td valign="top" >Min=0, Max=0xffffff</td>
2661 <td valign="top" >Plane</td>
2662 <td valign="top" >TBD</td>
2663 </tr>
2664 <tr>
2665 <td valign="top" >"colorkey_mode"</td>
2666 <td valign="top" >ENUM</td>
2667 <td valign="top" >{ "disabled", "Y component", "U component"
2668 , "V component", "RGB", “R component", "G component", "B component" }</td>
2669 <td valign="top" >Plane</td>
2670 <td valign="top" >TBD</td>
2671 </tr>
2672 <tr>
2673 <td valign="top" >"brightness"</td>
2674 <td valign="top" >RANGE</td>
2675 <td valign="top" >Min=0, Max=256 + 255</td>
2676 <td valign="top" >Plane</td>
2677 <td valign="top" >TBD</td>
2678 </tr>
2679 <tr>
2680 <td valign="top" >"contrast"</td>
2681 <td valign="top" >RANGE</td>
2682 <td valign="top" >Min=0, Max=0x7fff</td>
2683 <td valign="top" >Plane</td>
2684 <td valign="top" >TBD</td>
2685 </tr>
2686 <tr>
2687 <td valign="top" >"saturation"</td>
2688 <td valign="top" >RANGE</td>
2689 <td valign="top" >Min=0, Max=0x7fff</td>
2690 <td valign="top" >Plane</td>
2691 <td valign="top" >TBD</td>
2692 </tr>
2693 <tr>
2694 <td rowspan="2" valign="top" >exynos</td>
2695 <td valign="top" >CRTC</td>
2696 <td valign="top" >“mode”</td>
2697 <td valign="top" >ENUM</td>
2698 <td valign="top" >{ "normal", "blank" }</td>
2699 <td valign="top" >CRTC</td>
2700 <td valign="top" >TBD</td>
2701 </tr>
2702 <tr>
2703 <td valign="top" >Overlay</td>
2704 <td valign="top" >“zpos”</td>
2705 <td valign="top" >RANGE</td>
2706 <td valign="top" >Min=0, Max=MAX_PLANE-1</td>
2707 <td valign="top" >Plane</td>
2708 <td valign="top" >TBD</td>
2709 </tr>
2710 <tr>
4ba08faa 2711 <td rowspan="2" valign="top" >i2c/ch7006_drv</td>
6c6a3996
SK
2712 <td valign="top" >Generic</td>
2713 <td valign="top" >“scale”</td>
2714 <td valign="top" >RANGE</td>
2715 <td valign="top" >Min=0, Max=2</td>
2716 <td valign="top" >Connector</td>
2717 <td valign="top" >TBD</td>
2718 </tr>
2719 <tr>
4ba08faa 2720 <td rowspan="1" valign="top" >TV</td>
6c6a3996
SK
2721 <td valign="top" >“mode”</td>
2722 <td valign="top" >ENUM</td>
2723 <td valign="top" >{ "PAL", "PAL-M","PAL-N"}, ”PAL-Nc"
2724 , "PAL-60", "NTSC-M", "NTSC-J" }</td>
2725 <td valign="top" >Connector</td>
2726 <td valign="top" >TBD</td>
2727 </tr>
2728 <tr>
4ba08faa 2729 <td rowspan="15" valign="top" >nouveau</td>
6c6a3996
SK
2730 <td rowspan="6" valign="top" >NV10 Overlay</td>
2731 <td valign="top" >"colorkey"</td>
2732 <td valign="top" >RANGE</td>
2733 <td valign="top" >Min=0, Max=0x01ffffff</td>
2734 <td valign="top" >Plane</td>
2735 <td valign="top" >TBD</td>
2736 </tr>
2737 <tr>
2738 <td valign="top" >“contrast”</td>
2739 <td valign="top" >RANGE</td>
2740 <td valign="top" >Min=0, Max=8192-1</td>
2741 <td valign="top" >Plane</td>
2742 <td valign="top" >TBD</td>
2743 </tr>
2744 <tr>
2745 <td valign="top" >“brightness”</td>
2746 <td valign="top" >RANGE</td>
2747 <td valign="top" >Min=0, Max=1024</td>
2748 <td valign="top" >Plane</td>
2749 <td valign="top" >TBD</td>
2750 </tr>
2751 <tr>
2752 <td valign="top" >“hue”</td>
2753 <td valign="top" >RANGE</td>
2754 <td valign="top" >Min=0, Max=359</td>
2755 <td valign="top" >Plane</td>
2756 <td valign="top" >TBD</td>
2757 </tr>
2758 <tr>
2759 <td valign="top" >“saturation”</td>
2760 <td valign="top" >RANGE</td>
2761 <td valign="top" >Min=0, Max=8192-1</td>
2762 <td valign="top" >Plane</td>
2763 <td valign="top" >TBD</td>
2764 </tr>
2765 <tr>
2766 <td valign="top" >“iturbt_709”</td>
2767 <td valign="top" >RANGE</td>
2768 <td valign="top" >Min=0, Max=1</td>
2769 <td valign="top" >Plane</td>
2770 <td valign="top" >TBD</td>
2771 </tr>
2772 <tr>
2773 <td rowspan="2" valign="top" >Nv04 Overlay</td>
2774 <td valign="top" >“colorkey”</td>
2775 <td valign="top" >RANGE</td>
2776 <td valign="top" >Min=0, Max=0x01ffffff</td>
2777 <td valign="top" >Plane</td>
2778 <td valign="top" >TBD</td>
2779 </tr>
2780 <tr>
2781 <td valign="top" >“brightness”</td>
2782 <td valign="top" >RANGE</td>
2783 <td valign="top" >Min=0, Max=1024</td>
2784 <td valign="top" >Plane</td>
2785 <td valign="top" >TBD</td>
2786 </tr>
2787 <tr>
2788 <td rowspan="7" valign="top" >Display</td>
2789 <td valign="top" >“dithering mode”</td>
2790 <td valign="top" >ENUM</td>
2791 <td valign="top" >{ "auto", "off", "on" }</td>
2792 <td valign="top" >Connector</td>
2793 <td valign="top" >TBD</td>
2794 </tr>
2795 <tr>
2796 <td valign="top" >“dithering depth”</td>
2797 <td valign="top" >ENUM</td>
2798 <td valign="top" >{ "auto", "off", "on", "static 2x2", "dynamic 2x2", "temporal" }</td>
2799 <td valign="top" >Connector</td>
2800 <td valign="top" >TBD</td>
2801 </tr>
2802 <tr>
2803 <td valign="top" >“underscan”</td>
2804 <td valign="top" >ENUM</td>
2805 <td valign="top" >{ "auto", "6 bpc", "8 bpc" }</td>
2806 <td valign="top" >Connector</td>
2807 <td valign="top" >TBD</td>
2808 </tr>
2809 <tr>
2810 <td valign="top" >“underscan hborder”</td>
2811 <td valign="top" >RANGE</td>
2812 <td valign="top" >Min=0, Max=128</td>
2813 <td valign="top" >Connector</td>
2814 <td valign="top" >TBD</td>
2815 </tr>
2816 <tr>
2817 <td valign="top" >“underscan vborder”</td>
2818 <td valign="top" >RANGE</td>
2819 <td valign="top" >Min=0, Max=128</td>
2820 <td valign="top" >Connector</td>
2821 <td valign="top" >TBD</td>
2822 </tr>
2823 <tr>
2824 <td valign="top" >“vibrant hue”</td>
2825 <td valign="top" >RANGE</td>
2826 <td valign="top" >Min=0, Max=180</td>
2827 <td valign="top" >Connector</td>
2828 <td valign="top" >TBD</td>
2829 </tr>
2830 <tr>
2831 <td valign="top" >“color vibrance”</td>
2832 <td valign="top" >RANGE</td>
2833 <td valign="top" >Min=0, Max=200</td>
2834 <td valign="top" >Connector</td>
2835 <td valign="top" >TBD</td>
2836 </tr>
2837 <tr>
d4acc165 2838 <td valign="top" >omap</td>
712a0dd9 2839 <td valign="top" >Generic</td>
6c6a3996
SK
2840 <td valign="top" >“zorder”</td>
2841 <td valign="top" >RANGE</td>
2842 <td valign="top" >Min=0, Max=3</td>
2843 <td valign="top" >CRTC, Plane</td>
2844 <td valign="top" >TBD</td>
2845 </tr>
2846 <tr>
2847 <td valign="top" >qxl</td>
2848 <td valign="top" >Generic</td>
2849 <td valign="top" >“hotplug_mode_update"</td>
2850 <td valign="top" >RANGE</td>
2851 <td valign="top" >Min=0, Max=1</td>
2852 <td valign="top" >Connector</td>
2853 <td valign="top" >TBD</td>
2854 </tr>
2855 <tr>
4ba08faa 2856 <td rowspan="9" valign="top" >radeon</td>
6c6a3996
SK
2857 <td valign="top" >DVI-I</td>
2858 <td valign="top" >“coherent”</td>
2859 <td valign="top" >RANGE</td>
2860 <td valign="top" >Min=0, Max=1</td>
2861 <td valign="top" >Connector</td>
2862 <td valign="top" >TBD</td>
2863 </tr>
2864 <tr>
2865 <td valign="top" >DAC enable load detect</td>
2866 <td valign="top" >“load detection”</td>
2867 <td valign="top" >RANGE</td>
2868 <td valign="top" >Min=0, Max=1</td>
2869 <td valign="top" >Connector</td>
2870 <td valign="top" >TBD</td>
2871 </tr>
2872 <tr>
2873 <td valign="top" >TV Standard</td>
2874 <td valign="top" >"tv standard"</td>
2875 <td valign="top" >ENUM</td>
2876 <td valign="top" >{ "ntsc", "pal", "pal-m", "pal-60", "ntsc-j"
2877 , "scart-pal", "pal-cn", "secam" }</td>
2878 <td valign="top" >Connector</td>
2879 <td valign="top" >TBD</td>
2880 </tr>
2881 <tr>
2882 <td valign="top" >legacy TMDS PLL detect</td>
2883 <td valign="top" >"tmds_pll"</td>
2884 <td valign="top" >ENUM</td>
2885 <td valign="top" >{ "driver", "bios" }</td>
2886 <td valign="top" >-</td>
2887 <td valign="top" >TBD</td>
2888 </tr>
2889 <tr>
2890 <td rowspan="3" valign="top" >Underscan</td>
2891 <td valign="top" >"underscan"</td>
2892 <td valign="top" >ENUM</td>
2893 <td valign="top" >{ "off", "on", "auto" }</td>
2894 <td valign="top" >Connector</td>
2895 <td valign="top" >TBD</td>
2896 </tr>
2897 <tr>
2898 <td valign="top" >"underscan hborder"</td>
2899 <td valign="top" >RANGE</td>
2900 <td valign="top" >Min=0, Max=128</td>
2901 <td valign="top" >Connector</td>
2902 <td valign="top" >TBD</td>
2903 </tr>
2904 <tr>
2905 <td valign="top" >"underscan vborder"</td>
2906 <td valign="top" >RANGE</td>
2907 <td valign="top" >Min=0, Max=128</td>
2908 <td valign="top" >Connector</td>
2909 <td valign="top" >TBD</td>
2910 </tr>
2911 <tr>
2912 <td valign="top" >Audio</td>
2913 <td valign="top" >“audio”</td>
2914 <td valign="top" >ENUM</td>
2915 <td valign="top" >{ "off", "on", "auto" }</td>
2916 <td valign="top" >Connector</td>
2917 <td valign="top" >TBD</td>
2918 </tr>
2919 <tr>
2920 <td valign="top" >FMT Dithering</td>
2921 <td valign="top" >“dither”</td>
2922 <td valign="top" >ENUM</td>
2923 <td valign="top" >{ "off", "on" }</td>
2924 <td valign="top" >Connector</td>
2925 <td valign="top" >TBD</td>
2926 </tr>
2927 <tr>
6c6a3996
SK
2928 <td rowspan="3" valign="top" >rcar-du</td>
2929 <td rowspan="3" valign="top" >Generic</td>
2930 <td valign="top" >"alpha"</td>
2931 <td valign="top" >RANGE</td>
2932 <td valign="top" >Min=0, Max=255</td>
2933 <td valign="top" >Plane</td>
2934 <td valign="top" >TBD</td>
2935 </tr>
2936 <tr>
2937 <td valign="top" >"colorkey"</td>
2938 <td valign="top" >RANGE</td>
2939 <td valign="top" >Min=0, Max=0x01ffffff</td>
2940 <td valign="top" >Plane</td>
2941 <td valign="top" >TBD</td>
2942 </tr>
2943 <tr>
2944 <td valign="top" >"zpos"</td>
2945 <td valign="top" >RANGE</td>
2946 <td valign="top" >Min=1, Max=7</td>
2947 <td valign="top" >Plane</td>
2948 <td valign="top" >TBD</td>
2949 </tr>
2950 </tbody>
2951 </table>
2952 </sect2>
2d2ef822
JB
2953 </sect1>
2954
9cad9c95
LP
2955 <!-- Internals: vertical blanking -->
2956
2957 <sect1 id="drm-vertical-blank">
2958 <title>Vertical Blanking</title>
2959 <para>
2960 Vertical blanking plays a major role in graphics rendering. To achieve
2961 tear-free display, users must synchronize page flips and/or rendering to
2962 vertical blanking. The DRM API offers ioctls to perform page flips
2963 synchronized to vertical blanking and wait for vertical blanking.
2964 </para>
2965 <para>
2966 The DRM core handles most of the vertical blanking management logic, which
2967 involves filtering out spurious interrupts, keeping race-free blanking
2968 counters, coping with counter wrap-around and resets and keeping use
2969 counts. It relies on the driver to generate vertical blanking interrupts
2970 and optionally provide a hardware vertical blanking counter. Drivers must
2971 implement the following operations.
2972 </para>
2973 <itemizedlist>
2974 <listitem>
2975 <synopsis>int (*enable_vblank) (struct drm_device *dev, int crtc);
2976void (*disable_vblank) (struct drm_device *dev, int crtc);</synopsis>
2977 <para>
2978 Enable or disable vertical blanking interrupts for the given CRTC.
2979 </para>
2980 </listitem>
2981 <listitem>
2982 <synopsis>u32 (*get_vblank_counter) (struct drm_device *dev, int crtc);</synopsis>
2983 <para>
2984 Retrieve the value of the vertical blanking counter for the given
2985 CRTC. If the hardware maintains a vertical blanking counter its value
2986 should be returned. Otherwise drivers can use the
2987 <function>drm_vblank_count</function> helper function to handle this
2988 operation.
2989 </para>
2990 </listitem>
2991 </itemizedlist>
2d2ef822 2992 <para>
9cad9c95
LP
2993 Drivers must initialize the vertical blanking handling core with a call to
2994 <function>drm_vblank_init</function> in their
2995 <methodname>load</methodname> operation. The function will set the struct
2996 <structname>drm_device</structname>
2997 <structfield>vblank_disable_allowed</structfield> field to 0. This will
2998 keep vertical blanking interrupts enabled permanently until the first mode
2999 set operation, where <structfield>vblank_disable_allowed</structfield> is
3000 set to 1. The reason behind this is not clear. Drivers can set the field
3001 to 1 after <function>calling drm_vblank_init</function> to make vertical
3002 blanking interrupts dynamically managed from the beginning.
2d2ef822 3003 </para>
9cad9c95
LP
3004 <para>
3005 Vertical blanking interrupts can be enabled by the DRM core or by drivers
3006 themselves (for instance to handle page flipping operations). The DRM core
3007 maintains a vertical blanking use count to ensure that the interrupts are
3008 not disabled while a user still needs them. To increment the use count,
3009 drivers call <function>drm_vblank_get</function>. Upon return vertical
3010 blanking interrupts are guaranteed to be enabled.
3011 </para>
3012 <para>
3013 To decrement the use count drivers call
3014 <function>drm_vblank_put</function>. Only when the use count drops to zero
3015 will the DRM core disable the vertical blanking interrupts after a delay
3016 by scheduling a timer. The delay is accessible through the vblankoffdelay
3017 module parameter or the <varname>drm_vblank_offdelay</varname> global
3018 variable and expressed in milliseconds. Its default value is 5000 ms.
4ed0ce3d 3019 Zero means never disable, and a negative value means disable immediately.
00185e66
VS
3020 Drivers may override the behaviour by setting the
3021 <structname>drm_device</structname>
3022 <structfield>vblank_disable_immediate</structfield> flag, which when set
3023 causes vblank interrupts to be disabled immediately regardless of the
3024 drm_vblank_offdelay value. The flag should only be set if there's a
3025 properly working hardware vblank counter present.
9cad9c95
LP
3026 </para>
3027 <para>
3028 When a vertical blanking interrupt occurs drivers only need to call the
3029 <function>drm_handle_vblank</function> function to account for the
3030 interrupt.
3031 </para>
3032 <para>
3033 Resources allocated by <function>drm_vblank_init</function> must be freed
3034 with a call to <function>drm_vblank_cleanup</function> in the driver
3035 <methodname>unload</methodname> operation handler.
3036 </para>
f5752b38
DV
3037 <sect2>
3038 <title>Vertical Blanking and Interrupt Handling Functions Reference</title>
3039!Edrivers/gpu/drm/drm_irq.c
d743ecf3 3040!Finclude/drm/drmP.h drm_crtc_vblank_waitqueue
f5752b38 3041 </sect2>
9cad9c95
LP
3042 </sect1>
3043
3044 <!-- Internals: open/close, file operations and ioctls -->
2d2ef822 3045
9cad9c95
LP
3046 <sect1>
3047 <title>Open/Close, File Operations and IOCTLs</title>
2d2ef822 3048 <sect2>
9cad9c95
LP
3049 <title>Open and Close</title>
3050 <synopsis>int (*firstopen) (struct drm_device *);
3051void (*lastclose) (struct drm_device *);
3052int (*open) (struct drm_device *, struct drm_file *);
3053void (*preclose) (struct drm_device *, struct drm_file *);
3054void (*postclose) (struct drm_device *, struct drm_file *);</synopsis>
3055 <abstract>Open and close handlers. None of those methods are mandatory.
3056 </abstract>
2d2ef822 3057 <para>
9cad9c95 3058 The <methodname>firstopen</methodname> method is called by the DRM core
7d14bb6b
DV
3059 for legacy UMS (User Mode Setting) drivers only when an application
3060 opens a device that has no other opened file handle. UMS drivers can
3061 implement it to acquire device resources. KMS drivers can't use the
3062 method and must acquire resources in the <methodname>load</methodname>
3063 method instead.
2d2ef822
JB
3064 </para>
3065 <para>
7d14bb6b
DV
3066 Similarly the <methodname>lastclose</methodname> method is called when
3067 the last application holding a file handle opened on the device closes
3068 it, for both UMS and KMS drivers. Additionally, the method is also
3069 called at module unload time or, for hot-pluggable devices, when the
3070 device is unplugged. The <methodname>firstopen</methodname> and
9cad9c95 3071 <methodname>lastclose</methodname> calls can thus be unbalanced.
2d2ef822
JB
3072 </para>
3073 <para>
9cad9c95
LP
3074 The <methodname>open</methodname> method is called every time the device
3075 is opened by an application. Drivers can allocate per-file private data
3076 in this method and store them in the struct
3077 <structname>drm_file</structname> <structfield>driver_priv</structfield>
3078 field. Note that the <methodname>open</methodname> method is called
3079 before <methodname>firstopen</methodname>.
3080 </para>
3081 <para>
3082 The close operation is split into <methodname>preclose</methodname> and
3083 <methodname>postclose</methodname> methods. Drivers must stop and
3084 cleanup all per-file operations in the <methodname>preclose</methodname>
3085 method. For instance pending vertical blanking and page flip events must
3086 be cancelled. No per-file operation is allowed on the file handle after
3087 returning from the <methodname>preclose</methodname> method.
3088 </para>
3089 <para>
3090 Finally the <methodname>postclose</methodname> method is called as the
3091 last step of the close operation, right before calling the
3092 <methodname>lastclose</methodname> method if no other open file handle
3093 exists for the device. Drivers that have allocated per-file private data
3094 in the <methodname>open</methodname> method should free it here.
3095 </para>
3096 <para>
3097 The <methodname>lastclose</methodname> method should restore CRTC and
3098 plane properties to default value, so that a subsequent open of the
7d14bb6b
DV
3099 device will not inherit state from the previous user. It can also be
3100 used to execute delayed power switching state changes, e.g. in
6648f487
LW
3101 conjunction with the vga_switcheroo infrastructure (see
3102 <xref linkend="vga_switcheroo"/>). Beyond that KMS drivers should not
3103 do any further cleanup. Only legacy UMS drivers might need to clean up
3104 device state so that the vga console or an independent fbdev driver
3105 could take over.
2d2ef822
JB
3106 </para>
3107 </sect2>
2d2ef822 3108 <sect2>
9cad9c95
LP
3109 <title>File Operations</title>
3110 <synopsis>const struct file_operations *fops</synopsis>
3111 <abstract>File operations for the DRM device node.</abstract>
2d2ef822 3112 <para>
9cad9c95
LP
3113 Drivers must define the file operations structure that forms the DRM
3114 userspace API entry point, even though most of those operations are
3115 implemented in the DRM core. The <methodname>open</methodname>,
3116 <methodname>release</methodname> and <methodname>ioctl</methodname>
3117 operations are handled by
3118 <programlisting>
3119 .owner = THIS_MODULE,
3120 .open = drm_open,
3121 .release = drm_release,
3122 .unlocked_ioctl = drm_ioctl,
3123 #ifdef CONFIG_COMPAT
3124 .compat_ioctl = drm_compat_ioctl,
3125 #endif
3126 </programlisting>
2d2ef822
JB
3127 </para>
3128 <para>
9cad9c95
LP
3129 Drivers that implement private ioctls that requires 32/64bit
3130 compatibility support must provide their own
3131 <methodname>compat_ioctl</methodname> handler that processes private
3132 ioctls and calls <function>drm_compat_ioctl</function> for core ioctls.
2d2ef822
JB
3133 </para>
3134 <para>
9cad9c95
LP
3135 The <methodname>read</methodname> and <methodname>poll</methodname>
3136 operations provide support for reading DRM events and polling them. They
3137 are implemented by
3138 <programlisting>
3139 .poll = drm_poll,
3140 .read = drm_read,
9cad9c95
LP
3141 .llseek = no_llseek,
3142 </programlisting>
3143 </para>
3144 <para>
3145 The memory mapping implementation varies depending on how the driver
3146 manages memory. Pre-GEM drivers will use <function>drm_mmap</function>,
3147 while GEM-aware drivers will use <function>drm_gem_mmap</function>. See
3148 <xref linkend="drm-gem"/>.
3149 <programlisting>
3150 .mmap = drm_gem_mmap,
3151 </programlisting>
3152 </para>
3153 <para>
3154 No other file operation is supported by the DRM API.
3155 </para>
3156 </sect2>
3157 <sect2>
3158 <title>IOCTLs</title>
3159 <synopsis>struct drm_ioctl_desc *ioctls;
3160int num_ioctls;</synopsis>
3161 <abstract>Driver-specific ioctls descriptors table.</abstract>
3162 <para>
3163 Driver-specific ioctls numbers start at DRM_COMMAND_BASE. The ioctls
3164 descriptors table is indexed by the ioctl number offset from the base
3165 value. Drivers can use the DRM_IOCTL_DEF_DRV() macro to initialize the
3166 table entries.
3167 </para>
3168 <para>
3169 <programlisting>DRM_IOCTL_DEF_DRV(ioctl, func, flags)</programlisting>
3170 <para>
3171 <parameter>ioctl</parameter> is the ioctl name. Drivers must define
3172 the DRM_##ioctl and DRM_IOCTL_##ioctl macros to the ioctl number
3173 offset from DRM_COMMAND_BASE and the ioctl number respectively. The
3174 first macro is private to the device while the second must be exposed
3175 to userspace in a public header.
3176 </para>
3177 <para>
3178 <parameter>func</parameter> is a pointer to the ioctl handler function
3179 compatible with the <type>drm_ioctl_t</type> type.
3180 <programlisting>typedef int drm_ioctl_t(struct drm_device *dev, void *data,
3181 struct drm_file *file_priv);</programlisting>
3182 </para>
3183 <para>
3184 <parameter>flags</parameter> is a bitmask combination of the following
3185 values. It restricts how the ioctl is allowed to be called.
3186 <itemizedlist>
3187 <listitem><para>
3188 DRM_AUTH - Only authenticated callers allowed
3189 </para></listitem>
3190 <listitem><para>
3191 DRM_MASTER - The ioctl can only be called on the master file
3192 handle
3193 </para></listitem>
3194 <listitem><para>
3195 DRM_ROOT_ONLY - Only callers with the SYSADMIN capability allowed
3196 </para></listitem>
3197 <listitem><para>
3198 DRM_CONTROL_ALLOW - The ioctl can only be called on a control
3199 device
3200 </para></listitem>
3201 <listitem><para>
3202 DRM_UNLOCKED - The ioctl handler will be called without locking
ea487835
DV
3203 the DRM global mutex. This is the enforced default for kms drivers
3204 (i.e. using the DRIVER_MODESET flag) and hence shouldn't be used
3205 any more for new drivers.
9cad9c95
LP
3206 </para></listitem>
3207 </itemizedlist>
3208 </para>
2d2ef822 3209 </para>
0aaf20cf 3210!Edrivers/gpu/drm/drm_ioctl.c
2d2ef822 3211 </sect2>
2d2ef822 3212 </sect1>
2d2ef822 3213 <sect1>
4c6e2dfe 3214 <title>Legacy Support Code</title>
2d2ef822 3215 <para>
9a6594fc 3216 The section very briefly covers some of the old legacy support code which
4c6e2dfe
DV
3217 is only used by old DRM drivers which have done a so-called shadow-attach
3218 to the underlying device instead of registering as a real driver. This
9a6594fc 3219 also includes some of the old generic buffer management and command
4c6e2dfe 3220 submission code. Do not use any of this in new and modern drivers.
2d2ef822 3221 </para>
2d2ef822 3222
4c6e2dfe
DV
3223 <sect2>
3224 <title>Legacy Suspend/Resume</title>
3225 <para>
3226 The DRM core provides some suspend/resume code, but drivers wanting full
3227 suspend/resume support should provide save() and restore() functions.
3228 These are called at suspend, hibernate, or resume time, and should perform
3229 any state save or restore required by your device across suspend or
3230 hibernate states.
3231 </para>
3232 <synopsis>int (*suspend) (struct drm_device *, pm_message_t state);
3233 int (*resume) (struct drm_device *);</synopsis>
3234 <para>
3235 Those are legacy suspend and resume methods which
3236 <emphasis>only</emphasis> work with the legacy shadow-attach driver
3237 registration functions. New driver should use the power management
3238 interface provided by their bus type (usually through
3239 the struct <structname>device_driver</structname> dev_pm_ops) and set
3240 these methods to NULL.
3241 </para>
3242 </sect2>
3243
3244 <sect2>
3245 <title>Legacy DMA Services</title>
3246 <para>
3247 This should cover how DMA mapping etc. is supported by the core.
3248 These functions are deprecated and should not be used.
3249 </para>
3250 </sect2>
2d2ef822
JB
3251 </sect1>
3252 </chapter>
3253
9cad9c95
LP
3254<!-- TODO
3255
3256- Add a glossary
3257- Document the struct_mutex catch-all lock
3258- Document connector properties
3259
3260- Why is the load method optional?
3261- What are drivers supposed to set the initial display state to, and how?
3262 Connector's DPMS states are not initialized and are thus equal to
3263 DRM_MODE_DPMS_ON. The fbcon compatibility layer calls
3264 drm_helper_disable_unused_functions(), which disables unused encoders and
3265 CRTCs, but doesn't touch the connectors' DPMS state, and
3266 drm_helper_connector_dpms() in reaction to fbdev blanking events. Do drivers
3267 that don't implement (or just don't use) fbcon compatibility need to call
3268 those functions themselves?
3269- KMS drivers must call drm_vblank_pre_modeset() and drm_vblank_post_modeset()
3270 around mode setting. Should this be done in the DRM core?
3271- vblank_disable_allowed is set to 1 in the first drm_vblank_post_modeset()
3272 call and never set back to 0. It seems to be safe to permanently set it to 1
3273 in drm_vblank_init() for KMS driver, and it might be safe for UMS drivers as
3274 well. This should be investigated.
3275- crtc and connector .save and .restore operations are only used internally in
3276 drivers, should they be removed from the core?
3277- encoder mid-layer .save and .restore operations are only used internally in
3278 drivers, should they be removed from the core?
3279- encoder mid-layer .detect operation is only used internally in drivers,
3280 should it be removed from the core?
3281-->
3282
2d2ef822
JB
3283 <!-- External interfaces -->
3284
3285 <chapter id="drmExternals">
3286 <title>Userland interfaces</title>
3287 <para>
3288 The DRM core exports several interfaces to applications,
3289 generally intended to be used through corresponding libdrm
a5294e01 3290 wrapper functions. In addition, drivers export device-specific
7f0925ac 3291 interfaces for use by userspace drivers &amp; device-aware
2d2ef822
JB
3292 applications through ioctls and sysfs files.
3293 </para>
3294 <para>
3295 External interfaces include: memory mapping, context management,
3296 DMA operations, AGP management, vblank control, fence
3297 management, memory management, and output management.
3298 </para>
3299 <para>
bcd3cfc1
MW
3300 Cover generic ioctls and sysfs layout here. We only need high-level
3301 info, since man pages should cover the rest.
2d2ef822 3302 </para>
9cad9c95 3303
1793126f
DH
3304 <!-- External: render nodes -->
3305
3306 <sect1>
3307 <title>Render nodes</title>
3308 <para>
3309 DRM core provides multiple character-devices for user-space to use.
3310 Depending on which device is opened, user-space can perform a different
3311 set of operations (mainly ioctls). The primary node is always created
00153aeb
DV
3312 and called card&lt;num&gt;. Additionally, a currently
3313 unused control node, called controlD&lt;num&gt; is also
1793126f
DH
3314 created. The primary node provides all legacy operations and
3315 historically was the only interface used by userspace. With KMS, the
3316 control node was introduced. However, the planned KMS control interface
3317 has never been written and so the control node stays unused to date.
3318 </para>
3319 <para>
3320 With the increased use of offscreen renderers and GPGPU applications,
3321 clients no longer require running compositors or graphics servers to
3322 make use of a GPU. But the DRM API required unprivileged clients to
3323 authenticate to a DRM-Master prior to getting GPU access. To avoid this
3324 step and to grant clients GPU access without authenticating, render
3325 nodes were introduced. Render nodes solely serve render clients, that
3326 is, no modesetting or privileged ioctls can be issued on render nodes.
3327 Only non-global rendering commands are allowed. If a driver supports
00153aeb 3328 render nodes, it must advertise it via the DRIVER_RENDER
1793126f
DH
3329 DRM driver capability. If not supported, the primary node must be used
3330 for render clients together with the legacy drmAuth authentication
3331 procedure.
3332 </para>
3333 <para>
3334 If a driver advertises render node support, DRM core will create a
00153aeb 3335 separate render node called renderD&lt;num&gt;. There will
1793126f 3336 be one render node per device. No ioctls except PRIME-related ioctls
00153aeb 3337 will be allowed on this node. Especially GEM_OPEN will be
1793126f
DH
3338 explicitly prohibited. Render nodes are designed to avoid the
3339 buffer-leaks, which occur if clients guess the flink names or mmap
3340 offsets on the legacy interface. Additionally to this basic interface,
3341 drivers must mark their driver-dependent render-only ioctls as
00153aeb 3342 DRM_RENDER_ALLOW so render clients can use them. Driver
1793126f
DH
3343 authors must be careful not to allow any privileged ioctls on render
3344 nodes.
3345 </para>
3346 <para>
3347 With render nodes, user-space can now control access to the render node
3348 via basic file-system access-modes. A running graphics server which
3349 authenticates clients on the privileged primary/legacy node is no longer
3350 required. Instead, a client can open the render node and is immediately
3351 granted GPU access. Communication between clients (or servers) is done
3352 via PRIME. FLINK from render node to legacy node is not supported. New
3353 clients must not use the insecure FLINK interface.
3354 </para>
3355 <para>
3356 Besides dropping all modeset/global ioctls, render nodes also drop the
3357 DRM-Master concept. There is no reason to associate render clients with
3358 a DRM-Master as they are independent of any graphics server. Besides,
3359 they must work without any running master, anyway.
3360 Drivers must be able to run without a master object if they support
3361 render nodes. If, on the other hand, a driver requires shared state
3362 between clients which is visible to user-space and accessible beyond
3363 open-file boundaries, they cannot support render nodes.
3364 </para>
3365 </sect1>
3366
9cad9c95
LP
3367 <!-- External: vblank handling -->
3368
3369 <sect1>
3370 <title>VBlank event handling</title>
3371 <para>
3372 The DRM core exposes two vertical blank related ioctls:
3373 <variablelist>
3374 <varlistentry>
3375 <term>DRM_IOCTL_WAIT_VBLANK</term>
3376 <listitem>
3377 <para>
3378 This takes a struct drm_wait_vblank structure as its argument,
3379 and it is used to block or request a signal when a specified
3380 vblank event occurs.
3381 </para>
3382 </listitem>
3383 </varlistentry>
3384 <varlistentry>
3385 <term>DRM_IOCTL_MODESET_CTL</term>
3386 <listitem>
3387 <para>
8edffbb9
DV
3388 This was only used for user-mode-settind drivers around
3389 modesetting changes to allow the kernel to update the vblank
3390 interrupt after mode setting, since on many devices the vertical
3391 blank counter is reset to 0 at some point during modeset. Modern
3392 drivers should not call this any more since with kernel mode
3393 setting it is a no-op.
9cad9c95
LP
3394 </para>
3395 </listitem>
3396 </varlistentry>
3397 </variablelist>
9cad9c95
LP
3398 </para>
3399 </sect1>
3400
2d2ef822 3401 </chapter>
3519f70e
DV
3402</part>
3403<part id="drmDrivers">
3404 <title>DRM Drivers</title>
2d2ef822 3405
3519f70e
DV
3406 <partintro>
3407 <para>
7f817074
LW
3408 This second part of the GPU Driver Developer's Guide documents driver
3409 code, implementation details and also all the driver-specific userspace
3519f70e
DV
3410 interfaces. Especially since all hardware-acceleration interfaces to
3411 userspace are driver specific for efficiency and other reasons these
3412 interfaces can be rather substantial. Hence every driver has its own
3413 chapter.
3414 </para>
3415 </partintro>
2d2ef822 3416
3519f70e
DV
3417 <chapter id="drmI915">
3418 <title>drm/i915 Intel GFX Driver</title>
2d2ef822 3419 <para>
3519f70e
DV
3420 The drm/i915 driver supports all (with the exception of some very early
3421 models) integrated GFX chipsets with both Intel display and rendering
3422 blocks. This excludes a set of SoC platforms with an SGX rendering unit,
3423 those have basic support through the gma500 drm driver.
2d2ef822 3424 </para>
e4e7684f
DV
3425 <sect1>
3426 <title>Core Driver Infrastructure</title>
3427 <para>
3428 This section covers core driver infrastructure used by both the display
3429 and the GEM parts of the driver.
3430 </para>
3431 <sect2>
3432 <title>Runtime Power Management</title>
3433!Pdrivers/gpu/drm/i915/intel_runtime_pm.c runtime pm
3434!Idrivers/gpu/drm/i915/intel_runtime_pm.c
397f6fa6 3435!Idrivers/gpu/drm/i915/intel_uncore.c
e4e7684f 3436 </sect2>
fca52a55
DV
3437 <sect2>
3438 <title>Interrupt Handling</title>
3439!Pdrivers/gpu/drm/i915/i915_irq.c interrupt handling
3440!Fdrivers/gpu/drm/i915/i915_irq.c intel_irq_init intel_irq_init_hw intel_hpd_init
fca52a55
DV
3441!Fdrivers/gpu/drm/i915/i915_irq.c intel_runtime_pm_disable_interrupts
3442!Fdrivers/gpu/drm/i915/i915_irq.c intel_runtime_pm_enable_interrupts
3443 </sect2>
cf9d2890
YZ
3444 <sect2>
3445 <title>Intel GVT-g Guest Support(vGPU)</title>
3446!Pdrivers/gpu/drm/i915/i915_vgpu.c Intel GVT-g guest support
3447!Idrivers/gpu/drm/i915/i915_vgpu.c
3448 </sect2>
e4e7684f 3449 </sect1>
3519f70e
DV
3450 <sect1>
3451 <title>Display Hardware Handling</title>
3452 <para>
3453 This section covers everything related to the display hardware including
3454 the mode setting infrastructure, plane, sprite and cursor handling and
3455 display, output probing and related topics.
3456 </para>
3457 <sect2>
3458 <title>Mode Setting Infrastructure</title>
3459 <para>
3460 The i915 driver is thus far the only DRM driver which doesn't use the
3461 common DRM helper code to implement mode setting sequences. Thus it
3462 has its own tailor-made infrastructure for executing a display
3463 configuration change.
3464 </para>
3465 </sect2>
b680c37a
DV
3466 <sect2>
3467 <title>Frontbuffer Tracking</title>
3468!Pdrivers/gpu/drm/i915/intel_frontbuffer.c frontbuffer tracking
3469!Idrivers/gpu/drm/i915/intel_frontbuffer.c
b680c37a 3470!Fdrivers/gpu/drm/i915/i915_gem.c i915_gem_track_fb
ef07388e
DV
3471 </sect2>
3472 <sect2>
3473 <title>Display FIFO Underrun Reporting</title>
3474!Pdrivers/gpu/drm/i915/intel_fifo_underrun.c fifo underrun handling
3475!Idrivers/gpu/drm/i915/intel_fifo_underrun.c
b680c37a 3476 </sect2>
3519f70e
DV
3477 <sect2>
3478 <title>Plane Configuration</title>
3479 <para>
3480 This section covers plane configuration and composition with the
3481 primary plane, sprites, cursors and overlays. This includes the
3482 infrastructure to do atomic vsync'ed updates of all this state and
3483 also tightly coupled topics like watermark setup and computation,
3484 framebuffer compression and panel self refresh.
3485 </para>
3486 </sect2>
ea2c67bb
MR
3487 <sect2>
3488 <title>Atomic Plane Helpers</title>
3489!Pdrivers/gpu/drm/i915/intel_atomic_plane.c atomic plane helpers
3490!Idrivers/gpu/drm/i915/intel_atomic_plane.c
3491 </sect2>
3519f70e
DV
3492 <sect2>
3493 <title>Output Probing</title>
3494 <para>
3495 This section covers output probing and related infrastructure like the
3496 hotplug interrupt storm detection and mitigation code. Note that the
3497 i915 driver still uses most of the common DRM helper code for output
3498 probing, so those sections fully apply.
3499 </para>
3500 </sect2>
856974a4
JN
3501 <sect2>
3502 <title>Hotplug</title>
3503!Pdrivers/gpu/drm/i915/intel_hotplug.c Hotplug
3504!Idrivers/gpu/drm/i915/intel_hotplug.c
3505 </sect2>
28855d2a
JN
3506 <sect2>
3507 <title>High Definition Audio</title>
3508!Pdrivers/gpu/drm/i915/intel_audio.c High Definition Audio over HDMI and Display Port
3509!Idrivers/gpu/drm/i915/intel_audio.c
cb422619 3510!Iinclude/drm/i915_component.h
b2b89f55
RV
3511 </sect2>
3512 <sect2>
3513 <title>Panel Self Refresh PSR (PSR/SRD)</title>
3514!Pdrivers/gpu/drm/i915/intel_psr.c Panel Self Refresh (PSR/SRD)
3515!Idrivers/gpu/drm/i915/intel_psr.c
94b83957
RV
3516 </sect2>
3517 <sect2>
3518 <title>Frame Buffer Compression (FBC)</title>
3519!Pdrivers/gpu/drm/i915/intel_fbc.c Frame Buffer Compression (FBC)
3520!Idrivers/gpu/drm/i915/intel_fbc.c
b33a2815
VK
3521 </sect2>
3522 <sect2>
3523 <title>Display Refresh Rate Switching (DRRS)</title>
3524!Pdrivers/gpu/drm/i915/intel_dp.c Display Refresh Rate Switching (DRRS)
3525!Fdrivers/gpu/drm/i915/intel_dp.c intel_dp_set_drrs_state
3526!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_enable
3527!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_disable
3528!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_invalidate
3529!Fdrivers/gpu/drm/i915/intel_dp.c intel_edp_drrs_flush
3530!Fdrivers/gpu/drm/i915/intel_dp.c intel_dp_drrs_init
3531
28855d2a 3532 </sect2>
0e767189
VS
3533 <sect2>
3534 <title>DPIO</title>
3535!Pdrivers/gpu/drm/i915/i915_reg.h DPIO
111a9c14 3536 <table id="dpiox2">
eee21566 3537 <title>Dual channel PHY (VLV/CHV/BXT)</title>
111a9c14
VS
3538 <tgroup cols="8">
3539 <colspec colname="c0" />
3540 <colspec colname="c1" />
3541 <colspec colname="c2" />
3542 <colspec colname="c3" />
3543 <colspec colname="c4" />
3544 <colspec colname="c5" />
3545 <colspec colname="c6" />
3546 <colspec colname="c7" />
3547 <spanspec spanname="ch0" namest="c0" nameend="c3" />
3548 <spanspec spanname="ch1" namest="c4" nameend="c7" />
3549 <spanspec spanname="ch0pcs01" namest="c0" nameend="c1" />
3550 <spanspec spanname="ch0pcs23" namest="c2" nameend="c3" />
3551 <spanspec spanname="ch1pcs01" namest="c4" nameend="c5" />
3552 <spanspec spanname="ch1pcs23" namest="c6" nameend="c7" />
3553 <thead>
3554 <row>
3555 <entry spanname="ch0">CH0</entry>
3556 <entry spanname="ch1">CH1</entry>
3557 </row>
3558 </thead>
3559 <tbody valign="top" align="center">
3560 <row>
3561 <entry spanname="ch0">CMN/PLL/REF</entry>
3562 <entry spanname="ch1">CMN/PLL/REF</entry>
3563 </row>
3564 <row>
3565 <entry spanname="ch0pcs01">PCS01</entry>
3566 <entry spanname="ch0pcs23">PCS23</entry>
3567 <entry spanname="ch1pcs01">PCS01</entry>
3568 <entry spanname="ch1pcs23">PCS23</entry>
3569 </row>
3570 <row>
3571 <entry>TX0</entry>
3572 <entry>TX1</entry>
3573 <entry>TX2</entry>
3574 <entry>TX3</entry>
3575 <entry>TX0</entry>
3576 <entry>TX1</entry>
3577 <entry>TX2</entry>
3578 <entry>TX3</entry>
3579 </row>
3580 <row>
3581 <entry spanname="ch0">DDI0</entry>
3582 <entry spanname="ch1">DDI1</entry>
3583 </row>
3584 </tbody>
3585 </tgroup>
3586 </table>
3587 <table id="dpiox1">
eee21566 3588 <title>Single channel PHY (CHV/BXT)</title>
111a9c14
VS
3589 <tgroup cols="4">
3590 <colspec colname="c0" />
3591 <colspec colname="c1" />
3592 <colspec colname="c2" />
3593 <colspec colname="c3" />
3594 <spanspec spanname="ch0" namest="c0" nameend="c3" />
3595 <spanspec spanname="ch0pcs01" namest="c0" nameend="c1" />
3596 <spanspec spanname="ch0pcs23" namest="c2" nameend="c3" />
3597 <thead>
3598 <row>
3599 <entry spanname="ch0">CH0</entry>
3600 </row>
3601 </thead>
3602 <tbody valign="top" align="center">
3603 <row>
3604 <entry spanname="ch0">CMN/PLL/REF</entry>
3605 </row>
3606 <row>
3607 <entry spanname="ch0pcs01">PCS01</entry>
3608 <entry spanname="ch0pcs23">PCS23</entry>
3609 </row>
3610 <row>
3611 <entry>TX0</entry>
3612 <entry>TX1</entry>
3613 <entry>TX2</entry>
3614 <entry>TX3</entry>
3615 </row>
3616 <row>
3617 <entry spanname="ch0">DDI2</entry>
3618 </row>
3619 </tbody>
3620 </tgroup>
3621 </table>
0e767189 3622 </sect2>
aa9145c4
AM
3623
3624 <sect2>
3625 <title>CSR firmware support for DMC</title>
3626!Pdrivers/gpu/drm/i915/intel_csr.c csr support for dmc
3627!Idrivers/gpu/drm/i915/intel_csr.c
3628 </sect2>
3519f70e 3629 </sect1>
2d2ef822 3630
3519f70e
DV
3631 <sect1>
3632 <title>Memory Management and Command Submission</title>
3633 <para>
3634 This sections covers all things related to the GEM implementation in the
3635 i915 driver.
3636 </para>
122b2505
DV
3637 <sect2>
3638 <title>Batchbuffer Parsing</title>
3639!Pdrivers/gpu/drm/i915/i915_cmd_parser.c batch buffer command parser
3640!Idrivers/gpu/drm/i915/i915_cmd_parser.c
493018dc
BV
3641 </sect2>
3642 <sect2>
3643 <title>Batchbuffer Pools</title>
3644!Pdrivers/gpu/drm/i915/i915_gem_batch_pool.c batch pool
3645!Idrivers/gpu/drm/i915/i915_gem_batch_pool.c
122b2505 3646 </sect2>
73e4d07f
OM
3647 <sect2>
3648 <title>Logical Rings, Logical Ring Contexts and Execlists</title>
3649!Pdrivers/gpu/drm/i915/intel_lrc.c Logical Rings, Logical Ring Contexts and Execlists
3650!Idrivers/gpu/drm/i915/intel_lrc.c
3651 </sect2>
45f8f69a
TU
3652 <sect2>
3653 <title>Global GTT views</title>
3654!Pdrivers/gpu/drm/i915/i915_gem_gtt.c Global GTT views
3655!Idrivers/gpu/drm/i915/i915_gem_gtt.c
a794f62a
DV
3656 </sect2>
3657 <sect2>
3271dca4 3658 <title>GTT Fences and Swizzling</title>
a794f62a 3659!Idrivers/gpu/drm/i915/i915_gem_fence.c
3271dca4
DV
3660 <sect3>
3661 <title>Global GTT Fence Handling</title>
3662!Pdrivers/gpu/drm/i915/i915_gem_fence.c fence register handling
3663 </sect3>
3664 <sect3>
3665 <title>Hardware Tiling and Swizzling Details</title>
3666!Pdrivers/gpu/drm/i915/i915_gem_fence.c tiling swizzling details
3667 </sect3>
3668 </sect2>
3669 <sect2>
3670 <title>Object Tiling IOCTLs</title>
3671!Idrivers/gpu/drm/i915/i915_gem_tiling.c
3672!Pdrivers/gpu/drm/i915/i915_gem_tiling.c buffer object tiling
45f8f69a 3673 </sect2>
7838a63a
DV
3674 <sect2>
3675 <title>Buffer Object Eviction</title>
3676 <para>
eb0b44ad 3677 This section documents the interface functions for evicting buffer
7838a63a
DV
3678 objects to make space available in the virtual gpu address spaces.
3679 Note that this is mostly orthogonal to shrinking buffer objects
3680 caches, which has the goal to make main memory (shared with the gpu
3681 through the unified memory architecture) available.
3682 </para>
3683!Idrivers/gpu/drm/i915/i915_gem_evict.c
3684 </sect2>
eb0b44ad
DV
3685 <sect2>
3686 <title>Buffer Object Memory Shrinking</title>
3687 <para>
3688 This section documents the interface function for shrinking memory
3689 usage of buffer object caches. Shrinking is used to make main memory
3690 available. Note that this is mostly orthogonal to evicting buffer
3691 objects, which has the goal to make space in gpu virtual address
3692 spaces.
3693 </para>
3694!Idrivers/gpu/drm/i915/i915_gem_shrinker.c
3695 </sect2>
3519f70e 3696 </sect1>
d1675198 3697 <sect1>
feda33ef 3698 <title>GuC</title>
d1675198 3699 <sect2>
feda33ef 3700 <title>GuC-specific firmware loader</title>
d1675198
AD
3701!Pdrivers/gpu/drm/i915/intel_guc_loader.c GuC-specific firmware loader
3702!Idrivers/gpu/drm/i915/intel_guc_loader.c
3703 </sect2>
3704 <sect2>
feda33ef
AD
3705 <title>GuC-based command submission</title>
3706!Pdrivers/gpu/drm/i915/i915_guc_submission.c GuC-based command submission
cff4f55b 3707!Idrivers/gpu/drm/i915/i915_guc_submission.c
d1675198 3708 </sect2>
feda33ef
AD
3709 <sect2>
3710 <title>GuC Firmware Layout</title>
3711!Pdrivers/gpu/drm/i915/intel_guc_fwif.h GuC Firmware Layout
3712 </sect2>
d1675198
AD
3713 </sect1>
3714
198c974d
DCS
3715 <sect1>
3716 <title> Tracing </title>
3717 <para>
3718 This sections covers all things related to the tracepoints implemented in
3719 the i915 driver.
3720 </para>
3721 <sect2>
3722 <title> i915_ppgtt_create and i915_ppgtt_release </title>
3723!Pdrivers/gpu/drm/i915/i915_trace.h i915_ppgtt_create and i915_ppgtt_release tracepoints
3724 </sect2>
3725 <sect2>
3726 <title> i915_context_create and i915_context_free </title>
3727!Pdrivers/gpu/drm/i915/i915_trace.h i915_context_create and i915_context_free tracepoints
3728 </sect2>
3729 <sect2>
3730 <title> switch_mm </title>
3731!Pdrivers/gpu/drm/i915/i915_trace.h switch_mm tracepoint
3732 </sect2>
3733 </sect1>
3734
3519f70e 3735 </chapter>
fca52a55 3736!Cdrivers/gpu/drm/i915/i915_irq.c
3519f70e 3737</part>
6648f487
LW
3738
3739<part id="vga_switcheroo">
3740 <title>vga_switcheroo</title>
3741 <partintro>
3742!Pdrivers/gpu/vga/vga_switcheroo.c Overview
3743 </partintro>
3744
3745 <chapter id="modes_of_use">
3746 <title>Modes of Use</title>
3747 <sect1>
3748 <title>Manual switching and manual power control</title>
3749!Pdrivers/gpu/vga/vga_switcheroo.c Manual switching and manual power control
3750 </sect1>
3751 <sect1>
3752 <title>Driver power control</title>
3753!Pdrivers/gpu/vga/vga_switcheroo.c Driver power control
3754 </sect1>
3755 </chapter>
3756
3757 <chapter id="pubfunctions">
3758 <title>Public functions</title>
3759!Edrivers/gpu/vga/vga_switcheroo.c
3760 </chapter>
3761
3762 <chapter id="pubstructures">
3763 <title>Public structures</title>
3764!Finclude/linux/vga_switcheroo.h vga_switcheroo_handler
3765!Finclude/linux/vga_switcheroo.h vga_switcheroo_client_ops
3766 </chapter>
3767
3768 <chapter id="pubconstants">
3769 <title>Public constants</title>
3770!Finclude/linux/vga_switcheroo.h vga_switcheroo_client_id
3771!Finclude/linux/vga_switcheroo.h vga_switcheroo_state
3772 </chapter>
3773
3774 <chapter id="privstructures">
3775 <title>Private structures</title>
3776!Fdrivers/gpu/vga/vga_switcheroo.c vgasr_priv
3777!Fdrivers/gpu/vga/vga_switcheroo.c vga_switcheroo_client
3778 </chapter>
3779
3780!Cdrivers/gpu/vga/vga_switcheroo.c
3781!Cinclude/linux/vga_switcheroo.h
3782</part>
3783
2d2ef822 3784</book>
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