Commit | Line | Data |
---|---|---|
23fa648f JCPV |
1 | Atmel AT91 device tree bindings. |
2 | ================================ | |
3 | ||
02037a97 AB |
4 | Boards with a SoC of the Atmel AT91 or SMART family shall have the following |
5 | properties: | |
6 | ||
7 | Required root node properties: | |
8 | compatible: must be one of: | |
9 | * "atmel,at91rm9200" | |
10 | ||
11 | * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with | |
12 | the specific SoC family or compatible: | |
13 | o "atmel,at91sam9260" | |
14 | o "atmel,at91sam9261" | |
15 | o "atmel,at91sam9263" | |
16 | o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific | |
17 | SoC compatible: | |
18 | - "atmel,at91sam9g15" | |
19 | - "atmel,at91sam9g25" | |
20 | - "atmel,at91sam9g35" | |
21 | - "atmel,at91sam9x25" | |
22 | - "atmel,at91sam9x35" | |
23 | o "atmel,at91sam9g20" | |
24 | o "atmel,at91sam9g45" | |
25 | o "atmel,at91sam9n12" | |
26 | o "atmel,at91sam9rl" | |
1d376dff | 27 | o "atmel,at91sam9xe" |
02037a97 AB |
28 | * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific |
29 | SoC family: | |
c268a743 NF |
30 | o "atmel,sama5d2" shall be extended with the specific SoC compatible: |
31 | - "atmel,sama5d27" | |
02037a97 AB |
32 | o "atmel,sama5d3" shall be extended with the specific SoC compatible: |
33 | - "atmel,sama5d31" | |
34 | - "atmel,sama5d33" | |
35 | - "atmel,sama5d34" | |
36 | - "atmel,sama5d35" | |
37 | - "atmel,sama5d36" | |
38 | o "atmel,sama5d4" shall be extended with the specific SoC compatible: | |
39 | - "atmel,sama5d41" | |
40 | - "atmel,sama5d42" | |
41 | - "atmel,sama5d43" | |
42 | - "atmel,sama5d44" | |
43 | ||
23fa648f JCPV |
44 | PIT Timer required properties: |
45 | - compatible: Should be "atmel,at91sam9260-pit" | |
46 | - reg: Should contain registers location and length | |
47 | - interrupts: Should contain interrupt for the PIT which is the IRQ line | |
48 | shared across all System Controller members. | |
3a61a5da | 49 | |
454c46df | 50 | System Timer (ST) required properties: |
b595809b | 51 | - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" |
454c46df JE |
52 | - reg: Should contain registers location and length |
53 | - interrupts: Should contain interrupt for the ST which is the IRQ line | |
54 | shared across all System Controller members. | |
b595809b AB |
55 | Its subnodes can be: |
56 | - watchdog: compatible should be "atmel,at91rm9200-wdt" | |
454c46df | 57 | |
3a61a5da | 58 | TC/TCLIB Timer required properties: |
11930c53 | 59 | - compatible: Should be "atmel,<chip>-tcb". |
3a61a5da NF |
60 | <chip> can be "at91rm9200" or "at91sam9x5" |
61 | - reg: Should contain registers location and length | |
62 | - interrupts: Should contain all interrupts for the TC block | |
63 | Note that you can specify several interrupt cells if the TC | |
64 | block has one interrupt per channel. | |
864382dc BB |
65 | - clock-names: tuple listing input clock names. |
66 | Required elements: "t0_clk" | |
67 | Optional elements: "t1_clk", "t2_clk" | |
68 | - clocks: phandles to input clocks. | |
3a61a5da NF |
69 | |
70 | Examples: | |
71 | ||
72 | One interrupt per TC block: | |
73 | tcb0: timer@fff7c000 { | |
74 | compatible = "atmel,at91rm9200-tcb"; | |
75 | reg = <0xfff7c000 0x100>; | |
76 | interrupts = <18 4>; | |
864382dc BB |
77 | clocks = <&tcb0_clk>; |
78 | clock-names = "t0_clk"; | |
3a61a5da NF |
79 | }; |
80 | ||
81 | One interrupt per TC channel in a TC block: | |
82 | tcb1: timer@fffdc000 { | |
83 | compatible = "atmel,at91rm9200-tcb"; | |
84 | reg = <0xfffdc000 0x100>; | |
85 | interrupts = <26 4 27 4 28 4>; | |
864382dc BB |
86 | clocks = <&tcb1_clk>; |
87 | clock-names = "t0_clk"; | |
3a61a5da | 88 | }; |
c8082d34 JCPV |
89 | |
90 | RSTC Reset Controller required properties: | |
91 | - compatible: Should be "atmel,<chip>-rstc". | |
92 | <chip> can be "at91sam9260" or "at91sam9g45" | |
93 | - reg: Should contain registers location and length | |
94 | ||
95 | Example: | |
96 | ||
97 | rstc@fffffd00 { | |
98 | compatible = "atmel,at91sam9260-rstc"; | |
99 | reg = <0xfffffd00 0x10>; | |
100 | }; | |
a7776ec6 JCPV |
101 | |
102 | RAMC SDRAM/DDR Controller required properties: | |
0506b298 | 103 | - compatible: Should be "atmel,at91rm9200-sdramc", "syscon" |
20b4e4fa | 104 | "atmel,at91sam9260-sdramc", |
a7776ec6 | 105 | "atmel,at91sam9g45-ddramc", |
017b5522 | 106 | "atmel,sama5d3-ddramc", |
a7776ec6 | 107 | - reg: Should contain registers location and length |
a7776ec6 JCPV |
108 | |
109 | Examples: | |
110 | ||
111 | ramc0: ramc@ffffe800 { | |
112 | compatible = "atmel,at91sam9g45-ddramc"; | |
113 | reg = <0xffffe800 0x200>; | |
114 | }; | |
115 | ||
82015c4e JCPV |
116 | SHDWC Shutdown Controller |
117 | ||
118 | required properties: | |
119 | - compatible: Should be "atmel,<chip>-shdwc". | |
120 | <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". | |
121 | - reg: Should contain registers location and length | |
122 | ||
123 | optional properties: | |
124 | - atmel,wakeup-mode: String, operation mode of the wakeup mode. | |
125 | Supported values are: "none", "high", "low", "any". | |
126 | - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf). | |
127 | ||
128 | optional at91sam9260 properties: | |
129 | - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. | |
130 | ||
131 | optional at91sam9rl properties: | |
132 | - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. | |
133 | - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. | |
134 | ||
135 | optional at91sam9x5 properties: | |
136 | - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. | |
137 | ||
138 | Example: | |
139 | ||
140 | rstc@fffffd00 { | |
141 | compatible = "atmel,at91sam9260-rstc"; | |
142 | reg = <0xfffffd00 0x10>; | |
143 | }; | |
cb282f78 AB |
144 | |
145 | Special Function Registers (SFR) | |
146 | ||
147 | Special Function Registers (SFR) manage specific aspects of the integrated | |
148 | memory, bridge implementations, processor and other functionality not controlled | |
149 | elsewhere. | |
150 | ||
151 | required properties: | |
152 | - compatible: Should be "atmel,<chip>-sfr", "syscon". | |
153 | <chip> can be "sama5d3" or "sama5d4". | |
154 | - reg: Should contain registers location and length | |
155 | ||
156 | sfr@f0038000 { | |
157 | compatible = "atmel,sama5d3-sfr", "syscon"; | |
158 | reg = <0xf0038000 0x60>; | |
159 | }; |