[deliverable/linux.git] / Documentation / devicetree / bindings / arm / omap / intc.txt

* OMAP Interrupt Controller

OMAP2/3 are using a TI interrupt controller that can support several
configurable number of interrupts.

Main node required properties:

- compatible : should be:
	"ti,omap2-intc"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
  interrupt source. The type shall be a <u32> and the value shall be 1.

  The cell contains the interrupt number in the range [0-128].
- ti,intc-size: Number of interrupts handled by the interrupt controller.
- reg: physical base address and size of the intc registers map.

Example:

	intc: interrupt-controller@1 {
		compatible = "ti,omap2-intc";
		interrupt-controller;
		#interrupt-cells = <1>;
		ti,intc-size = <96>;
		reg = <0x48200000 0x1000>;
	};
Commit	Line	Data
52fa2120 BC	1	* OMAP Interrupt Controller
	2
	3	OMAP2/3 are using a TI interrupt controller that can support several
	4	configurable number of interrupts.
	5
	6	Main node required properties:
	7
	8	- compatible : should be:
	9	"ti,omap2-intc"
	10	- interrupt-controller : Identifies the node as an interrupt controller
	11	- #interrupt-cells : Specifies the number of cells needed to encode an
	12	interrupt source. The type shall be a <u32> and the value shall be 1.
	13
	14	The cell contains the interrupt number in the range [0-128].
	15	- ti,intc-size: Number of interrupts handled by the interrupt controller.
	16	- reg: physical base address and size of the intc registers map.
	17
	18	Example:
	19
	20	intc: interrupt-controller@1 {
	21	compatible = "ti,omap2-intc";
	22	interrupt-controller;
	23	#interrupt-cells = <1>;
	24	ti,intc-size = <96>;
	25	reg = <0x48200000 0x1000>;
	26	};
	27