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[deliverable/linux.git] / Documentation / devicetree / bindings / arm / primecell.txt
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1* ARM Primecell Peripherals
2
3ARM, Ltd. Primecell peripherals have a standard id register that can be used to
4identify the peripheral type, vendor, and revision. This value can be used for
5driver matching.
6
7Required properties:
8
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9- compatible : should be a specific name for the peripheral and
10 "arm,primecell". The specific name will match the ARM
11 engineering name for the logic block in the form: "arm,pl???"
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12
13Optional properties:
14
15- arm,primecell-periphid : Value to override the h/w value with
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16- clocks : From common clock binding. First clock is phandle to clock for apb
17 pclk. Additional clocks are optional and specific to those peripherals.
18- clock-names : From common clock binding. Shall be "apb_pclk" for first clock.
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19- dmas : From common DMA binding. If present, refers to one or more dma channels.
20- dma-names : From common DMA binding, needs to match the 'dmas' property.
21 Devices with exactly one receive and transmit channel shall name
22 these "rx" and "tx", respectively.
23- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
24- pinctrl-names : Names corresponding to the numbered pinctrl states
25- interrupts : one or more interrupt specifiers
26- interrupt-names : names corresponding to the interrupts properties
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27
28Example:
29
30serial@fff36000 {
31 compatible = "arm,pl011", "arm,primecell";
32 arm,primecell-periphid = <0x00341011>;
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34 clocks = <&pclk>;
35 clock-names = "apb_pclk";
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36
37 dmas = <&dma-controller 4>, <&dma-controller 5>;
38 dma-names = "rx", "tx";
39
40 pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;
41 pinctrl-1 = <&uart0_sleep_mode>;
42 pinctrl-names = "default","sleep";
43
44 interrupts = <0 11 0x4>;
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45};
46
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