[deliverable/linux.git] / Documentation / devicetree / bindings / ata / ahci-platform.txt

* AHCI SATA Controller

SATA nodes are defined to describe on-chip Serial ATA controllers.
Each SATA controller should have its own node.

It is possible, but not required, to represent each port as a sub-node.
It allows to enable each port independently when dealing with multiple
PHYs.

Required properties:
- compatible        : compatible string, one of:
  - "allwinner,sun4i-a10-ahci"
  - "hisilicon,hisi-ahci"
  - "cavium,octeon-7130-ahci"
  - "ibm,476gtr-ahci"
  - "marvell,armada-380-ahci"
  - "marvell,armada-3700-ahci"
  - "snps,dwc-ahci"
  - "snps,exynos5440-ahci"
  - "snps,spear-ahci"
  - "generic-ahci"
- interrupts        : <interrupt mapping for SATA IRQ>
- reg               : <registers mapping>

Please note that when using "generic-ahci" you must also specify a SoC specific
compatible:
	compatible = "manufacturer,soc-model-ahci", "generic-ahci";

Optional properties:
- dma-coherent      : Present if dma operations are coherent
- clocks            : a list of phandle + clock specifier pairs
- target-supply     : regulator for SATA target power
- phys              : reference to the SATA PHY node
- phy-names         : must be "sata-phy"

Required properties when using sub-nodes:
- #address-cells    : number of cells to encode an address
- #size-cells       : number of cells representing the size of an address


Sub-nodes required properties:
- reg		    : the port number
And at least one of the following properties:
- phys		    : reference to the SATA PHY node
- target-supply    : regulator for SATA target power

Examples:
        sata@ffe08000 {
		compatible = "snps,spear-ahci";
		reg = <0xffe08000 0x1000>;
		interrupts = <115>;
        };

	ahci: sata@01c18000 {
		compatible = "allwinner,sun4i-a10-ahci";
		reg = <0x01c18000 0x1000>;
		interrupts = <56>;
		clocks = <&pll6 0>, <&ahb_gates 25>;
		target-supply = <&reg_ahci_5v>;
	};

With sub-nodes:
	sata@f7e90000 {
		compatible = "marvell,berlin2q-achi", "generic-ahci";
		reg = <0xe90000 0x1000>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&chip CLKID_SATA>;
		#address-cells = <1>;
		#size-cells = <0>;

		sata0: sata-port@0 {
			reg = <0>;
			phys = <&sata_phy 0>;
			target-supply = <&reg_sata0>;
		};

		sata1: sata-port@1 {
			reg = <1>;
			phys = <&sata_phy 1>;
			target-supply = <&reg_sata1>;;
		};
	};
Commit	Line	Data
5f098a3e	1	* AHCI SATA Controller
02aac316 RH	2
	3	SATA nodes are defined to describe on-chip Serial ATA controllers.
	4	Each SATA controller should have its own node.
	5
724f24ee AT	6	It is possible, but not required, to represent each port as a sub-node.
	7	It allows to enable each port independently when dealing with multiple
	8	PHYs.
	9
02aac316	10	Required properties:
5799d6d4 TP	11	- compatible : compatible string, one of:
5799d6d4 TP	12	- "allwinner,sun4i-a10-ahci"
a1a205df	13	- "hisilicon,hisi-ahci"
a2127e40	14	- "cavium,octeon-7130-ahci"
5799d6d4	15	- "ibm,476gtr-ahci"
a3464ed2	16	- "marvell,armada-380-ahci"
dfc44af9	17	- "marvell,armada-3700-ahci"
5799d6d4 TP	18	- "snps,dwc-ahci"
	19	- "snps,exynos5440-ahci"
	20	- "snps,spear-ahci"
724f24ee	21	- "generic-ahci"
02aac316 RH	22	- interrupts : <interrupt mapping for SATA IRQ>
	23	- reg : <registers mapping>
	24
724f24ee AT	25	Please note that when using "generic-ahci" you must also specify a SoC specific
	26	compatible:
	27	compatible = "manufacturer,soc-model-ahci", "generic-ahci";
	28
8996b89d	29	Optional properties:
1dc737c4	30	- dma-coherent : Present if dma operations are coherent
156c5887	31	- clocks : a list of phandle + clock specifier pairs
4b3e603a	32	- target-supply : regulator for SATA target power
724f24ee AT	33	- phys : reference to the SATA PHY node
	34	- phy-names : must be "sata-phy"
	35
	36	Required properties when using sub-nodes:
	37	- #address-cells : number of cells to encode an address
	38	- #size-cells : number of cells representing the size of an address
	39
	40
	41	Sub-nodes required properties:
6bd15996 GC	42	- reg : the port number
	43	And at least one of the following properties:
	44	- phys : reference to the SATA PHY node
	45	- target-supply : regulator for SATA target power
8996b89d	46
c5754b52	47	Examples:
02aac316	48	sata@ffe08000 {
91c20950 ML	49	compatible = "snps,spear-ahci";
	50	reg = <0xffe08000 0x1000>;
	51	interrupts = <115>;
02aac316	52	};
c5754b52 OS	53
	54	ahci: sata@01c18000 {
	55	compatible = "allwinner,sun4i-a10-ahci";
	56	reg = <0x01c18000 0x1000>;
	57	interrupts = <56>;
	58	clocks = <&pll6 0>, <&ahb_gates 25>;
	59	target-supply = <&reg_ahci_5v>;
	60	};
724f24ee AT	61
	62	With sub-nodes:
	63	sata@f7e90000 {
	64	compatible = "marvell,berlin2q-achi", "generic-ahci";
	65	reg = <0xe90000 0x1000>;
	66	interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
	67	clocks = <&chip CLKID_SATA>;
	68	#address-cells = <1>;
	69	#size-cells = <0>;
	70
	71	sata0: sata-port@0 {
	72	reg = <0>;
	73	phys = <&sata_phy 0>;
6bd15996	74	target-supply = <&reg_sata0>;
724f24ee AT	75	};
	76
	77	sata1: sata-port@1 {
	78	reg = <1>;
	79	phys = <&sata_phy 1>;
6bd15996	80	target-supply = <&reg_sata1>;;
724f24ee AT	81	};
724f24ee AT	82	};