Commit | Line | Data |
---|---|---|
4a5705a9 CYT |
1 | Allwinner Reduced Serial Bus (RSB) controller |
2 | ||
3 | The RSB controller found on later Allwinner SoCs is an SMBus like 2 wire | |
4 | serial bus with 1 master and up to 15 slaves. It is represented by a node | |
5 | for the controller itself, and child nodes representing the slave devices. | |
6 | ||
7 | Required properties : | |
8 | ||
9 | - reg : Offset and length of the register set for the controller. | |
10 | - compatible : Shall be "allwinner,sun8i-a23-rsb". | |
11 | - interrupts : The interrupt line associated to the RSB controller. | |
12 | - clocks : The gate clk associated to the RSB controller. | |
13 | - resets : The reset line associated to the RSB controller. | |
14 | - #address-cells : shall be 1 | |
15 | - #size-cells : shall be 0 | |
16 | ||
17 | Optional properties : | |
18 | ||
19 | - clock-frequency : Desired RSB bus clock frequency in Hz. Maximum is 20MHz. | |
20 | If not set this defaults to 3MHz. | |
21 | ||
22 | Child nodes: | |
23 | ||
24 | An RSB controller node can contain zero or more child nodes representing | |
25 | slave devices on the bus. Child 'reg' properties should contain the slave | |
26 | device's hardware address. The hardware address is hardwired in the device, | |
27 | which can normally be found in the datasheet. | |
28 | ||
29 | Example: | |
30 | ||
31 | rsb@01f03400 { | |
32 | compatible = "allwinner,sun8i-a23-rsb"; | |
33 | reg = <0x01f03400 0x400>; | |
34 | interrupts = <0 39 4>; | |
35 | clocks = <&apb0_gates 3>; | |
36 | clock-frequency = <3000000>; | |
37 | resets = <&apb0_rst 3>; | |
38 | #address-cells = <1>; | |
39 | #size-cells = <0>; | |
40 | ||
41 | pmic@3e3 { | |
42 | compatible = "..."; | |
43 | reg = <0x3e3>; | |
44 | ||
45 | /* ... */ | |
46 | }; | |
47 | }; |