Commit | Line | Data |
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12545fa3 CC |
1 | * Amlogic Meson8b Clock and Reset Unit |
2 | ||
3 | The Amlogic Meson8b clock controller generates and supplies clock to various | |
4 | controllers within the SoC. | |
5 | ||
6 | Required Properties: | |
7 | ||
8 | - compatible: should be "amlogic,meson8b-clkc" | |
9 | - reg: it must be composed by two tuples: | |
10 | 0) physical base address of the xtal register and length of memory | |
11 | mapped region. | |
12 | 1) physical base address of the clock controller and length of memory | |
13 | mapped region. | |
14 | ||
15 | - #clock-cells: should be 1. | |
16 | ||
17 | Each clock is assigned an identifier and client nodes can use this identifier | |
18 | to specify the clock which they consume. All available clocks are defined as | |
19 | preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be | |
20 | used in device tree sources. | |
21 | ||
22 | Example: Clock controller node: | |
23 | ||
24 | clkc: clock-controller@c1104000 { | |
25 | #clock-cells = <1>; | |
26 | compatible = "amlogic,meson8b-clkc"; | |
27 | reg = <0xc1108000 0x4>, <0xc1104000 0x460>; | |
28 | }; | |
29 | ||
30 | ||
31 | Example: UART controller node that consumes the clock generated by the clock | |
32 | controller: | |
33 | ||
34 | uart_AO: serial@c81004c0 { | |
35 | compatible = "amlogic,meson-uart"; | |
36 | reg = <0xc81004c0 0x14>; | |
37 | interrupts = <0 90 1>; | |
38 | clocks = <&clkc CLKID_CLK81>; | |
39 | status = "disabled"; | |
40 | }; |