Commit | Line | Data |
---|---|---|
766e6a4e GL |
1 | This binding is a work-in-progress, and are based on some experimental |
2 | work by benh[1]. | |
3 | ||
4 | Sources of clock signal can be represented by any node in the device | |
5 | tree. Those nodes are designated as clock providers. Clock consumer | |
6 | nodes use a phandle and clock specifier pair to connect clock provider | |
7 | outputs to clock inputs. Similar to the gpio specifiers, a clock | |
8 | specifier is an array of one more more cells identifying the clock | |
9 | output on a device. The length of a clock specifier is defined by the | |
10 | value of a #clock-cells property in the clock provider node. | |
11 | ||
12 | [1] http://patchwork.ozlabs.org/patch/31551/ | |
13 | ||
14 | ==Clock providers== | |
15 | ||
16 | Required properties: | |
17 | #clock-cells: Number of cells in a clock specifier; Typically 0 for nodes | |
18 | with a single clock output and 1 for nodes with multiple | |
19 | clock outputs. | |
20 | ||
21 | Optional properties: | |
22 | clock-output-names: Recommended to be a list of strings of clock output signal | |
23 | names indexed by the first cell in the clock specifier. | |
24 | However, the meaning of clock-output-names is domain | |
25 | specific to the clock provider, and is only provided to | |
26 | encourage using the same meaning for the majority of clock | |
27 | providers. This format may not work for clock providers | |
28 | using a complex clock specifier format. In those cases it | |
29 | is recommended to omit this property and create a binding | |
30 | specific names property. | |
31 | ||
32 | Clock consumer nodes must never directly reference | |
33 | the provider's clock-output-names property. | |
34 | ||
35 | For example: | |
36 | ||
37 | oscillator { | |
38 | #clock-cells = <1>; | |
39 | clock-output-names = "ckil", "ckih"; | |
40 | }; | |
41 | ||
42 | - this node defines a device with two clock outputs, the first named | |
43 | "ckil" and the second named "ckih". Consumer nodes always reference | |
44 | clocks by index. The names should reflect the clock output signal | |
45 | names for the device. | |
46 | ||
47 | ==Clock consumers== | |
48 | ||
49 | Required properties: | |
50 | clocks: List of phandle and clock specifier pairs, one pair | |
51 | for each clock input to the device. Note: if the | |
52 | clock provider specifies '0' for #clock-cells, then | |
53 | only the phandle portion of the pair will appear. | |
54 | ||
55 | Optional properties: | |
56 | clock-names: List of clock input name strings sorted in the same | |
57 | order as the clocks property. Consumers drivers | |
58 | will use clock-names to match clock input names | |
59 | with clocks specifiers. | |
60 | clock-ranges: Empty property indicating that child nodes can inherit named | |
61 | clocks from this node. Useful for bus nodes to provide a | |
62 | clock to their children. | |
63 | ||
64 | For example: | |
65 | ||
66 | device { | |
67 | clocks = <&osc 1>, <&ref 0>; | |
68 | clock-names = "baud", "register"; | |
69 | }; | |
70 | ||
71 | ||
72 | This represents a device with two clock inputs, named "baud" and "register". | |
73 | The baud clock is connected to output 1 of the &osc device, and the register | |
74 | clock is connected to output 0 of the &ref. | |
75 | ||
76 | ==Example== | |
77 | ||
78 | /* external oscillator */ | |
79 | osc: oscillator { | |
80 | compatible = "fixed-clock"; | |
81 | #clock-cells = <1>; | |
82 | clock-frequency = <32678>; | |
83 | clock-output-names = "osc"; | |
84 | }; | |
85 | ||
86 | /* phase-locked-loop device, generates a higher frequency clock | |
87 | * from the external oscillator reference */ | |
88 | pll: pll@4c000 { | |
89 | compatible = "vendor,some-pll-interface" | |
90 | #clock-cells = <1>; | |
91 | clocks = <&osc 0>; | |
92 | clock-names = "ref"; | |
93 | reg = <0x4c000 0x1000>; | |
94 | clock-output-names = "pll", "pll-switched"; | |
95 | }; | |
96 | ||
97 | /* UART, using the low frequency oscillator for the baud clock, | |
98 | * and the high frequency switched PLL output for register | |
99 | * clocking */ | |
100 | uart@a000 { | |
101 | compatible = "fsl,imx-uart"; | |
102 | reg = <0xa000 0x1000>; | |
103 | interrupts = <33>; | |
104 | clocks = <&osc 0>, <&pll 1>; | |
105 | clock-names = "baud", "register"; | |
106 | }; | |
107 | ||
108 | This DT fragment defines three devices: an external oscillator to provide a | |
109 | low-frequency reference clock, a PLL device to generate a higher frequency | |
110 | clock signal, and a UART. | |
111 | ||
112 | * The oscillator is fixed-frequency, and provides one clock output, named "osc". | |
113 | * The PLL is both a clock provider and a clock consumer. It uses the clock | |
114 | signal generated by the external oscillator, and provides two output signals | |
115 | ("pll" and "pll-switched"). | |
116 | * The UART has its baud clock connected the external oscillator and its | |
117 | register clock connected to the PLL clock (the "pll-switched" signal) |