Commit | Line | Data |
---|---|---|
6233fe38 CC |
1 | * Samsung Exynos4415 Clock Controller |
2 | ||
3 | The Exynos4415 clock controller generates and supplies clock to various | |
4 | consumer devices within the Exynos4415 SoC. | |
5 | ||
6 | Required properties: | |
7 | ||
8 | - compatible: should be one of the following: | |
9 | - "samsung,exynos4415-cmu" - for the main system clocks controller | |
10 | (CMU_LEFTBUS, CMU_RIGHTBUS, CMU_TOP, CMU_CPU clock domains). | |
11 | - "samsung,exynos4415-cmu-dmc" - for the Exynos4415 SoC DRAM Memory | |
12 | Controller (DMC) domain clock controller. | |
13 | ||
14 | - reg: physical base address of the controller and length of memory mapped | |
15 | region. | |
16 | ||
17 | - #clock-cells: should be 1. | |
18 | ||
19 | Each clock is assigned an identifier and client nodes can use this identifier | |
20 | to specify the clock which they consume. | |
21 | ||
22 | All available clocks are defined as preprocessor macros in | |
23 | dt-bindings/clock/exynos4415.h header and can be used in device | |
24 | tree sources. | |
25 | ||
26 | Example 1: An example of a clock controller node is listed below. | |
27 | ||
28 | cmu: clock-controller@10030000 { | |
29 | compatible = "samsung,exynos4415-cmu"; | |
30 | reg = <0x10030000 0x18000>; | |
31 | #clock-cells = <1>; | |
32 | }; | |
33 | ||
34 | cmu-dmc: clock-controller@105C0000 { | |
35 | compatible = "samsung,exynos4415-cmu-dmc"; | |
36 | reg = <0x105C0000 0x3000>; | |
37 | #clock-cells = <1>; | |
38 | }; |