[deliverable/linux.git] / Documentation / devicetree / bindings / clock / mvebu-cpu-clock.txt

Device Tree Clock bindings for cpu clock of Marvell EBU platforms

Required properties:
- compatible : shall be one of the following:
	"marvell,armada-xp-cpu-clock" - cpu clocks for Armada XP
- reg : Address and length of the clock complex register set, followed
        by address and length of the PMU DFS registers
- #clock-cells : should be set to 1.
- clocks : shall be the input parent clock phandle for the clock.

cpuclk: clock-complex@d0018700 {
	#clock-cells = <1>;
	compatible = "marvell,armada-xp-cpu-clock";
	reg = <0xd0018700 0xA0>, <0x1c054 0x10>;
	clocks = <&coreclk 1>;
}

cpu@0 {
	compatible = "marvell,sheeva-v7";
	reg = <0>;
	clocks = <&cpuclk 0>;
};
Commit	Line	Data
ab8ba01b GC	1	Device Tree Clock bindings for cpu clock of Marvell EBU platforms
	2
	3	Required properties:
	4	- compatible : shall be one of the following:
	5	"marvell,armada-xp-cpu-clock" - cpu clocks for Armada XP
ee2d8ea1 TP	6	- reg : Address and length of the clock complex register set, followed
ee2d8ea1 TP	7	by address and length of the PMU DFS registers
ab8ba01b GC	8	- #clock-cells : should be set to 1.
	9	- clocks : shall be the input parent clock phandle for the clock.
	10
	11	cpuclk: clock-complex@d0018700 {
	12	#clock-cells = <1>;
	13	compatible = "marvell,armada-xp-cpu-clock";
ee2d8ea1	14	reg = <0xd0018700 0xA0>, <0x1c054 0x10>;
ab8ba01b GC	15	clocks = <&coreclk 1>;
	16	}
	17
	18	cpu@0 {
	19	compatible = "marvell,sheeva-v7";
	20	reg = <0>;
	21	clocks = <&cpuclk 0>;
	22	};