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c5115953 NF |
1 | * Atmel Direct Memory Access Controller (DMA) |
2 | ||
3 | Required properties: | |
bbe89c8e LD |
4 | - compatible: Should be "atmel,<chip>-dma". |
5 | - reg: Should contain DMA registers location and length. | |
6 | - interrupts: Should contain DMA interrupt. | |
7 | - #dma-cells: Must be <2>, used to represent the number of integer cells in | |
8 | the dmas property of client devices. | |
c5115953 | 9 | |
bbe89c8e | 10 | Example: |
c5115953 | 11 | |
bbe89c8e | 12 | dma0: dma@ffffec00 { |
c5115953 NF |
13 | compatible = "atmel,at91sam9g45-dma"; |
14 | reg = <0xffffec00 0x200>; | |
15 | interrupts = <21>; | |
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16 | #dma-cells = <2>; |
17 | }; | |
18 | ||
19 | DMA clients connected to the Atmel DMA controller must use the format | |
20 | described in the dma.txt file, using a three-cell specifier for each channel: | |
21 | a phandle plus two interger cells. | |
22 | The three cells in order are: | |
23 | ||
24 | 1. A phandle pointing to the DMA controller. | |
25 | 2. The memory interface (16 most significant bits), the peripheral interface | |
26 | (16 less significant bits). | |
27 | 3. The peripheral identifier for the hardware handshaking interface. The | |
28 | identifier can be different for tx and rx. | |
29 | ||
30 | Example: | |
31 | ||
32 | i2c0@i2c@f8010000 { | |
33 | compatible = "atmel,at91sam9x5-i2c"; | |
34 | reg = <0xf8010000 0x100>; | |
35 | interrupts = <9 4 6>; | |
36 | dmas = <&dma0 1 7>, | |
37 | <&dma0 1 8>; | |
38 | dma-names = "tx", "rx"; | |
c5115953 | 39 | }; |