Commit | Line | Data |
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aa3da644 JH |
1 | * Generic DMA Controller and DMA request bindings |
2 | ||
3 | Generic binding to provide a way for a driver using DMA Engine to retrieve the | |
4 | DMA request or channel information that goes from a hardware device to a DMA | |
5 | controller. | |
6 | ||
7 | ||
8 | * DMA controller | |
9 | ||
10 | Required property: | |
11 | - #dma-cells: Must be at least 1. Used to provide DMA controller | |
12 | specific information. See DMA client binding below for | |
13 | more details. | |
14 | ||
15 | Optional properties: | |
deef1244 | 16 | - dma-channels: Number of DMA channels supported by the controller. |
1f154fad | 17 | - dma-requests: Number of DMA request signals supported by the |
aa3da644 JH |
18 | controller. |
19 | ||
20 | Example: | |
21 | ||
22 | dma: dma@48000000 { | |
deef1244 | 23 | compatible = "ti,omap-sdma"; |
aa3da644 JH |
24 | reg = <0x48000000 0x1000>; |
25 | interrupts = <0 12 0x4 | |
26 | 0 13 0x4 | |
27 | 0 14 0x4 | |
28 | 0 15 0x4>; | |
29 | #dma-cells = <1>; | |
deef1244 MP |
30 | dma-channels = <32>; |
31 | dma-requests = <127>; | |
aa3da644 JH |
32 | }; |
33 | ||
56f13c0d PU |
34 | * DMA router |
35 | ||
36 | DMA routers are transparent IP blocks used to route DMA request lines from | |
37 | devices to the DMA controller. Some SoCs (like TI DRA7x) have more peripherals | |
38 | integrated with DMA requests than what the DMA controller can handle directly. | |
39 | ||
40 | Required property: | |
41 | - dma-masters: phandle of the DMA controller or list of phandles for | |
42 | the DMA controllers the router can direct the signal to. | |
43 | - #dma-cells: Must be at least 1. Used to provide DMA router specific | |
44 | information. See DMA client binding below for more | |
45 | details. | |
46 | ||
47 | Optional properties: | |
48 | - dma-requests: Number of incoming request lines the router can handle. | |
49 | - In the node pointed by the dma-masters: | |
50 | - dma-requests: The router driver might need to look for this in order | |
51 | to configure the routing. | |
52 | ||
53 | Example: | |
54 | sdma_xbar: dma-router@4a002b78 { | |
55 | compatible = "ti,dra7-dma-crossbar"; | |
56 | reg = <0x4a002b78 0xfc>; | |
57 | #dma-cells = <1>; | |
58 | dma-requests = <205>; | |
59 | ti,dma-safe-map = <0>; | |
60 | dma-masters = <&sdma>; | |
61 | }; | |
aa3da644 JH |
62 | |
63 | * DMA client | |
64 | ||
65 | Client drivers should specify the DMA property using a phandle to the controller | |
66 | followed by DMA controller specific data. | |
67 | ||
68 | Required property: | |
69 | - dmas: List of one or more DMA specifiers, each consisting of | |
70 | - A phandle pointing to DMA controller node | |
71 | - A number of integer cells, as determined by the | |
72 | #dma-cells property in the node referenced by phandle | |
73 | containing DMA controller specific information. This | |
74 | typically contains a DMA request line number or a | |
1f154fad | 75 | channel number, but can contain any data that is |
aa3da644 JH |
76 | required for configuring a channel. |
77 | - dma-names: Contains one identifier string for each DMA specifier in | |
78 | the dmas property. The specific strings that can be used | |
79 | are defined in the binding of the DMA client device. | |
80 | Multiple DMA specifiers can be used to represent | |
81 | alternatives and in this case the dma-names for those | |
82 | DMA specifiers must be identical (see examples). | |
83 | ||
84 | Examples: | |
85 | ||
86 | 1. A device with one DMA read channel, one DMA write channel: | |
87 | ||
88 | i2c1: i2c@1 { | |
89 | ... | |
90 | dmas = <&dma 2 /* read channel */ | |
91 | &dma 3>; /* write channel */ | |
deef1244 | 92 | dma-names = "rx", "tx"; |
aa3da644 JH |
93 | ... |
94 | }; | |
95 | ||
96 | 2. A single read-write channel with three alternative DMA controllers: | |
97 | ||
98 | dmas = <&dma1 5 | |
99 | &dma2 7 | |
100 | &dma3 2>; | |
deef1244 | 101 | dma-names = "rx-tx", "rx-tx", "rx-tx"; |
aa3da644 JH |
102 | |
103 | 3. A device with three channels, one of which has two alternatives: | |
104 | ||
105 | dmas = <&dma1 2 /* read channel */ | |
106 | &dma1 3 /* write channel */ | |
107 | &dma2 0 /* error read */ | |
108 | &dma3 0>; /* alternative error read */ | |
109 | dma-names = "rx", "tx", "error", "error"; |