Commit | Line | Data |
---|---|---|
37586e0b ZG |
1 | * MARVELL MMP DMA controller |
2 | ||
3 | Marvell Peripheral DMA Controller | |
af98715f | 4 | Used platforms: pxa688, pxa910, pxa3xx, etc |
37586e0b ZG |
5 | |
6 | Required properties: | |
7 | - compatible: Should be "marvell,pdma-1.0" | |
8 | - reg: Should contain DMA registers location and length. | |
9 | - interrupts: Either contain all of the per-channel DMA interrupts | |
10 | or one irq for pdma device | |
af98715f LP |
11 | |
12 | Optional properties: | |
13 | - #dma-channels: Number of DMA channels supported by the controller (defaults | |
14 | to 32 when not specified) | |
37586e0b ZG |
15 | |
16 | "marvell,pdma-1.0" | |
af98715f | 17 | Used platforms: pxa25x, pxa27x, pxa3xx, pxa93x, pxa168, pxa910, pxa688. |
37586e0b ZG |
18 | |
19 | Examples: | |
20 | ||
21 | /* | |
22 | * Each channel has specific irq | |
23 | * ICU parse out irq channel from ICU register, | |
24 | * while DMA controller may not able to distinguish the irq channel | |
25 | * Using this method, interrupt-parent is required as demuxer | |
26 | * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq, | |
27 | * 18~21 is ADMA irq | |
28 | */ | |
29 | pdma: dma-controller@d4000000 { | |
30 | compatible = "marvell,pdma-1.0"; | |
31 | reg = <0xd4000000 0x10000>; | |
32 | interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; | |
33 | interrupt-parent = <&intcmux32>; | |
34 | #dma-channels = <16>; | |
35 | }; | |
36 | ||
37 | /* | |
38 | * One irq for all channels | |
39 | * Dmaengine driver (DMA controller) distinguish irq channel via | |
40 | * parsing internal register | |
41 | */ | |
42 | pdma: dma-controller@d4000000 { | |
43 | compatible = "marvell,pdma-1.0"; | |
44 | reg = <0xd4000000 0x10000>; | |
45 | interrupts = <47>; | |
46 | #dma-channels = <16>; | |
47 | }; | |
48 | ||
49 | ||
50 | Marvell Two Channel DMA Controller used specifically for audio | |
af98715f | 51 | Used platforms: pxa688, pxa910 |
37586e0b ZG |
52 | |
53 | Required properties: | |
54 | - compatible: Should be "marvell,adma-1.0" or "marvell,pxa910-squ" | |
55 | - reg: Should contain DMA registers location and length. | |
56 | - interrupts: Either contain all of the per-channel DMA interrupts | |
57 | or one irq for dma device | |
58 | ||
59 | "marvell,adma-1.0" used on pxa688 | |
60 | "marvell,pxa910-squ" used on pxa910 | |
61 | ||
62 | Examples: | |
63 | ||
64 | /* each channel has specific irq */ | |
65 | adma0: dma-controller@d42a0800 { | |
66 | compatible = "marvell,adma-1.0"; | |
67 | reg = <0xd42a0800 0x100>; | |
68 | interrupts = <18 19>; | |
69 | interrupt-parent = <&intcmux32>; | |
70 | }; | |
71 | ||
72 | /* One irq for all channels */ | |
73 | squ: dma-controller@d42a0800 { | |
74 | compatible = "marvell,pxa910-squ"; | |
75 | reg = <0xd42a0800 0x100>; | |
76 | interrupts = <46>; | |
77 | }; |