projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| b096c137 EL |
1 | Allwinner A10 DMA Controller |
| 2 | ||
| 3 | This driver follows the generic DMA bindings defined in dma.txt. | |
| 4 | ||
| 5 | Required properties: | |
| 6 | ||
| 7 | - compatible: Must be "allwinner,sun4i-a10-dma" | |
| 8 | - reg: Should contain the registers base address and length | |
| 9 | - interrupts: Should contain a reference to the interrupt used by this device | |
| 10 | - clocks: Should contain a reference to the parent AHB clock | |
| 11 | - #dma-cells : Should be 2, first cell denoting normal or dedicated dma, | |
| 12 | second cell holding the request line number. | |
| 13 | ||
| 14 | Example: | |
| 15 | dma: dma-controller@01c02000 { | |
| 16 | compatible = "allwinner,sun4i-a10-dma"; | |
| 17 | reg = <0x01c02000 0x1000>; | |
| 18 | interrupts = <27>; | |
| 19 | clocks = <&ahb_gates 6>; | |
| 20 | #dma-cells = <2>; | |
| 21 | }; | |
| 22 | ||
| 23 | Clients: | |
| 24 | ||
| 25 | DMA clients connected to the Allwinner A10 DMA controller must use the | |
| 26 | format described in the dma.txt file, using a three-cell specifier for | |
| 27 | each channel: a phandle plus two integer cells. | |
| 28 | The three cells in order are: | |
| 29 | ||
| 30 | 1. A phandle pointing to the DMA controller. | |
| 31 | 2. Whether it is using normal (0) or dedicated (1) channels | |
| 32 | 3. The port ID as specified in the datasheet | |
| 33 | ||
| 34 | Example: | |
| 35 | spi2: spi@01c17000 { | |
| 36 | compatible = "allwinner,sun4i-a10-spi"; | |
| 37 | reg = <0x01c17000 0x1000>; | |
| 38 | interrupts = <0 12 4>; | |
| 39 | clocks = <&ahb_gates 22>, <&spi2_clk>; | |
| 40 | clock-names = "ahb", "mod"; | |
| 41 | dmas = <&dma 1 29>, <&dma 1 28>; | |
| 42 | dma-names = "rx", "tx"; | |
| 43 | status = "disabled"; | |
| 44 | #address-cells = <1>; | |
| 45 | #size-cells = <0>; | |
| 46 | }; |