projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 3c677cc4 MR |
1 | Allwinner A31 DMA Controller |
| 2 | ||
| 3 | This driver follows the generic DMA bindings defined in dma.txt. | |
| 4 | ||
| 5 | Required properties: | |
| 6 | ||
| 0b04ddf8 | 7 | - compatible: Must be "allwinner,sun6i-a31-dma" or "allwinner,sun8i-a23-dma" |
| 3c677cc4 MR |
8 | - reg: Should contain the registers base address and length |
| 9 | - interrupts: Should contain a reference to the interrupt used by this device | |
| 10 | - clocks: Should contain a reference to the parent AHB clock | |
| 11 | - resets: Should contain a reference to the reset controller asserting | |
| 12 | this device in reset | |
| 13 | - #dma-cells : Should be 1, a single cell holding a line request number | |
| 14 | ||
| 15 | Example: | |
| 16 | dma: dma-controller@01c02000 { | |
| 17 | compatible = "allwinner,sun6i-a31-dma"; | |
| 18 | reg = <0x01c02000 0x1000>; | |
| 19 | interrupts = <0 50 4>; | |
| 20 | clocks = <&ahb1_gates 6>; | |
| 21 | resets = <&ahb1_rst 6>; | |
| 22 | #dma-cells = <1>; | |
| 23 | }; | |
| 24 | ||
| 25 | Clients: | |
| 26 | ||
| 27 | DMA clients connected to the A31 DMA controller must use the format | |
| 28 | described in the dma.txt file, using a two-cell specifier for each | |
| 29 | channel: a phandle plus one integer cells. | |
| 30 | The two cells in order are: | |
| 31 | ||
| 32 | 1. A phandle pointing to the DMA controller. | |
| 33 | 2. The port ID as specified in the datasheet | |
| 34 | ||
| 35 | Example: | |
| 36 | spi2: spi@01c6a000 { | |
| 37 | compatible = "allwinner,sun6i-a31-spi"; | |
| 38 | reg = <0x01c6a000 0x1000>; | |
| 39 | interrupts = <0 67 4>; | |
| 40 | clocks = <&ahb1_gates 22>, <&spi2_clk>; | |
| 41 | clock-names = "ahb", "mod"; | |
| 42 | dmas = <&dma 25>, <&dma 25>; | |
| 43 | dma-names = "rx", "tx"; | |
| 44 | resets = <&ahb1_rst 22>; | |
| 45 | }; |