Commit | Line | Data |
---|---|---|
73fc610f SG |
1 | * Freescale MXS LCD Interface (LCDIF) |
2 | ||
3 | Required properties: | |
4 | - compatible: Should be "fsl,<chip>-lcdif". Supported chips include | |
5 | imx23 and imx28. | |
6 | - reg: Address and length of the register set for lcdif | |
7 | - interrupts: Should contain lcdif interrupts | |
66940653 | 8 | - display : phandle to display node (see below for details) |
73fc610f | 9 | |
66940653 SG |
10 | * display node |
11 | ||
12 | Required properties: | |
13 | - bits-per-pixel : <16> for RGB565, <32> for RGB888/666. | |
14 | - bus-width : number of data lines. Could be <8>, <16>, <18> or <24>. | |
15 | ||
16 | Required sub-node: | |
17 | - display-timings : Refer to binding doc display-timing.txt for details. | |
18 | ||
73fc610f SG |
19 | Examples: |
20 | ||
21 | lcdif@80030000 { | |
22 | compatible = "fsl,imx28-lcdif"; | |
23 | reg = <0x80030000 2000>; | |
24 | interrupts = <38 86>; | |
66940653 SG |
25 | |
26 | display: display { | |
27 | bits-per-pixel = <32>; | |
28 | bus-width = <24>; | |
29 | ||
30 | display-timings { | |
31 | native-mode = <&timing0>; | |
32 | timing0: timing0 { | |
33 | clock-frequency = <33500000>; | |
34 | hactive = <800>; | |
35 | vactive = <480>; | |
36 | hfront-porch = <164>; | |
37 | hback-porch = <89>; | |
38 | hsync-len = <10>; | |
39 | vback-porch = <23>; | |
40 | vfront-porch = <10>; | |
41 | vsync-len = <10>; | |
42 | hsync-active = <0>; | |
43 | vsync-active = <0>; | |
44 | de-active = <1>; | |
45 | pixelclk-active = <0>; | |
46 | }; | |
47 | }; | |
48 | }; | |
73fc610f | 49 | }; |