projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 46e446db HZ |
1 | * Marvell PXA GPIO controller |
| 2 | ||
| 3 | Required properties: | |
| f8731174 HZ |
4 | - compatible : Should be "intel,pxa25x-gpio", "intel,pxa26x-gpio", |
| 5 | "intel,pxa27x-gpio", "intel,pxa3xx-gpio", | |
| 99480049 RH |
6 | "marvell,pxa93x-gpio", "marvell,mmp-gpio", |
| 7 | "marvell,mmp2-gpio" or marvell,pxa1928-gpio. | |
| 46e446db | 8 | - reg : Address and length of the register set for the device |
| ace1297f HZ |
9 | - interrupts : Should be the port interrupt shared by all gpio pins. |
| 10 | There're three gpio interrupts in arch-pxa, and they're gpio0, | |
| 11 | gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp, | |
| 12 | gpio_mux. | |
| ee56884e DM |
13 | - interrupt-names : Should be the names of irq resources. Each interrupt |
| 14 | uses its own interrupt name, so there should be as many interrupt names | |
| 39521090 | 15 | as referenced interrupts. |
| ace1297f HZ |
16 | - interrupt-controller : Identifies the node as an interrupt controller. |
| 17 | - #interrupt-cells: Specifies the number of cells needed to encode an | |
| 18 | interrupt source. | |
| 46e446db HZ |
19 | - gpio-controller : Marks the device node as a gpio controller. |
| 20 | - #gpio-cells : Should be one. It is the pin number. | |
| 21 | ||
| a879891e | 22 | Example for a MMP platform: |
| 46e446db HZ |
23 | |
| 24 | gpio: gpio@d4019000 { | |
| f8731174 | 25 | compatible = "marvell,mmp-gpio"; |
| 46e446db | 26 | reg = <0xd4019000 0x1000>; |
| ace1297f | 27 | interrupts = <49>; |
| ee56884e | 28 | interrupt-names = "gpio_mux"; |
| 46e446db HZ |
29 | gpio-controller; |
| 30 | #gpio-cells = <1>; | |
| 31 | interrupt-controller; | |
| 32 | #interrupt-cells = <1>; | |
| 33 | }; | |
| 278b45b0 | 34 | |
| a879891e DM |
35 | Example for a PXA3xx platform: |
| 36 | ||
| 37 | gpio: gpio@40e00000 { | |
| 38 | compatible = "intel,pxa3xx-gpio"; | |
| 39 | reg = <0x40e00000 0x10000>; | |
| 40 | interrupt-names = "gpio0", "gpio1", "gpio_mux"; | |
| 41 | interrupts = <8 9 10>; | |
| 42 | gpio-controller; | |
| 43 | #gpio-cells = <0x2>; | |
| 44 | interrupt-controller; | |
| 45 | #interrupt-cells = <0x2>; | |
| 46 | }; | |
| 47 | ||
| 278b45b0 AL |
48 | * Marvell Orion GPIO Controller |
| 49 | ||
| 50 | Required properties: | |
| 51 | - compatible : Should be "marvell,orion-gpio" | |
| 52 | - reg : Address and length of the register set for controller. | |
| 53 | - gpio-controller : So we know this is a gpio controller. | |
| 54 | - ngpio : How many gpios this controller has. | |
| 55 | - interrupts : Up to 4 Interrupts for the controller. | |
| 56 | ||
| 57 | Optional properties: | |
| 58 | - mask-offset : For SMP Orions, offset for Nth CPU | |
| 59 | ||
| 60 | Example: | |
| 61 | ||
| 62 | gpio0: gpio@10100 { | |
| 63 | compatible = "marvell,orion-gpio"; | |
| 64 | #gpio-cells = <2>; | |
| 65 | gpio-controller; | |
| 66 | reg = <0x10100 0x40>; | |
| 67 | ngpio = <32>; | |
| 68 | interrupts = <35>, <36>, <37>, <38>; | |
| 69 | }; |