Commit | Line | Data |
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c41aa3ce MS |
1 | * Rockchip RK3xxx I2C controller |
2 | ||
3 | This driver interfaces with the native I2C controller present in Rockchip | |
4 | RK3xxx SoCs. | |
5 | ||
6 | Required properties : | |
7 | ||
8 | - reg : Offset and length of the register set for the device | |
908dbd53 DW |
9 | - compatible: should be one of the following: |
10 | - "rockchip,rk3066-i2c": for rk3066 | |
11 | - "rockchip,rk3188-i2c": for rk3188 | |
12 | - "rockchip,rk3228-i2c": for rk3228 | |
13 | - "rockchip,rk3288-i2c": for rk3288 | |
14 | - "rockchip,rk3399-i2c": for rk3399 | |
c41aa3ce | 15 | - interrupts : interrupt number |
908dbd53 DW |
16 | - clocks: See ../clock/clock-bindings.txt |
17 | - For older hardware (rk3066, rk3188, rk3228, rk3288): | |
18 | - There is one clock that's used both to derive the functional clock | |
19 | for the device and as the bus clock. | |
20 | - For newer hardware (rk3399): specified by name | |
21 | - "i2c": This is used to derive the functional clock. | |
22 | - "pclk": This is the bus clock. | |
c41aa3ce MS |
23 | |
24 | Required on RK3066, RK3188 : | |
25 | ||
26 | - rockchip,grf : the phandle of the syscon node for the general register | |
27 | file (GRF) | |
28 | - on those SoCs an alias with the correct I2C bus ID (bit offset in the GRF) | |
29 | is also required. | |
30 | ||
31 | Optional properties : | |
32 | ||
33 | - clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used. | |
387f0de6 | 34 | - i2c-scl-rising-time-ns : Number of nanoseconds the SCL signal takes to rise |
1330e291 | 35 | (t(r) in I2C specification). If not specified this is assumed to be |
36 | the maximum the specification allows(1000 ns for Standard-mode, | |
37 | 300 ns for Fast-mode) which might cause slightly slower communication. | |
387f0de6 | 38 | - i2c-scl-falling-time-ns : Number of nanoseconds the SCL signal takes to fall |
1330e291 | 39 | (t(f) in the I2C specification). If not specified this is assumed to |
40 | be the maximum the specification allows (300 ns) which might cause | |
41 | slightly slower communication. | |
387f0de6 DA |
42 | - i2c-sda-falling-time-ns : Number of nanoseconds the SDA signal takes to fall |
43 | (t(f) in the I2C specification). If not specified we'll use the SCL | |
44 | value since they are the same in nearly all cases. | |
c41aa3ce MS |
45 | |
46 | Example: | |
47 | ||
48 | aliases { | |
49 | i2c0 = &i2c0; | |
50 | } | |
51 | ||
52 | i2c0: i2c@2002d000 { | |
53 | compatible = "rockchip,rk3188-i2c"; | |
54 | reg = <0x2002d000 0x1000>; | |
55 | interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; | |
56 | #address-cells = <1>; | |
57 | #size-cells = <0>; | |
58 | ||
59 | rockchip,grf = <&grf>; | |
60 | ||
61 | clock-names = "i2c"; | |
62 | clocks = <&cru PCLK_I2C0>; | |
1330e291 | 63 | |
64 | i2c-scl-rising-time-ns = <800>; | |
65 | i2c-scl-falling-time-ns = <100>; | |
c41aa3ce | 66 | }; |