Commit | Line | Data |
---|---|---|
c8dfe94b FF |
1 | Broadcom Generic Level 2 Interrupt Controller |
2 | ||
3 | Required properties: | |
4 | ||
5 | - compatible: should be "brcm,l2-intc" | |
6 | - reg: specifies the base physical address and size of the registers | |
7 | - interrupt-controller: identifies the node as an interrupt controller | |
8 | - #interrupt-cells: specifies the number of cells needed to encode an | |
9 | interrupt source. Should be 1. | |
10 | - interrupt-parent: specifies the phandle to the parent interrupt controller | |
11 | this controller is cacaded from | |
12 | - interrupts: specifies the interrupt line in the interrupt-parent irq space | |
13 | to be used for cascading | |
14 | ||
15 | Optional properties: | |
16 | ||
17 | - brcm,irq-can-wake: If present, this means the L2 controller can be used as a | |
18 | wakeup source for system suspend/resume. | |
19 | ||
20 | Example: | |
21 | ||
22 | hif_intr2_intc: interrupt-controller@f0441000 { | |
23 | compatible = "brcm,l2-intc"; | |
24 | reg = <0xf0441000 0x30>; | |
25 | interrupt-controller; | |
26 | #interrupt-cells = <1>; | |
27 | interrupt-parent = <&intc>; | |
28 | interrupts = <0x0 0x20 0x0>; | |
29 | }; |