Commit | Line | Data |
---|---|---|
c0e68416 AS |
1 | * Ingenic JZ4780 NAND/external memory controller (NEMC) |
2 | ||
3 | This file documents the device tree bindings for the NEMC external memory | |
4 | controller in Ingenic JZ4780 | |
5 | ||
6 | Required properties: | |
7 | - compatible: Should be set to one of: | |
8 | "ingenic,jz4780-nemc" (JZ4780) | |
9 | - reg: Should specify the NEMC controller registers location and length. | |
10 | - clocks: Clock for the NEMC controller. | |
11 | - #address-cells: Must be set to 2. | |
12 | - #size-cells: Must be set to 1. | |
13 | - ranges: A set of ranges for each bank describing the physical memory layout. | |
14 | Each should specify the following 4 integer values: | |
15 | ||
16 | <cs number> 0 <physical address of mapping> <size of mapping> | |
17 | ||
18 | Each child of the NEMC node describes a device connected to the NEMC. | |
19 | ||
20 | Required child node properties: | |
21 | - reg: Should contain at least one register specifier, given in the following | |
22 | format: | |
23 | ||
24 | <cs number> <offset> <size> | |
25 | ||
26 | Multiple registers can be specified across multiple banks. This is needed, | |
27 | for example, for packaged NAND devices with multiple dies. Such devices | |
28 | should be grouped into a single node. | |
29 | ||
30 | Optional child node properties: | |
31 | - ingenic,nemc-bus-width: Specifies the bus width in bits. Defaults to 8 bits. | |
32 | - ingenic,nemc-tAS: Address setup time in nanoseconds. | |
33 | - ingenic,nemc-tAH: Address hold time in nanoseconds. | |
34 | - ingenic,nemc-tBP: Burst pitch time in nanoseconds. | |
35 | - ingenic,nemc-tAW: Access wait time in nanoseconds. | |
36 | - ingenic,nemc-tSTRV: Static memory recovery time in nanoseconds. | |
37 | ||
38 | If a child node references multiple banks in its "reg" property, the same value | |
39 | for all optional parameters will be configured for all banks. If any optional | |
40 | parameters are omitted, they will be left unchanged from whatever they are | |
41 | configured to when the NEMC device is probed (which may be the reset value as | |
42 | given in the hardware reference manual, or a value configured by the boot | |
43 | loader). | |
44 | ||
45 | Example (NEMC node with a NAND child device attached at CS1): | |
46 | ||
47 | nemc: nemc@13410000 { | |
48 | compatible = "ingenic,jz4780-nemc"; | |
49 | reg = <0x13410000 0x10000>; | |
50 | ||
51 | #address-cells = <2>; | |
52 | #size-cells = <1>; | |
53 | ||
54 | ranges = <1 0 0x1b000000 0x1000000 | |
55 | 2 0 0x1a000000 0x1000000 | |
56 | 3 0 0x19000000 0x1000000 | |
57 | 4 0 0x18000000 0x1000000 | |
58 | 5 0 0x17000000 0x1000000 | |
59 | 6 0 0x16000000 0x1000000>; | |
60 | ||
61 | clocks = <&cgu JZ4780_CLK_NEMC>; | |
62 | ||
63 | nand: nand@1 { | |
64 | compatible = "ingenic,jz4780-nand"; | |
65 | reg = <1 0 0x1000000>; | |
66 | ||
67 | ingenic,nemc-tAS = <10>; | |
68 | ingenic,nemc-tAH = <5>; | |
69 | ingenic,nemc-tBP = <10>; | |
70 | ingenic,nemc-tAW = <15>; | |
71 | ingenic,nemc-tSTRV = <100>; | |
72 | ||
73 | ... | |
74 | }; | |
75 | }; |