projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 4ab6174e SG |
1 | ChromeOS Embedded Controller |
| 2 | ||
| 3 | Google's ChromeOS EC is a Cortex-M device which talks to the AP and | |
| 4 | implements various function such as keyboard and battery charging. | |
| 5 | ||
| 6 | The EC can be connect through various means (I2C, SPI, LPC) and the | |
| 9ca18397 | 7 | compatible string used depends on the interface. Each connection method has |
| 4ab6174e SG |
8 | its own driver which connects to the top level interface-agnostic EC driver. |
| 9 | Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to | |
| 10 | the top-level driver. | |
| 11 | ||
| 12 | Required properties (I2C): | |
| 13 | - compatible: "google,cros-ec-i2c" | |
| 14 | - reg: I2C slave address | |
| 15 | ||
| 16 | Required properties (SPI): | |
| 17 | - compatible: "google,cros-ec-spi" | |
| 18 | - reg: SPI chip select | |
| 19 | ||
| 01e73c89 | 20 | Optional properties (SPI): |
| f44c21ff AS |
21 | - google,cros-ec-spi-pre-delay: Some implementations of the EC need a little |
| 22 | time to wake up from sleep before they can receive SPI transfers at a high | |
| 23 | clock rate. This property specifies the delay, in usecs, between the | |
| 24 | assertion of the CS to the start of the first clock pulse. | |
| 01e73c89 RK |
25 | - google,cros-ec-spi-msg-delay: Some implementations of the EC require some |
| 26 | additional processing time in order to accept new transactions. If the delay | |
| 27 | between transactions is not long enough the EC may not be able to respond | |
| 28 | properly to subsequent transactions and cause them to hang. This property | |
| 29 | specifies the delay, in usecs, introduced between transactions to account | |
| 30 | for the time required by the EC to get back into a state in which new data | |
| 31 | can be accepted. | |
| 32 | ||
| 4ab6174e SG |
33 | Required properties (LPC): |
| 34 | - compatible: "google,cros-ec-lpc" | |
| 35 | - reg: List of (IO address, size) pairs defining the interface uses | |
| 36 | ||
| 5b855ff3 EL |
37 | Optional properties (all): |
| 38 | - google,has-vbc-nvram: Some implementations of the EC include a small | |
| 39 | nvram space used to store verified boot context data. This boolean flag | |
| 40 | is used to specify whether this nvram is present or not. | |
| 4ab6174e SG |
41 | |
| 42 | Example for I2C: | |
| 43 | ||
| 44 | i2c@12CA0000 { | |
| 45 | cros-ec@1e { | |
| 46 | reg = <0x1e>; | |
| 47 | compatible = "google,cros-ec-i2c"; | |
| 48 | interrupts = <14 0>; | |
| 49 | interrupt-parent = <&wakeup_eint>; | |
| 50 | wakeup-source; | |
| 51 | }; | |
| 52 | ||
| 53 | ||
| 54 | Example for SPI: | |
| 55 | ||
| 56 | spi@131b0000 { | |
| 57 | ec@0 { | |
| 58 | compatible = "google,cros-ec-spi"; | |
| 59 | reg = <0x0>; | |
| 60 | interrupts = <14 0>; | |
| 61 | interrupt-parent = <&wakeup_eint>; | |
| 62 | wakeup-source; | |
| 63 | spi-max-frequency = <5000000>; | |
| 64 | controller-data { | |
| 65 | cs-gpio = <&gpf0 3 4 3 0>; | |
| 66 | samsung,spi-cs; | |
| 67 | samsung,spi-feedback-delay = <2>; | |
| 68 | }; | |
| 69 | }; | |
| 70 | }; | |
| 71 | ||
| 72 | ||
| 73 | Example for LPC is not supplied as it is not yet implemented. |