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1 | * Freescale Enhanced Secure Digital Host Controller (eSDHC) |
2 | ||
3 | The Enhanced Secure Digital Host Controller provides an interface | |
4 | for MMC, SD, and SDIO types of memory cards. | |
5 | ||
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6 | This file documents differences between the core properties described |
7 | by mmc.txt and the properties used by the sdhci-esdhc driver. | |
8 | ||
34bcda61 | 9 | Required properties: |
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10 | - interrupt-parent : interrupt source phandle. |
11 | - clock-frequency : specifies eSDHC base clock frequency. | |
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12 | |
13 | Optional properties: | |
14 | - sdhci,wp-inverted : specifies that eSDHC controller reports | |
15 | inverted write-protect state; New devices should use the generic | |
16 | "wp-inverted" property. | |
17 | - sdhci,1-bit-only : specifies that a controller can only handle | |
18 | 1-bit data transfers. New devices should use the generic | |
19 | "bus-width = <1>" property. | |
20 | - sdhci,auto-cmd12: specifies that a controller can only handle auto | |
21 | CMD12. | |
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22 | |
23 | Example: | |
24 | ||
25 | sdhci@2e000 { | |
40461472 | 26 | compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; |
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27 | reg = <0x2e000 0x1000>; |
28 | interrupts = <42 0x8>; | |
29 | interrupt-parent = <&ipic>; | |
30 | /* Filled in by U-Boot */ | |
31 | clock-frequency = <0>; | |
32 | }; |