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[deliverable/linux.git] / Documentation / devicetree / bindings / mmc / synopsys-dw-mshc.txt
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53126a2f 1* Synopsys Designware Mobile Storage Host Controller
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53126a2f 3The Synopsys designware mobile storage host controller is used to interface
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4a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
5differences between the core mmc properties described by mmc.txt and the
53126a2f 6properties used by the Synopsys Designware Mobile Storage Host Controller.
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7
8Required Properties:
9
10* compatible: should be
53126a2f 11 - snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
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12* #address-cells: should be 1.
13* #size-cells: should be 0.
14
15# Slots: The slot specific information are contained within child-nodes with
16 each child-node representing a supported slot. There should be atleast one
17 child node representing a card slot. The name of the child node representing
18 the slot is recommended to be slot@n where n is the unique number of the slot
19 connnected to the controller. The following are optional properties which
20 can be included in the slot child node.
21
22 * reg: specifies the physical slot number. The valid values of this
23 property is 0 to (num-slots -1), where num-slots is the value
24 specified by the num-slots property.
25
26 * bus-width: as documented in mmc core bindings.
27
28 * wp-gpios: specifies the write protect gpio line. The format of the
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29 gpio specifier depends on the gpio controller. If a GPIO is not used
30 for write-protect, this property is optional.
31
32 * disable-wp: If the wp-gpios property isn't present then (by default)
33 we'd assume that the write protect is hooked up directly to the
34 controller's special purpose write protect line (accessible via
35 the WRTPRT register). However, it's possible that we simply don't
36 want write protect. In that case specify 'disable-wp'.
37 NOTE: This property is not required for slots known to always
38 connect to eMMC or SDIO cards.
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39
40Optional properties:
41
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42* clocks: from common clock binding: handle to biu and ciu clocks for the
43 bus interface unit clock and the card interface unit clock.
44
45* clock-names: from common clock binding: Shall be "biu" and "ciu".
46 If the biu clock is missing we'll simply skip enabling it. If the
47 ciu clock is missing we'll just assume that the clock is running at
48 clock-frequency. It is an error to omit both the ciu clock and the
49 clock-frequency.
50
51* clock-frequency: should be the frequency (in Hz) of the ciu clock. If this
52 is specified and the ciu clock is specified then we'll try to set the ciu
53 clock to this at probe time.
54
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55* clock-freq-min-max: Minimum and Maximum clock frequency for card output
56 clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz by default.
57
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58* num-slots: specifies the number of slots supported by the controller.
59 The number of physical slots actually used could be equal or less than the
60 value specified by num-slots. If this property is not specified, the value
61 of num-slot property is assumed to be 1.
62
63* fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
64 specified, the default value of the fifo size is determined from the
65 controller registers.
66
67* card-detect-delay: Delay in milli-seconds before detecting card after card
68 insert event. The default value is 0.
69
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70* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to 50MHz)
71 (use "cap-mmc-highspeed" or "cap-sd-highspeed" instead)
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72
73* broken-cd: as documented in mmc core bindings.
74
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75* vmmc-supply: The phandle to the regulator to use for vmmc. If this is
76 specified we'll defer probe until we can find this regulator.
77
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78Aliases:
79
80- All the MSHC controller nodes should be represented in the aliases node using
81 the following format 'mshc{n}' where n is a unique number for the alias.
82
83Example:
84
85The MSHC controller node can be split into two portions, SoC specific and
86board specific portions as listed below.
87
88 dwmmc0@12200000 {
89 compatible = "snps,dw-mshc";
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90 clocks = <&clock 351>, <&clock 132>;
91 clock-names = "biu", "ciu";
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92 reg = <0x12200000 0x1000>;
93 interrupts = <0 75 0>;
94 #address-cells = <1>;
95 #size-cells = <0>;
96 };
97
98 dwmmc0@12200000 {
3c6d89ea 99 clock-frequency = <400000000>;
1f44a2a5 100 clock-freq-min-max = <400000 200000000>;
c91eab4b 101 num-slots = <1>;
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102 broken-cd;
103 fifo-depth = <0x80>;
104 card-detect-delay = <200>;
870556a3 105 vmmc-supply = <&buck8>;
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106 bus-width = <8>;
107 cap-mmc-highspeed;
108 cap-sd-highspeed;
c91eab4b 109 };
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