Commit | Line | Data |
---|---|---|
c7a8a11c HS |
1 | * Freescale Quad Serial Peripheral Interface(QuadSPI) |
2 | ||
3 | Required properties: | |
151b49e1 | 4 | - compatible : Should be "fsl,vf610-qspi", "fsl,imx6sx-qspi", |
4c9848c8 YY |
5 | "fsl,imx7d-qspi", "fsl,imx6ul-qspi", |
6 | "fsl,ls1021-qspi" | |
c7a8a11c HS |
7 | - reg : the first contains the register location and length, |
8 | the second contains the memory mapping address and length | |
9 | - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory" | |
10 | - interrupts : Should contain the interrupt for the device | |
11 | - clocks : The clocks needed by the QuadSPI controller | |
12 | - clock-names : the name of the clocks | |
13 | ||
14 | Optional properties: | |
15 | - fsl,qspi-has-second-chip: The controller has two buses, bus A and bus B. | |
16 | Each bus can be connected with two NOR flashes. | |
17 | Most of the time, each bus only has one NOR flash | |
18 | connected, this is the default case. | |
19 | But if there are two NOR flashes connected to the | |
20 | bus, you should enable this property. | |
21 | (Please check the board's schematic.) | |
22 | ||
23 | Example: | |
24 | ||
25 | qspi0: quadspi@40044000 { | |
26 | compatible = "fsl,vf610-qspi"; | |
27 | reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; | |
28 | reg-names = "QuadSPI", "QuadSPI-memory"; | |
29 | interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; | |
30 | clocks = <&clks VF610_CLK_QSPI0_EN>, | |
31 | <&clks VF610_CLK_QSPI0>; | |
32 | clock-names = "qspi_en", "qspi"; | |
33 | ||
34 | flash0: s25fl128s@0 { | |
35 | .... | |
36 | }; | |
37 | }; |