Commit | Line | Data |
---|---|---|
2eb32b0a M |
1 | TI SoC Ethernet Switch Controller Device Tree Bindings |
2 | ------------------------------------------------------ | |
3 | ||
4 | Required properties: | |
472204fe M |
5 | - compatible : Should be one of the below:- |
6 | "ti,cpsw" for backward compatible | |
7 | "ti,am335x-cpsw" for AM335x controllers | |
8 | "ti,am4372-cpsw" for AM437x controllers | |
9 | "ti,dra7-cpsw" for DRA7x controllers | |
2eb32b0a M |
10 | - reg : physical base address and size of the cpsw |
11 | registers map | |
12 | - interrupts : property with a value describing the interrupt | |
13 | number | |
14 | - interrupt-parent : The parent interrupt controller | |
15 | - cpdma_channels : Specifies number of channels in CPDMA | |
2eb32b0a | 16 | - ale_entries : Specifies No of entries ALE can hold |
2eb32b0a M |
17 | - bd_ram_size : Specifies internal descriptor RAM size |
18 | - rx_descs : Specifies number of Rx descriptors | |
19 | - mac_control : Specifies Default MAC control register content | |
20 | for the specific platform | |
21 | - slaves : Specifies number for slaves | |
e86ac13b M |
22 | - active_slave : Specifies the slave to use for time stamping, |
23 | ethtool and SIOCGMIIPHY | |
00ab94ee RC |
24 | - cpts_clock_mult : Numerator to convert input clock ticks into nanoseconds |
25 | - cpts_clock_shift : Denominator to convert input clock ticks into nanoseconds | |
2eb32b0a M |
26 | |
27 | Optional properties: | |
28 | - ti,hwmods : Must be "cpgmac0" | |
29 | - no_bd_ram : Must be 0 or 1 | |
d9ba8f9e | 30 | - dual_emac : Specifies Switch to act as Dual EMAC |
0ba517b1 MP |
31 | - syscon : Phandle to the system control device node, which is |
32 | the control module device of the am33x | |
1d147ccb M |
33 | - mode-gpios : Should be added if one/multiple gpio lines are |
34 | required to be driven so that cpsw data lines | |
35 | can be connected to the phy via selective mux. | |
36 | For example in dra72x-evm, pcf gpio has to be | |
37 | driven low so that cpsw slave 0 and phy data | |
38 | lines are connected via mux. | |
39 | ||
470d1474 M |
40 | |
41 | Slave Properties: | |
42 | Required properties: | |
e8f08ee0 | 43 | - phy-mode : See ethernet.txt file in the same directory |
470d1474 M |
44 | |
45 | Optional properties: | |
d9ba8f9e | 46 | - dual_emac_res_vlan : Specifies VID to be used to segregate the ports |
e4a9839b | 47 | - mac-address : See ethernet.txt file in the same directory |
f1eea5c1 | 48 | - phy_id : Specifies slave phy id |
9e42f715 | 49 | - phy-handle : See ethernet.txt file in the same directory |
2eb32b0a | 50 | |
1f71e8c9 MB |
51 | Slave sub-nodes: |
52 | - fixed-link : See fixed-link.txt file in the same directory | |
f1eea5c1 DR |
53 | Either the property phy_id, or the sub-node |
54 | fixed-link can be specified | |
1f71e8c9 | 55 | |
2eb32b0a M |
56 | Note: "ti,hwmods" field is used to fetch the base address and irq |
57 | resources from TI, omap hwmod data base during device registration. | |
58 | Future plan is to migrate hwmod data base contents into device tree | |
59 | blob so that, all the required data will be used from device tree dts | |
60 | file. | |
61 | ||
62 | Examples: | |
63 | ||
64 | mac: ethernet@4A100000 { | |
65 | compatible = "ti,cpsw"; | |
66 | reg = <0x4A100000 0x1000>; | |
67 | interrupts = <55 0x4>; | |
68 | interrupt-parent = <&intc>; | |
e07b94f1 | 69 | cpdma_channels = <8>; |
e07b94f1 | 70 | ale_entries = <1024>; |
e07b94f1 M |
71 | bd_ram_size = <0x2000>; |
72 | no_bd_ram = <0>; | |
73 | rx_descs = <64>; | |
74 | mac_control = <0x20>; | |
75 | slaves = <2>; | |
e86ac13b | 76 | active_slave = <0>; |
00ab94ee RC |
77 | cpts_clock_mult = <0x80000000>; |
78 | cpts_clock_shift = <29>; | |
0ba517b1 | 79 | syscon = <&cm>; |
e07b94f1 | 80 | cpsw_emac0: slave@0 { |
549985ee | 81 | phy_id = <&davinci_mdio>, <0>; |
c5ceea7a | 82 | phy-mode = "rgmii-txid"; |
e07b94f1 M |
83 | /* Filled in by U-Boot */ |
84 | mac-address = [ 00 00 00 00 00 00 ]; | |
2eb32b0a | 85 | }; |
e07b94f1 | 86 | cpsw_emac1: slave@1 { |
549985ee | 87 | phy_id = <&davinci_mdio>, <1>; |
c5ceea7a | 88 | phy-mode = "rgmii-txid"; |
e07b94f1 M |
89 | /* Filled in by U-Boot */ |
90 | mac-address = [ 00 00 00 00 00 00 ]; | |
2eb32b0a M |
91 | }; |
92 | }; | |
93 | ||
94 | (or) | |
2eb32b0a M |
95 | mac: ethernet@4A100000 { |
96 | compatible = "ti,cpsw"; | |
97 | ti,hwmods = "cpgmac0"; | |
e07b94f1 | 98 | cpdma_channels = <8>; |
e07b94f1 | 99 | ale_entries = <1024>; |
e07b94f1 M |
100 | bd_ram_size = <0x2000>; |
101 | no_bd_ram = <0>; | |
102 | rx_descs = <64>; | |
103 | mac_control = <0x20>; | |
104 | slaves = <2>; | |
e86ac13b | 105 | active_slave = <0>; |
00ab94ee RC |
106 | cpts_clock_mult = <0x80000000>; |
107 | cpts_clock_shift = <29>; | |
0ba517b1 | 108 | syscon = <&cm>; |
e07b94f1 | 109 | cpsw_emac0: slave@0 { |
549985ee | 110 | phy_id = <&davinci_mdio>, <0>; |
c5ceea7a | 111 | phy-mode = "rgmii-txid"; |
e07b94f1 M |
112 | /* Filled in by U-Boot */ |
113 | mac-address = [ 00 00 00 00 00 00 ]; | |
2eb32b0a | 114 | }; |
e07b94f1 | 115 | cpsw_emac1: slave@1 { |
549985ee | 116 | phy_id = <&davinci_mdio>, <1>; |
c5ceea7a | 117 | phy-mode = "rgmii-txid"; |
e07b94f1 M |
118 | /* Filled in by U-Boot */ |
119 | mac-address = [ 00 00 00 00 00 00 ]; | |
2eb32b0a | 120 | }; |
2eb32b0a | 121 | }; |