Commit | Line | Data |
---|---|---|
2eb32b0a M |
1 | TI SoC Ethernet Switch Controller Device Tree Bindings |
2 | ------------------------------------------------------ | |
3 | ||
4 | Required properties: | |
472204fe M |
5 | - compatible : Should be one of the below:- |
6 | "ti,cpsw" for backward compatible | |
7 | "ti,am335x-cpsw" for AM335x controllers | |
8 | "ti,am4372-cpsw" for AM437x controllers | |
9 | "ti,dra7-cpsw" for DRA7x controllers | |
2eb32b0a M |
10 | - reg : physical base address and size of the cpsw |
11 | registers map | |
12 | - interrupts : property with a value describing the interrupt | |
13 | number | |
14 | - interrupt-parent : The parent interrupt controller | |
15 | - cpdma_channels : Specifies number of channels in CPDMA | |
2eb32b0a | 16 | - ale_entries : Specifies No of entries ALE can hold |
2eb32b0a | 17 | - bd_ram_size : Specifies internal descriptor RAM size |
2eb32b0a M |
18 | - mac_control : Specifies Default MAC control register content |
19 | for the specific platform | |
20 | - slaves : Specifies number for slaves | |
e86ac13b M |
21 | - active_slave : Specifies the slave to use for time stamping, |
22 | ethtool and SIOCGMIIPHY | |
00ab94ee RC |
23 | - cpts_clock_mult : Numerator to convert input clock ticks into nanoseconds |
24 | - cpts_clock_shift : Denominator to convert input clock ticks into nanoseconds | |
2eb32b0a M |
25 | |
26 | Optional properties: | |
27 | - ti,hwmods : Must be "cpgmac0" | |
28 | - no_bd_ram : Must be 0 or 1 | |
d9ba8f9e | 29 | - dual_emac : Specifies Switch to act as Dual EMAC |
0ba517b1 MP |
30 | - syscon : Phandle to the system control device node, which is |
31 | the control module device of the am33x | |
1d147ccb M |
32 | - mode-gpios : Should be added if one/multiple gpio lines are |
33 | required to be driven so that cpsw data lines | |
34 | can be connected to the phy via selective mux. | |
35 | For example in dra72x-evm, pcf gpio has to be | |
36 | driven low so that cpsw slave 0 and phy data | |
37 | lines are connected via mux. | |
38 | ||
470d1474 M |
39 | |
40 | Slave Properties: | |
41 | Required properties: | |
e8f08ee0 | 42 | - phy-mode : See ethernet.txt file in the same directory |
470d1474 M |
43 | |
44 | Optional properties: | |
d9ba8f9e | 45 | - dual_emac_res_vlan : Specifies VID to be used to segregate the ports |
e4a9839b | 46 | - mac-address : See ethernet.txt file in the same directory |
a5d2cb3b | 47 | - phy_id : Specifies slave phy id (deprecated, use phy-handle) |
9e42f715 | 48 | - phy-handle : See ethernet.txt file in the same directory |
2eb32b0a | 49 | |
1f71e8c9 MB |
50 | Slave sub-nodes: |
51 | - fixed-link : See fixed-link.txt file in the same directory | |
a5d2cb3b DR |
52 | |
53 | Note: Exactly one of phy_id, phy-handle, or fixed-link must be specified. | |
1f71e8c9 | 54 | |
2eb32b0a M |
55 | Note: "ti,hwmods" field is used to fetch the base address and irq |
56 | resources from TI, omap hwmod data base during device registration. | |
57 | Future plan is to migrate hwmod data base contents into device tree | |
58 | blob so that, all the required data will be used from device tree dts | |
59 | file. | |
60 | ||
61 | Examples: | |
62 | ||
63 | mac: ethernet@4A100000 { | |
64 | compatible = "ti,cpsw"; | |
65 | reg = <0x4A100000 0x1000>; | |
66 | interrupts = <55 0x4>; | |
67 | interrupt-parent = <&intc>; | |
e07b94f1 | 68 | cpdma_channels = <8>; |
e07b94f1 | 69 | ale_entries = <1024>; |
e07b94f1 M |
70 | bd_ram_size = <0x2000>; |
71 | no_bd_ram = <0>; | |
72 | rx_descs = <64>; | |
73 | mac_control = <0x20>; | |
74 | slaves = <2>; | |
e86ac13b | 75 | active_slave = <0>; |
00ab94ee RC |
76 | cpts_clock_mult = <0x80000000>; |
77 | cpts_clock_shift = <29>; | |
0ba517b1 | 78 | syscon = <&cm>; |
e07b94f1 | 79 | cpsw_emac0: slave@0 { |
549985ee | 80 | phy_id = <&davinci_mdio>, <0>; |
c5ceea7a | 81 | phy-mode = "rgmii-txid"; |
e07b94f1 M |
82 | /* Filled in by U-Boot */ |
83 | mac-address = [ 00 00 00 00 00 00 ]; | |
2eb32b0a | 84 | }; |
e07b94f1 | 85 | cpsw_emac1: slave@1 { |
549985ee | 86 | phy_id = <&davinci_mdio>, <1>; |
c5ceea7a | 87 | phy-mode = "rgmii-txid"; |
e07b94f1 M |
88 | /* Filled in by U-Boot */ |
89 | mac-address = [ 00 00 00 00 00 00 ]; | |
2eb32b0a M |
90 | }; |
91 | }; | |
92 | ||
93 | (or) | |
2eb32b0a M |
94 | mac: ethernet@4A100000 { |
95 | compatible = "ti,cpsw"; | |
96 | ti,hwmods = "cpgmac0"; | |
e07b94f1 | 97 | cpdma_channels = <8>; |
e07b94f1 | 98 | ale_entries = <1024>; |
e07b94f1 M |
99 | bd_ram_size = <0x2000>; |
100 | no_bd_ram = <0>; | |
101 | rx_descs = <64>; | |
102 | mac_control = <0x20>; | |
103 | slaves = <2>; | |
e86ac13b | 104 | active_slave = <0>; |
00ab94ee RC |
105 | cpts_clock_mult = <0x80000000>; |
106 | cpts_clock_shift = <29>; | |
0ba517b1 | 107 | syscon = <&cm>; |
e07b94f1 | 108 | cpsw_emac0: slave@0 { |
549985ee | 109 | phy_id = <&davinci_mdio>, <0>; |
c5ceea7a | 110 | phy-mode = "rgmii-txid"; |
e07b94f1 M |
111 | /* Filled in by U-Boot */ |
112 | mac-address = [ 00 00 00 00 00 00 ]; | |
2eb32b0a | 113 | }; |
e07b94f1 | 114 | cpsw_emac1: slave@1 { |
549985ee | 115 | phy_id = <&davinci_mdio>, <1>; |
c5ceea7a | 116 | phy-mode = "rgmii-txid"; |
e07b94f1 M |
117 | /* Filled in by U-Boot */ |
118 | mac-address = [ 00 00 00 00 00 00 ]; | |
2eb32b0a | 119 | }; |
2eb32b0a | 120 | }; |