net: sh_eth: Add r8a7794 support
[deliverable/linux.git] / Documentation / devicetree / bindings / net / sh_eth.txt
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1* Renesas Electronics SH EtherMAC
2
3This file provides information on what the device node for the SH EtherMAC
4interface contains.
5
6Required properties:
7- compatible: "renesas,gether-r8a7740" if the device is a part of R8A7740 SoC.
8 "renesas,ether-r8a7778" if the device is a part of R8A7778 SoC.
9 "renesas,ether-r8a7779" if the device is a part of R8A7779 SoC.
10 "renesas,ether-r8a7790" if the device is a part of R8A7790 SoC.
11 "renesas,ether-r8a7791" if the device is a part of R8A7791 SoC.
0f76b9d8 12 "renesas,ether-r8a7794" if the device is a part of R8A7794 SoC.
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13 "renesas,ether-r7s72100" if the device is a part of R7S72100 SoC.
14- reg: offset and length of (1) the E-DMAC/feLic register block (required),
15 (2) the TSU register block (optional).
16- interrupts: interrupt specifier for the sole interrupt.
17- phy-mode: see ethernet.txt file in the same directory.
18- phy-handle: see ethernet.txt file in the same directory.
19- #address-cells: number of address cells for the MDIO bus, must be equal to 1.
20- #size-cells: number of size cells on the MDIO bus, must be equal to 0.
21- clocks: clock phandle and specifier pair.
22- pinctrl-0: phandle, referring to a default pin configuration node.
23
24Optional properties:
25- interrupt-parent: the phandle for the interrupt controller that services
26 interrupts for this device.
27- pinctrl-names: pin configuration state name ("default").
28- renesas,no-ether-link: boolean, specify when a board does not provide a proper
29 Ether LINK signal.
30- renesas,ether-link-active-low: boolean, specify when the Ether LINK signal is
31 active-low instead of normal active-high.
32
33Example (Lager board):
34
35 ethernet@ee700000 {
36 compatible = "renesas,ether-r8a7790";
37 reg = <0 0xee700000 0 0x400>;
38 interrupt-parent = <&gic>;
39 interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
40 clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
41 phy-mode = "rmii";
42 phy-handle = <&phy1>;
43 pinctrl-0 = <&ether_pins>;
44 pinctrl-names = "default";
45 renesas,ether-link-active-low;
46 #address-cells = <1>;
47 #size-cells = <0>;
48
49 phy1: ethernet-phy@1 {
50 reg = <1>;
51 interrupt-parent = <&irqc0>;
52 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
53 pinctrl-0 = <&phy1_pins>;
54 pinctrl-names = "default";
55 };
56 };
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