Commit | Line | Data |
---|---|---|
5b8b6484 LP |
1 | * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC) |
2 | ||
3 | ||
4 | Required properties: | |
5 | - compatible: Should be "snps,dwc-qos-ethernet-4.10" | |
6 | - reg: Address and length of the register set for the device | |
7 | - clocks: Phandles to the reference clock and the bus clock | |
8 | - clock-names: Should be "phy_ref_clk" for the reference clock and "apb_pclk" | |
9 | for the bus clock. | |
10 | - interrupt-parent: Should be the phandle for the interrupt controller | |
11 | that services interrupts for this device | |
12 | - interrupts: Should contain the core's combined interrupt signal | |
13 | - phy-mode: See ethernet.txt file in the same directory | |
14 | ||
15 | Optional properties: | |
16 | - dma-coherent: Present if dma operations are coherent | |
17 | - mac-address: See ethernet.txt in the same directory | |
18 | - local-mac-address: See ethernet.txt in the same directory | |
19 | - snps,en-lpi: If present it enables use of the AXI low-power interface | |
20 | - snps,write-requests: Number of write requests that the AXI port can issue. | |
21 | It depends on the SoC configuration. | |
22 | - snps,read-requests: Number of read requests that the AXI port can issue. | |
23 | It depends on the SoC configuration. | |
24 | - snps,burst-map: Bitmap of allowed AXI burst lengts, with the LSB | |
25 | representing 4, then 8 etc. | |
26 | - snps,txpbl: DMA Programmable burst length for the TX DMA | |
27 | - snps,rxpbl: DMA Programmable burst length for the RX DMA | |
28 | - snps,en-tx-lpi-clockgating: Enable gating of the MAC TX clock during | |
29 | TX low-power mode. | |
30 | - phy-handle: See ethernet.txt file in the same directory | |
31 | - mdio device tree subnode: When the GMAC has a phy connected to its local | |
32 | mdio, there must be device tree subnode with the following | |
33 | required properties: | |
34 | - compatible: Must be "snps,dwc-qos-ethernet-mdio". | |
35 | - #address-cells: Must be <1>. | |
36 | - #size-cells: Must be <0>. | |
37 | ||
38 | For each phy on the mdio bus, there must be a node with the following | |
39 | fields: | |
40 | ||
41 | - reg: phy id used to communicate to phy. | |
42 | - device_type: Must be "ethernet-phy". | |
43 | - fixed-mode device tree subnode: see fixed-link.txt in the same directory | |
44 | ||
45 | Examples: | |
46 | ethernet2@40010000 { | |
47 | clock-names = "phy_ref_clk", "apb_pclk"; | |
48 | clocks = <&clkc 17>, <&clkc 15>; | |
49 | compatible = "snps,dwc-qos-ethernet-4.10"; | |
50 | interrupt-parent = <&intc>; | |
51 | interrupts = <0x0 0x1e 0x4>; | |
52 | reg = <0x40010000 0x4000>; | |
53 | phy-handle = <&phy2>; | |
54 | phy-mode = "gmii"; | |
55 | ||
56 | snps,en-tx-lpi-clockgating; | |
57 | snps,en-lpi; | |
58 | snps,write-requests = <2>; | |
59 | snps,read-requests = <16>; | |
60 | snps,burst-map = <0x7>; | |
61 | snps,txpbl = <8>; | |
62 | snps,rxpbl = <2>; | |
63 | ||
64 | dma-coherent; | |
65 | ||
66 | mdio { | |
67 | #address-cells = <0x1>; | |
68 | #size-cells = <0x0>; | |
69 | phy2: phy@1 { | |
70 | compatible = "ethernet-phy-ieee802.3-c22"; | |
71 | device_type = "ethernet-phy"; | |
72 | reg = <0x1>; | |
73 | }; | |
74 | }; | |
75 | }; |