[deliverable/linux.git] / Documentation / devicetree / bindings / pci / designware-pcie.txt

* Synopsys Designware PCIe interface

Required properties:
- compatible: should contain "snps,dw-pcie" to identify the core.
- reg: Should contain the configuration address space.
- reg-names: Must be "config" for the PCIe configuration space.
    (The old way of getting the configuration address space from "ranges"
    is deprecated and should be avoided.)
- #address-cells: set to <3>
- #size-cells: set to <2>
- device_type: set to "pci"
- ranges: ranges for the PCI memory and I/O regions
- #interrupt-cells: set to <1>
- interrupt-map-mask and interrupt-map: standard PCI properties
	to define the mapping of the PCIe interface to interrupt
	numbers.
- num-lanes: number of lanes to use
- clocks: Must contain an entry for each entry in clock-names.
	See ../clocks/clock-bindings.txt for details.
- clock-names: Must include the following entries:
	- "pcie"
	- "pcie_bus"

Optional properties:
- reset-gpio: gpio pin number of power good signal
- bus-range: PCI bus numbers covered (it is recommended for new devicetrees to
  specify this property, to keep backwards compatibility a range of 0x00-0xff
  is assumed if not present)
Commit	Line	Data
53126a2f	1	* Synopsys Designware PCIe interface
340cba60 JH	2
340cba60 JH	3	Required properties:
1db823ee	4	- compatible: should contain "snps,dw-pcie" to identify the core.
4dd964df KVA	5	- reg: Should contain the configuration address space.
	6	- reg-names: Must be "config" for the PCIe configuration space.
	7	(The old way of getting the configuration address space from "ranges"
	8	is deprecated and should be avoided.)
340cba60 JH	9	- #address-cells: set to <3>
	10	- #size-cells: set to <2>
	11	- device_type: set to "pci"
	12	- ranges: ranges for the PCI memory and I/O regions
	13	- #interrupt-cells: set to <1>
	14	- interrupt-map-mask and interrupt-map: standard PCI properties
	15	to define the mapping of the PCIe interface to interrupt
	16	numbers.
4b1ced84	17	- num-lanes: number of lanes to use
1db823ee LS	18	- clocks: Must contain an entry for each entry in clock-names.
	19	See ../clocks/clock-bindings.txt for details.
	20	- clock-names: Must include the following entries:
	21	- "pcie"
	22	- "pcie_bus"
c28f8a1f MV	23
c28f8a1f MV	24	Optional properties:
340cba60	25	- reset-gpio: gpio pin number of power good signal
4f2ebe00 LS	26	- bus-range: PCI bus numbers covered (it is recommended for new devicetrees to
	27	specify this property, to keep backwards compatibility a range of 0x00-0xff
	28	is assumed if not present)