Commit | Line | Data |
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47ff3de9 KVA |
1 | TI PCI Controllers |
2 | ||
3 | PCIe Designware Controller | |
4 | - compatible: Should be "ti,dra7-pcie"" | |
5 | - reg : Two register ranges as listed in the reg-names property | |
6 | - reg-names : The first entry must be "ti-conf" for the TI specific registers | |
7 | The second entry must be "rc-dbics" for the designware pcie | |
8 | registers | |
9 | The third entry must be "config" for the PCIe configuration space | |
10 | - phys : list of PHY specifiers (used by generic PHY framework) | |
11 | - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the | |
12 | number of PHYs as specified in *phys* property. | |
13 | - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", | |
14 | where <X> is the instance number of the pcie from the HW spec. | |
15 | - interrupts : Two interrupt entries must be specified. The first one is for | |
16 | main interrupt line and the second for MSI interrupt line. | |
17 | - #address-cells, | |
18 | #size-cells, | |
19 | #interrupt-cells, | |
20 | device_type, | |
21 | ranges, | |
22 | num-lanes, | |
23 | interrupt-map-mask, | |
24 | interrupt-map : as specified in ../designware-pcie.txt | |
25 | ||
78bdcad0 KVA |
26 | Optional Property: |
27 | - gpios : Should be added if a gpio line is required to drive PERST# line | |
28 | ||
47ff3de9 KVA |
29 | Example: |
30 | axi { | |
31 | compatible = "simple-bus"; | |
32 | #size-cells = <1>; | |
33 | #address-cells = <1>; | |
34 | ranges = <0x51000000 0x51000000 0x3000 | |
35 | 0x0 0x20000000 0x10000000>; | |
36 | pcie@51000000 { | |
37 | compatible = "ti,dra7-pcie"; | |
38 | reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>; | |
39 | reg-names = "rc_dbics", "ti_conf", "config"; | |
40 | interrupts = <0 232 0x4>, <0 233 0x4>; | |
41 | #address-cells = <3>; | |
42 | #size-cells = <2>; | |
43 | device_type = "pci"; | |
44 | ranges = <0x81000000 0 0 0x03000 0 0x00010000 | |
45 | 0x82000000 0 0x20013000 0x13000 0 0xffed000>; | |
46 | #interrupt-cells = <1>; | |
47 | num-lanes = <1>; | |
48 | ti,hwmods = "pcie1"; | |
49 | phys = <&pcie1_phy>; | |
50 | phy-names = "pcie-phy0"; | |
51 | interrupt-map-mask = <0 0 0 7>; | |
52 | interrupt-map = <0 0 0 1 &pcie_intc 1>, | |
53 | <0 0 0 2 &pcie_intc 2>, | |
54 | <0 0 0 3 &pcie_intc 3>, | |
55 | <0 0 0 4 &pcie_intc 4>; | |
56 | pcie_intc: interrupt-controller { | |
57 | interrupt-controller; | |
58 | #address-cells = <0>; | |
59 | #interrupt-cells = <1>; | |
60 | }; | |
61 | }; | |
62 | }; |