Commit | Line | Data |
---|---|---|
12df9c50 YY |
1 | Rockchip specific extensions to the Analogix Display Port PHY |
2 | ------------------------------------ | |
3 | ||
4 | Required properties: | |
5 | - compatible : should be one of the following supported values: | |
6 | - "rockchip.rk3288-dp-phy" | |
7 | - clocks: from common clock binding: handle to dp clock. | |
8 | of memory mapped region. | |
9 | - clock-names: from common clock binding: | |
10 | Required elements: "24m" | |
12df9c50 YY |
11 | - #phy-cells : from the generic PHY bindings, must be 0; |
12 | ||
13 | Example: | |
14 | ||
0311c76e HS |
15 | grf: syscon@ff770000 { |
16 | compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; | |
17 | ||
18 | ... | |
19 | ||
20 | edp_phy: edp-phy { | |
21 | compatible = "rockchip,rk3288-dp-phy"; | |
22 | clocks = <&cru SCLK_EDP_24M>; | |
23 | clock-names = "24m"; | |
24 | #phy-cells = <0>; | |
25 | }; | |
12df9c50 | 26 | }; |