[deliverable/linux.git] / Documentation / devicetree / bindings / phy / rockchip-emmc-phy.txt

Rockchip EMMC PHY
-----------------------

Required properties:
 - compatible: rockchip,rk3399-emmc-phy
 - #phy-cells: must be 0
 - reg: PHY register address offset and length in "general
   register files"

Optional clocks using the clock bindings (see ../clock/clock-bindings.txt),
specified by name:
 - clock-names: Should contain "emmcclk".  Although this is listed as optional
		(because most boards can get basic functionality without having
		access to it), it is strongly suggested.
 - clocks: Should have a phandle to the card clock exported by the SDHCI driver.

Example:


grf: syscon@ff770000 {
	compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
	#address-cells = <1>;
	#size-cells = <1>;

...

	emmcphy: phy@f780 {
		compatible = "rockchip,rk3399-emmc-phy";
		reg = <0xf780 0x20>;
		clocks = <&sdhci>;
		clock-names = "emmcclk";
		#phy-cells = <0>;
	};
};
Commit	Line	Data
7ed0c961 SL	1	Rockchip EMMC PHY
	2	-----------------------
	3
	4	Required properties:
	5	- compatible: rockchip,rk3399-emmc-phy
7ed0c961	6	- #phy-cells: must be 0
5128de85	7	- reg: PHY register address offset and length in "general
7ed0c961 SL	8	register files"
7ed0c961 SL	9
11075456 DA	10	Optional clocks using the clock bindings (see ../clock/clock-bindings.txt),
	11	specified by name:
	12	- clock-names: Should contain "emmcclk". Although this is listed as optional
	13	(because most boards can get basic functionality without having
	14	access to it), it is strongly suggested.
	15	- clocks: Should have a phandle to the card clock exported by the SDHCI driver.
	16
7ed0c961 SL	17	Example:
7ed0c961 SL	18
332184ad HS	19
	20	grf: syscon@ff770000 {
	21	compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
5128de85 HS	22	#address-cells = <1>;
5128de85 HS	23	#size-cells = <1>;
332184ad HS	24
	25	...
	26
	27	emmcphy: phy@f780 {
	28	compatible = "rockchip,rk3399-emmc-phy";
5128de85	29	reg = <0xf780 0x20>;
11075456 DA	30	clocks = <&sdhci>;
11075456 DA	31	clock-names = "emmcclk";
332184ad HS	32	#phy-cells = <0>;
332184ad HS	33	};
7ed0c961	34	};