Commit | Line | Data |
---|---|---|
ba4bdc9e HG |
1 | Allwinner sun4i USB PHY |
2 | ----------------------- | |
3 | ||
4 | Required properties: | |
fecc2d78 MR |
5 | - compatible : should be one of |
6 | * allwinner,sun4i-a10-usb-phy | |
7 | * allwinner,sun5i-a13-usb-phy | |
8 | * allwinner,sun6i-a31-usb-phy | |
9 | * allwinner,sun7i-a20-usb-phy | |
123dfdbc | 10 | * allwinner,sun8i-a23-usb-phy |
fc1f45ed | 11 | * allwinner,sun8i-a33-usb-phy |
626a630e | 12 | * allwinner,sun8i-h3-usb-phy |
ba4bdc9e | 13 | - reg : a list of offset + length pairs |
fecc2d78 MR |
14 | - reg-names : |
15 | * "phy_ctrl" | |
16 | * "pmu1" | |
17 | * "pmu2" for sun4i, sun6i or sun7i | |
ba4bdc9e | 18 | - #phy-cells : from the generic phy bindings, must be 1 |
fecc2d78 MR |
19 | - clocks : phandle + clock specifier for the phy clocks |
20 | - clock-names : | |
21 | * "usb_phy" for sun4i, sun5i or sun7i | |
22 | * "usb0_phy", "usb1_phy" and "usb2_phy" for sun6i | |
123dfdbc | 23 | * "usb0_phy", "usb1_phy" for sun8i |
ba4bdc9e | 24 | - resets : a list of phandle + reset specifier pairs |
fecc2d78 MR |
25 | - reset-names : |
26 | * "usb0_reset" | |
27 | * "usb1_reset" | |
28 | * "usb2_reset" for sun4i, sun6i or sun7i | |
ba4bdc9e | 29 | |
d2332303 HG |
30 | Optional properties: |
31 | - usb0_id_det-gpios : gpio phandle for reading the otg id pin value | |
32 | - usb0_vbus_det-gpios : gpio phandle for detecting the presence of usb0 vbus | |
8665c18b | 33 | - usb0_vbus_power-supply: power-supply phandle for usb0 vbus presence detect |
d2332303 HG |
34 | - usb0_vbus-supply : regulator phandle for controller usb0 vbus |
35 | - usb1_vbus-supply : regulator phandle for controller usb1 vbus | |
36 | - usb2_vbus-supply : regulator phandle for controller usb2 vbus | |
37 | ||
ba4bdc9e HG |
38 | Example: |
39 | usbphy: phy@0x01c13400 { | |
40 | #phy-cells = <1>; | |
41 | compatible = "allwinner,sun4i-a10-usb-phy"; | |
42 | /* phy base regs, phy1 pmu reg, phy2 pmu reg */ | |
43 | reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; | |
44 | reg-names = "phy_ctrl", "pmu1", "pmu2"; | |
45 | clocks = <&usb_clk 8>; | |
46 | clock-names = "usb_phy"; | |
d2332303 HG |
47 | resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>; |
48 | reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; | |
49 | pinctrl-names = "default"; | |
50 | pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; | |
51 | usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */ | |
52 | usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ | |
53 | usb0_vbus-supply = <®_usb0_vbus>; | |
54 | usb1_vbus-supply = <®_usb1_vbus>; | |
55 | usb2_vbus-supply = <®_usb2_vbus>; | |
ba4bdc9e | 56 | }; |