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1 | * Allwinner A1X Pin Controller |
2 | ||
3 | The pins controlled by sunXi pin controller are organized in banks, | |
4 | each bank has 32 pins. Each pin has 7 multiplexing functions, with | |
5 | the first two functions being GPIO in and out. The configuration on | |
6 | the pins includes drive strength and pull-up. | |
7 | ||
8 | Required properties: | |
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9 | - compatible: Should be one of the followings (depending on you SoC): |
10 | "allwinner,sun4i-a10-pinctrl" | |
11 | "allwinner,sun5i-a10s-pinctrl" | |
12 | "allwinner,sun5i-a13-pinctrl" | |
13 | "allwinner,sun6i-a31-pinctrl" | |
47cf4b32 | 14 | "allwinner,sun6i-a31s-pinctrl" |
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15 | "allwinner,sun6i-a31-r-pinctrl" |
16 | "allwinner,sun7i-a20-pinctrl" | |
4c821d1c | 17 | "allwinner,sun8i-a23-pinctrl" |
d22bf40f | 18 | "allwinner,sun8i-a23-r-pinctrl" |
7164873e | 19 | "allwinner,sun8i-a33-pinctrl" |
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20 | "allwinner,sun9i-a80-pinctrl" |
21 | "allwinner,sun9i-a80-r-pinctrl" | |
4730f33f | 22 | "allwinner,sun8i-a83t-pinctrl" |
e87623cb | 23 | "allwinner,sun8i-h3-pinctrl" |
4919a700 | 24 | "allwinner,sun8i-h3-r-pinctrl" |
96851d39 | 25 | "allwinner,sun50i-a64-pinctrl" |
7164873e | 26 | |
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27 | - reg: Should contain the register physical address and length for the |
28 | pin controller. | |
29 | ||
30 | Please refer to pinctrl-bindings.txt in this directory for details of the | |
31 | common pinctrl bindings used by client devices. | |
32 | ||
33 | A pinctrl node should contain at least one subnodes representing the | |
34 | pinctrl groups available on the machine. Each subnode will list the | |
35 | pins it needs, and how they should be configured, with regard to muxer | |
36 | configuration, drive strength and pullups. If one of these options is | |
37 | not set, its actual value will be unspecified. | |
38 | ||
39 | Required subnode-properties: | |
40 | ||
41 | - allwinner,pins: List of strings containing the pin name. | |
42 | - allwinner,function: Function to mux the pins listed above to. | |
43 | ||
44 | Optional subnode-properties: | |
45 | - allwinner,drive: Integer. Represents the current sent to the pin | |
46 | 0: 10 mA | |
47 | 1: 20 mA | |
48 | 2: 30 mA | |
49 | 3: 40 mA | |
50 | - allwinner,pull: Integer. | |
51 | 0: No resistor | |
52 | 1: Pull-up resistor | |
53 | 2: Pull-down resistor | |
54 | ||
55 | Examples: | |
56 | ||
d8323c6b | 57 | pio: pinctrl@01c20800 { |
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58 | compatible = "allwinner,sun5i-a13-pinctrl"; |
59 | reg = <0x01c20800 0x400>; | |
60 | #address-cells = <1>; | |
61 | #size-cells = <0>; | |
62 | ||
63 | uart1_pins_a: uart1@0 { | |
64 | allwinner,pins = "PE10", "PE11"; | |
65 | allwinner,function = "uart1"; | |
66 | allwinner,drive = <0>; | |
67 | allwinner,pull = <0>; | |
68 | }; | |
69 | ||
70 | uart1_pins_b: uart1@1 { | |
71 | allwinner,pins = "PG3", "PG4"; | |
72 | allwinner,function = "uart1"; | |
73 | allwinner,drive = <0>; | |
74 | allwinner,pull = <0>; | |
75 | }; | |
76 | }; | |
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77 | |
78 | ||
79 | GPIO and interrupt controller | |
80 | ----------------------------- | |
81 | ||
82 | This hardware also acts as a GPIO controller and an interrupt | |
83 | controller. | |
84 | ||
85 | Consumers that would want to refer to one or the other (or both) | |
86 | should provide through the usual *-gpios and interrupts properties a | |
87 | cell with 3 arguments, first the number of the bank, then the pin | |
88 | inside that bank, and finally the flags for the GPIO/interrupts. | |
89 | ||
90 | Example: | |
91 | ||
92 | xio: gpio@38 { | |
93 | compatible = "nxp,pcf8574a"; | |
94 | reg = <0x38>; | |
95 | ||
96 | gpio-controller; | |
97 | #gpio-cells = <2>; | |
98 | ||
99 | interrupt-parent = <&pio>; | |
100 | interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>; | |
101 | interrupt-controller; | |
102 | #interrupt-cells = <2>; | |
103 | }; | |
104 | ||
105 | reg_usb1_vbus: usb1-vbus { | |
106 | compatible = "regulator-fixed"; | |
107 | regulator-name = "usb1-vbus"; | |
108 | regulator-min-microvolt = <5000000>; | |
109 | regulator-max-microvolt = <5000000>; | |
110 | gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; | |
111 | }; |