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1 | ImgTec TZ1090 pin controller |
2 | ||
3 | Required properties: | |
4 | - compatible: "img,tz1090-pinctrl" | |
5 | - reg: Should contain the register physical address and length of the pad | |
6 | configuration registers (CR_PADS_* and CR_IF_CTL0). | |
7 | ||
8 | Please refer to pinctrl-bindings.txt in this directory for details of the | |
9 | common pinctrl bindings used by client devices, including the meaning of the | |
10 | phrase "pin configuration node". | |
11 | ||
a0e27f51 | 12 | TZ1090's pin configuration nodes act as a container for an arbitrary number of |
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13 | subnodes. Each of these subnodes represents some desired configuration for a |
14 | pin, a group, or a list of pins or groups. This configuration can include the | |
15 | mux function to select on those pin(s)/group(s), and various pin configuration | |
16 | parameters, such as pull-up, drive strength, etc. | |
17 | ||
18 | The name of each subnode is not important; all subnodes should be enumerated | |
19 | and processed purely based on their content. | |
20 | ||
21 | Each subnode only affects those parameters that are explicitly listed. In | |
22 | other words, a subnode that lists a mux function but no pin configuration | |
23 | parameters implies no information about any pin configuration parameters. | |
24 | Similarly, a pin subnode that describes a pullup parameter implies no | |
25 | information about e.g. the mux function. For this reason, even seemingly boolean | |
26 | values are actually tristates in this binding: unspecified, off, or on. | |
27 | Unspecified is represented as an absent property, and off/on are represented as | |
28 | integer values 0 and 1. | |
29 | ||
30 | Required subnode-properties: | |
31 | - tz1090,pins : An array of strings. Each string contains the name of a pin or | |
32 | group. Valid values for these names are listed below. | |
33 | ||
34 | Optional subnode-properties: | |
35 | - tz1090,function: A string containing the name of the function to mux to the | |
36 | pin or group. Valid values for function names are listed below, including | |
37 | which pingroups can be muxed to them. | |
38 | - supported generic pinconfig properties (for further details see | |
39 | Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt): | |
40 | - bias-disable | |
41 | - bias-high-impedance | |
42 | - bias-bus-hold | |
43 | - bias-pull-up | |
44 | - bias-pull-down | |
45 | - input-schmitt-enable | |
46 | - input-schmitt-disable | |
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47 | - drive-strength: Integer, control drive strength of pins in mA. |
48 | 2: 2mA | |
49 | 4: 4mA | |
50 | 8: 8mA | |
51 | 12: 12mA | |
52 | ||
53 | ||
54 | Note that many of these properties are only valid for certain specific pins | |
55 | or groups. See the TZ1090 TRM for complete details regarding which groups | |
56 | support which functionality. The Linux pinctrl driver may also be a useful | |
57 | reference. | |
58 | ||
59 | Valid values for pin and group names are: | |
60 | ||
61 | gpio pins: | |
62 | ||
63 | These all support bias-high-impediance, bias-pull-up, bias-pull-down, and | |
64 | bias-bus-hold (which can also be provided to any of the groups below to set | |
65 | it for all pins in that group). | |
66 | ||
67 | They also all support the some form of muxing. Any pins which are contained | |
68 | in one of the mux groups (see below) can be muxed only to the functions | |
69 | supported by the mux group. All other pins can be muxed to the "perip" | |
d0c3d95a | 70 | function which enables them with their intended peripheral. |
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71 | |
72 | Different pins in the same mux group cannot be muxed to different functions, | |
73 | however it is possible to mux only a subset of the pins in a mux group to a | |
74 | particular function and leave the remaining pins unmuxed. This is useful if | |
75 | the board connects certain pins in a group to other devices to be controlled | |
76 | by GPIO, and you don't want the usual peripheral to have any control of the | |
77 | pin. | |
78 | ||
79 | ant_sel0, ant_sel1, gain0, gain1, gain2, gain3, gain4, gain5, gain6, gain7, | |
80 | i2s_bclk_out, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2, i2s_lrclk_out, | |
81 | i2s_mclk, pa_on, pdm_a, pdm_b, pdm_c, pdm_d, pll_on, rx_hp, rx_on, | |
82 | scb0_sclk, scb0_sdat, scb1_sclk, scb1_sdat, scb2_sclk, scb2_sdat, sdh_cd, | |
83 | sdh_clk_in, sdh_wp, sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2, sdio_d3, | |
84 | spi0_cs0, spi0_cs1, spi0_cs2, spi0_din, spi0_dout, spi0_mclk, spi1_cs0, | |
85 | spi1_cs1, spi1_cs2, spi1_din, spi1_dout, spi1_mclk, tft_blank_ls, tft_blue0, | |
86 | tft_blue1, tft_blue2, tft_blue3, tft_blue4, tft_blue5, tft_blue6, tft_blue7, | |
87 | tft_green0, tft_green1, tft_green2, tft_green3, tft_green4, tft_green5, | |
88 | tft_green6, tft_green7, tft_hsync_nr, tft_panelclk, tft_pwrsave, tft_red0, | |
89 | tft_red1, tft_red2, tft_red3, tft_red4, tft_red5, tft_red6, tft_red7, | |
90 | tft_vd12acb, tft_vdden_gd, tft_vsync_ns, tx_on, uart0_cts, uart0_rts, | |
91 | uart0_rxd, uart0_txd, uart1_rxd, uart1_txd. | |
92 | ||
93 | bias-high-impediance: supported. | |
94 | bias-pull-up: supported. | |
95 | bias-pull-down: supported. | |
96 | bias-bus-hold: supported. | |
97 | function: perip or those supported by pin's mux group. | |
98 | ||
99 | other pins: | |
100 | ||
101 | These other pins are part of various pin groups below, but can't be | |
102 | controlled as GPIOs. They do however support bias-high-impediance, | |
103 | bias-pull-up, bias-pull-down, and bias-bus-hold (which can also be provided | |
104 | to any of the groups below to set it for all pins in that group). | |
105 | ||
106 | clk_out0, clk_out1, tck, tdi, tdo, tms, trst. | |
107 | ||
108 | bias-high-impediance: supported. | |
109 | bias-pull-up: supported. | |
110 | bias-pull-down: supported. | |
111 | bias-bus-hold: supported. | |
112 | ||
113 | mux groups: | |
114 | ||
115 | These all support function, and some support drive configs. | |
116 | ||
117 | afe | |
118 | pins: tx_on, rx_on, pll_on, pa_on, rx_hp, ant_sel0, | |
119 | ant_sel1, gain0, gain1, gain2, gain3, gain4, | |
120 | gain5, gain6, gain7. | |
121 | function: afe, ts_out_0. | |
122 | input-schmitt-enable: supported. | |
123 | input-schmitt-disable: supported. | |
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124 | drive-strength: supported. |
125 | pdm_d | |
126 | pins: pdm_d. | |
127 | function: pdm_dac, usb_vbus. | |
128 | sdh | |
129 | pins: sdh_cd, sdh_wp, sdh_clk_in. | |
130 | function: sdh, sdio. | |
131 | sdio | |
132 | pins: sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2, | |
133 | sdio_d3. | |
134 | function: sdio, sdh. | |
135 | spi1_cs2 | |
136 | pins: spi1_cs2. | |
137 | function: spi1_cs2, usb_vbus. | |
138 | tft | |
139 | pins: tft_red0, tft_red1, tft_red2, tft_red3, | |
140 | tft_red4, tft_red5, tft_red6, tft_red7, | |
141 | tft_green0, tft_green1, tft_green2, tft_green3, | |
142 | tft_green4, tft_green5, tft_green6, tft_green7, | |
143 | tft_blue0, tft_blue1, tft_blue2, tft_blue3, | |
144 | tft_blue4, tft_blue5, tft_blue6, tft_blue7, | |
145 | tft_vdden_gd, tft_panelclk, tft_blank_ls, | |
146 | tft_vsync_ns, tft_hsync_nr, tft_vd12acb, | |
147 | tft_pwrsave. | |
148 | function: tft, ext_dac, not_iqadc_stb, iqdac_stb, ts_out_1, | |
149 | lcd_trace, phy_ringosc. | |
150 | input-schmitt-enable: supported. | |
151 | input-schmitt-disable: supported. | |
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152 | drive-strength: supported. |
153 | ||
154 | drive groups: | |
155 | ||
a7b3bf55 | 156 | These all support input-schmitt-enable, input-schmitt-disable, |
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157 | and drive-strength. |
158 | ||
159 | jtag | |
160 | pins: tck, trst, tdi, tdo, tms. | |
161 | scb1 | |
162 | pins: scb1_sdat, scb1_sclk. | |
163 | scb2 | |
164 | pins: scb2_sdat, scb2_sclk. | |
165 | spi0 | |
166 | pins: spi0_mclk, spi0_cs0, spi0_cs1, spi0_cs2, spi0_dout, spi0_din. | |
167 | spi1 | |
168 | pins: spi1_mclk, spi1_cs0, spi1_cs1, spi1_cs2, spi1_dout, spi1_din. | |
169 | uart | |
170 | pins: uart0_txd, uart0_rxd, uart0_rts, uart0_cts, | |
171 | uart1_txd, uart1_rxd. | |
172 | drive_i2s | |
173 | pins: clk_out1, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2, | |
174 | i2s_lrclk_out, i2s_bclk_out, i2s_mclk. | |
175 | drive_pdm | |
176 | pins: clk_out0, pdm_b, pdm_a. | |
177 | drive_scb0 | |
178 | pins: scb0_sclk, scb0_sdat, pdm_d, pdm_c. | |
179 | drive_sdio | |
180 | pins: sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2, sdio_d3, | |
181 | sdh_wp, sdh_cd, sdh_clk_in. | |
182 | ||
183 | convenience groups: | |
184 | ||
185 | These are just convenient groupings of pins and don't support any drive | |
186 | configs. | |
187 | ||
188 | uart0 | |
189 | pins: uart0_cts, uart0_rts, uart0_rxd, uart0_txd. | |
190 | uart1 | |
191 | pins: uart1_rxd, uart1_txd. | |
192 | scb0 | |
193 | pins: scb0_sclk, scb0_sdat. | |
194 | i2s | |
195 | pins: i2s_bclk_out, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2, | |
196 | i2s_lrclk_out, i2s_mclk. | |
197 | ||
198 | Example: | |
199 | ||
200 | pinctrl: pinctrl@02005800 { | |
201 | #gpio-range-cells = <3>; | |
202 | compatible = "img,tz1090-pinctrl"; | |
203 | reg = <0x02005800 0xe4>; | |
204 | }; | |
205 | ||
206 | Example board file extract: | |
207 | ||
208 | &pinctrl { | |
209 | uart0_default: uart0 { | |
210 | uart0_cfg { | |
211 | tz1090,pins = "uart0_rxd", | |
212 | "uart0_txd"; | |
213 | tz1090,function = "perip"; | |
214 | }; | |
215 | }; | |
216 | tft_default: tft { | |
217 | tft_cfg { | |
218 | tz1090,pins = "tft"; | |
219 | tz1090,function = "tft"; | |
220 | }; | |
221 | }; | |
222 | }; | |
223 | ||
224 | uart@02004b00 { | |
225 | pinctrl-names = "default"; | |
226 | pinctrl-0 = <&uart0_default>; | |
227 | }; |