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1 | * Marvell Dove SoC pinctrl driver for mpp |
2 | ||
3 | Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding | |
4 | part and usage. | |
5 | ||
6 | Required properties: | |
7 | - compatible: "marvell,dove-pinctrl" | |
8 | - clocks: (optional) phandle of pdma clock | |
356ca6ce | 9 | - reg: register specifiers of MPP, MPP4, and PMU MPP registers |
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10 | |
11 | Available mpp pins/groups and functions: | |
12 | Note: brackets (x) are not part of the mpp name for marvell,function and given | |
13 | only for more detailed description in this document. | |
bbd7b275 | 14 | Note: pmu* also allows for Power Management functions listed below |
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15 | |
16 | name pins functions | |
17 | ================================================================================ | |
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18 | mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu* |
19 | mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu* | |
c9f95ced | 20 | mpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt), |
bbd7b275 | 21 | uart1(rts), pmu* |
c9f95ced | 22 | mpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act), |
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23 | uart1(cts), lcd-spi(cs1), pmu* |
24 | mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu* | |
25 | mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu* | |
26 | mpp6 6 gpio, pmu, uart3(txd), sdio1(buspwr), spi1(mosi), pmu* | |
27 | mpp7 7 gpio, pmu, uart3(rxd), sdio1(ledctrl), spi1(sck), pmu* | |
28 | mpp8 8 gpio, pmu, watchdog(rstout), pmu* | |
29 | mpp9 9 gpio, pmu, pex1(clkreq), pmu* | |
30 | mpp10 10 gpio, pmu, ssp(sclk), pmu* | |
c9f95ced | 31 | mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl), |
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32 | sdio1(ledctrl), pex0(clkreq), pmu* |
33 | mpp12 12 gpio, pmu, uart2(rts), audio0(extclk), sdio1(cd), | |
34 | sata(act), pmu* | |
c9f95ced | 35 | mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp), |
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36 | ssp(extclk), pmu* |
37 | mpp14 14 gpio, pmu, uart2(txd), sdio1(buspwr), ssp(rxd), pmu* | |
38 | mpp15 15 gpio, pmu, uart2(rxd), sdio1(ledctrl), ssp(sfrm), pmu* | |
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39 | mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1) |
40 | mpp17 17 gpio, uart3(cts), sdio0(wp), ac97(sdi2), twsi(sda), | |
41 | ac97-1(sysclko) | |
42 | mpp18 18 gpio, uart3(txd), sdio0(buspwr), ac97(sdi3), lcd0(pwm) | |
43 | mpp19 19 gpio, uart3(rxd), sdio0(ledctrl), twsi(sck) | |
44 | mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso), | |
45 | ac97(sysclko) | |
46 | mpp21 21 gpio, sdio0(wp), sdio1(wp), spi1(cs), lcd-spi(cs0), | |
47 | uart1(cts), ssp(sfrm) | |
48 | mpp22 22 gpio, sdio0(buspwr), sdio1(buspwr), spi1(mosi), | |
49 | lcd-spi(mosi), uart1(cts), ssp(txd) | |
50 | mpp23 23 gpio, sdio0(ledctrl), sdio1(ledctrl), spi1(sck), | |
51 | lcd-spi(sck), ssp(sclk) | |
52 | mpp_camera 24-39 gpio, camera | |
53 | mpp_sdio0 40-45 gpio, sdio0 | |
54 | mpp_sdio1 46-51 gpio, sdio1 | |
55 | mpp_audio1 52-57 gpio, i2s1/spdifo, i2s1, spdifo, twsi, ssp/spdifo, ssp, | |
56 | ssp/twsi | |
57 | mpp_spi0 58-61 gpio, spi0 | |
58 | mpp_uart1 62-63 gpio, uart1 | |
59 | mpp_nand 64-71 gpo, nand | |
60 | audio0 - i2s, ac97 | |
61 | twsi - none, opt1, opt2, opt3 | |
62 | ||
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63 | Power Management functions (pmu*): |
64 | pmu-nc Pin not driven by any PM function | |
65 | pmu-low Pin driven low (0) | |
66 | pmu-high Pin driven high (1) | |
67 | pmic(sdi) Pin is used for PMIC SDI | |
68 | cpu-pwr-down Pin is used for CPU_PWRDWN | |
69 | standby-pwr-down Pin is used for STBY_PWRDWN | |
70 | core-pwr-good Pin is used for CORE_PWR_GOOD (Pins 0-7 only) | |
71 | cpu-pwr-good Pin is used for CPU_PWR_GOOD (Pins 8-15 only) | |
72 | bat-fault Pin is used for BATTERY_FAULT | |
73 | ext0-wakeup Pin is used for EXT0_WU | |
74 | ext1-wakeup Pin is used for EXT0_WU | |
75 | ext2-wakeup Pin is used for EXT0_WU | |
76 | pmu-blink Pin is used for blink function | |
77 | ||
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78 | Notes: |
79 | * group "mpp_audio1" allows the following functions and gpio pins: | |
80 | - gpio : gpio on pins 52-57 | |
81 | - i2s1/spdifo : audio1 i2s on pins 52-55 and spdifo on 57, no gpios | |
82 | - i2s1 : audio1 i2s on pins 52-55, gpio on pins 56,57 | |
83 | - spdifo : spdifo on pin 57, gpio on pins 52-55 | |
84 | - twsi : twsi on pins 56,57, gpio on pins 52-55 | |
85 | - ssp/spdifo : ssp on pins 52-55, spdifo on pin 57, no gpios | |
86 | - ssp : ssp on pins 52-55, gpio on pins 56,57 | |
87 | - ssp/twsi : ssp on pins 52-55, twsi on pins 56,57, no gpios | |
88 | * group "audio0" internally muxes i2s0 or ac97 controller to the dedicated | |
89 | audio0 pins. | |
90 | * group "twsi" internally muxes twsi controller to the dedicated or option pins. |