Commit | Line | Data |
---|---|---|
fd67f884 TP |
1 | * Marvell Orion SoC pinctrl driver for mpp |
2 | ||
3 | Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding | |
4 | part and usage. | |
5 | ||
6 | Required properties: | |
7 | - compatible: "marvell,88f5181l-pinctrl", "marvell,88f5182-pinctrl", | |
8 | "marvell,88f5281-pinctrl" | |
9 | ||
10 | - reg: two register areas, the first one describing the first two | |
11 | contiguous MPP registers, and the second one describing the single | |
12 | final MPP register, separated from the previous one. | |
13 | ||
14 | Available mpp pins/groups and functions: | |
15 | Note: brackets (x) are not part of the mpp name for marvell,function and given | |
16 | only for more detailed description in this document. | |
17 | ||
18 | * Marvell Orion 88f5181l | |
19 | ||
20 | name pins functions | |
21 | ================================================================================ | |
22 | mpp0 0 pcie(rstout), pci(req2), gpio | |
23 | mpp1 1 gpio, pci(gnt2) | |
24 | mpp2 2 gpio, pci(req3), pci-1(pme) | |
25 | mpp3 3 gpio, pci(gnt3) | |
26 | mpp4 4 gpio, pci(req4) | |
27 | mpp5 5 gpio, pci(gnt4) | |
28 | mpp6 6 gpio, pci(req5), pci-1(clk) | |
29 | mpp7 7 gpio, pci(gnt5), pci-1(clk) | |
30 | mpp8 8 gpio, ge(col) | |
31 | mpp9 9 gpio, ge(rxerr) | |
32 | mpp10 10 gpio, ge(crs) | |
33 | mpp11 11 gpio, ge(txerr) | |
34 | mpp12 12 gpio, ge(txd4) | |
35 | mpp13 13 gpio, ge(txd5) | |
36 | mpp14 14 gpio, ge(txd6) | |
37 | mpp15 15 gpio, ge(txd7) | |
38 | mpp16 16 ge(rxd4) | |
39 | mpp17 17 ge(rxd5) | |
40 | mpp18 18 ge(rxd6) | |
41 | mpp19 19 ge(rxd7) | |
42 | ||
43 | * Marvell Orion 88f5182 | |
44 | ||
45 | name pins functions | |
46 | ================================================================================ | |
47 | mpp0 0 pcie(rstout), pci(req2), gpio | |
48 | mpp1 1 gpio, pci(gnt2) | |
49 | mpp2 2 gpio, pci(req3), pci-1(pme) | |
50 | mpp3 3 gpio, pci(gnt3) | |
51 | mpp4 4 gpio, pci(req4), bootnand(re), sata0(prsnt) | |
52 | mpp5 5 gpio, pci(gnt4), bootnand(we), sata1(prsnt) | |
53 | mpp6 6 gpio, pci(req5), nand(re0), sata0(act) | |
54 | mpp7 7 gpio, pci(gnt5), nand(we0), sata1(act) | |
55 | mpp8 8 gpio, ge(col) | |
56 | mpp9 9 gpio, ge(rxerr) | |
57 | mpp10 10 gpio, ge(crs) | |
58 | mpp11 11 gpio, ge(txerr) | |
59 | mpp12 12 gpio, ge(txd4), nand(re1), sata0(ledprsnt) | |
60 | mpp13 13 gpio, ge(txd5), nand(we1), sata1(ledprsnt) | |
61 | mpp14 14 gpio, ge(txd6), nand(re2), sata0(ledact) | |
62 | mpp15 15 gpio, ge(txd7), nand(we2), sata1(ledact) | |
63 | mpp16 16 uart1(rxd), ge(rxd4), gpio | |
64 | mpp17 17 uart1(txd), ge(rxd5), gpio | |
65 | mpp18 18 uart1(cts), ge(rxd6), gpio | |
66 | mpp19 19 uart1(rts), ge(rxd7), gpio | |
67 | ||
68 | * Marvell Orion 88f5281 | |
69 | ||
70 | name pins functions | |
71 | ================================================================================ | |
72 | mpp0 0 pcie(rstout), pci(req2), gpio | |
73 | mpp1 1 gpio, pci(gnt2) | |
74 | mpp2 2 gpio, pci(req3), pci(pme) | |
75 | mpp3 3 gpio, pci(gnt3) | |
76 | mpp4 4 gpio, pci(req4), bootnand(re) | |
77 | mpp5 5 gpio, pci(gnt4), bootnand(we) | |
78 | mpp6 6 gpio, pci(req5), nand(re0) | |
79 | mpp7 7 gpio, pci(gnt5), nand(we0) | |
80 | mpp8 8 gpio, ge(col) | |
81 | mpp9 9 gpio, ge(rxerr) | |
82 | mpp10 10 gpio, ge(crs) | |
83 | mpp11 11 gpio, ge(txerr) | |
84 | mpp12 12 gpio, ge(txd4), nand(re1) | |
85 | mpp13 13 gpio, ge(txd5), nand(we1) | |
86 | mpp14 14 gpio, ge(txd6), nand(re2) | |
87 | mpp15 15 gpio, ge(txd7), nand(we2) | |
88 | mpp16 16 uart1(rxd), ge(rxd4) | |
89 | mpp17 17 uart1(txd), ge(rxd5) | |
90 | mpp18 18 uart1(cts), ge(rxd6) | |
91 | mpp19 19 uart1(rts), ge(rxd7) |