Commit | Line | Data |
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89a7117d II |
1 | Qualcomm PMIC Multi-Purpose Pin (MPP) block |
2 | ||
3 | This binding describes the MPP block(s) found in the 8xxx series | |
4 | of PMIC's from Qualcomm. | |
5 | ||
6 | - compatible: | |
7 | Usage: required | |
8 | Value type: <string> | |
9 | Definition: Should contain one of: | |
b4c45fe9 BA |
10 | "qcom,pm8018-mpp", |
11 | "qcom,pm8038-mpp", | |
38c1e5e7 | 12 | "qcom,pm8058-mpp", |
b4c45fe9 | 13 | "qcom,pm8821-mpp", |
89a7117d | 14 | "qcom,pm8841-mpp", |
7414b099 | 15 | "qcom,pm8916-mpp", |
b4c45fe9 BA |
16 | "qcom,pm8917-mpp", |
17 | "qcom,pm8921-mpp", | |
89a7117d | 18 | "qcom,pm8941-mpp", |
eb9610f3 | 19 | "qcom,pm8994-mpp", |
89a7117d II |
20 | "qcom,pma8084-mpp", |
21 | ||
22 | - reg: | |
23 | Usage: required | |
24 | Value type: <prop-encoded-array> | |
25 | Definition: Register base of the MPP block and length. | |
26 | ||
27 | - interrupts: | |
28 | Usage: required | |
29 | Value type: <prop-encoded-array> | |
30 | Definition: Must contain an array of encoded interrupt specifiers for | |
31 | each available MPP | |
32 | ||
33 | - gpio-controller: | |
34 | Usage: required | |
35 | Value type: <none> | |
36 | Definition: Mark the device node as a GPIO controller | |
37 | ||
38 | - #gpio-cells: | |
39 | Usage: required | |
40 | Value type: <u32> | |
41 | Definition: Must be 2; | |
42 | the first cell will be used to define MPP number and the | |
43 | second denotes the flags for this MPP | |
44 | ||
45 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | |
46 | a general description of GPIO and interrupt bindings. | |
47 | ||
48 | Please refer to pinctrl-bindings.txt in this directory for details of the | |
49 | common pinctrl bindings used by client devices, including the meaning of the | |
50 | phrase "pin configuration node". | |
51 | ||
52 | The pin configuration nodes act as a container for an arbitrary number of | |
53 | subnodes. Each of these subnodes represents some desired configuration for a | |
54 | pin or a list of pins. This configuration can include the | |
55 | mux function to select on those pin(s), and various pin configuration | |
56 | parameters, as listed below. | |
57 | ||
58 | SUBNODES: | |
59 | ||
60 | The name of each subnode is not important; all subnodes should be enumerated | |
61 | and processed purely based on their content. | |
62 | ||
63 | Each subnode only affects those parameters that are explicitly listed. In | |
64 | other words, a subnode that lists a mux function but no pin configuration | |
65 | parameters implies no information about any pin configuration parameters. | |
66 | Similarly, a pin subnode that describes a pullup parameter implies no | |
67 | information about e.g. the mux function. | |
68 | ||
69 | The following generic properties as defined in pinctrl-bindings.txt are valid | |
70 | to specify in a pin configuration subnode: | |
71 | ||
72 | - pins: | |
73 | Usage: required | |
74 | Value type: <string-array> | |
75 | Definition: List of MPP pins affected by the properties specified in | |
76 | this subnode. Valid pins are: | |
77 | mpp1-mpp4 for pm8841 | |
7414b099 | 78 | mpp1-mpp4 for pm8916 |
89a7117d II |
79 | mpp1-mpp8 for pm8941 |
80 | mpp1-mpp4 for pma8084 | |
81 | ||
82 | - function: | |
83 | Usage: required | |
84 | Value type: <string> | |
85 | Definition: Specify the alternative function to be configured for the | |
86 | specified pins. Valid values are: | |
eb5c144c BA |
87 | "digital", |
88 | "analog", | |
89 | "sink" | |
89a7117d II |
90 | |
91 | - bias-disable: | |
92 | Usage: optional | |
93 | Value type: <none> | |
94 | Definition: The specified pins should be configured as no pull. | |
95 | ||
96 | - bias-pull-up: | |
97 | Usage: optional | |
98 | Value type: <u32> | |
99 | Definition: The specified pins should be configured as pull up. | |
100 | Valid values are 600, 10000 and 30000 in bidirectional mode | |
101 | only, i.e. when operating in qcom,analog-mode and input and | |
102 | outputs are enabled. The hardware ignores the configuration | |
103 | when operating in other modes. | |
104 | ||
105 | - bias-high-impedance: | |
106 | Usage: optional | |
107 | Value type: <none> | |
108 | Definition: The specified pins will put in high-Z mode and disabled. | |
109 | ||
110 | - input-enable: | |
111 | Usage: optional | |
112 | Value type: <none> | |
113 | Definition: The specified pins are put in input mode, i.e. their input | |
114 | buffer is enabled | |
115 | ||
116 | - output-high: | |
117 | Usage: optional | |
118 | Value type: <none> | |
119 | Definition: The specified pins are configured in output mode, driven | |
120 | high. | |
121 | ||
122 | - output-low: | |
123 | Usage: optional | |
124 | Value type: <none> | |
125 | Definition: The specified pins are configured in output mode, driven | |
126 | low. | |
127 | ||
128 | - power-source: | |
129 | Usage: optional | |
130 | Value type: <u32> | |
131 | Definition: Selects the power source for the specified pins. Valid power | |
132 | sources are defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h> | |
133 | ||
099f3e4a BA |
134 | - qcom,analog-level: |
135 | Usage: optional | |
136 | Value type: <u32> | |
137 | Definition: Selects the source for analog output. Valued values are | |
138 | defined in <dt-binding/pinctrl/qcom,pmic-mpp.h> | |
139 | PMIC_MPP_AOUT_LVL_* | |
140 | ||
eb5c144c | 141 | - qcom,dtest: |
89a7117d | 142 | Usage: optional |
eb5c144c BA |
143 | Value type: <u32> |
144 | Definition: Selects which dtest rail to be routed in the various functions. | |
145 | Valid values are 1-4 | |
0e948042 | 146 | |
89a7117d II |
147 | - qcom,amux-route: |
148 | Usage: optional | |
149 | Value type: <u32> | |
150 | Definition: Selects the source for analog input. Valid values are | |
151 | defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h> | |
152 | PMIC_MPP_AMUX_ROUTE_CH5, PMIC_MPP_AMUX_ROUTE_CH6... | |
eb5c144c BA |
153 | - qcom,paired: |
154 | Usage: optional | |
155 | Value type: <none> | |
156 | Definition: Indicates that the pin should be operating in paired mode. | |
89a7117d II |
157 | |
158 | Example: | |
159 | ||
160 | mpps@a000 { | |
161 | compatible = "qcom,pm8841-mpp"; | |
162 | reg = <0xa000>; | |
163 | gpio-controller; | |
164 | #gpio-cells = <2>; | |
165 | interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>; | |
166 | ||
167 | pinctrl-names = "default"; | |
168 | pinctrl-0 = <&pm8841_default>; | |
169 | ||
170 | pm8841_default: default { | |
171 | gpio { | |
172 | pins = "mpp1", "mpp2", "mpp3", "mpp4"; | |
eb5c144c | 173 | function = "digital"; |
89a7117d II |
174 | input-enable; |
175 | power-source = <PM8841_MPP_S3>; | |
176 | }; | |
177 | }; | |
178 | }; |