Commit | Line | Data |
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fe1c9a82 LP |
1 | * Renesas Pin Function Controller (GPIO and Pin Mux/Config) |
2 | ||
e1ec9a49 MD |
3 | The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0, |
4 | R8A73A4 and R8A7740 it also acts as a GPIO controller. | |
fe1c9a82 LP |
5 | |
6 | ||
7 | Pin Control | |
8 | ----------- | |
9 | ||
10 | Required Properties: | |
11 | ||
12 | - compatible: should be one of the following. | |
1e7d5d84 | 13 | - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller. |
fe1c9a82 LP |
14 | - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller. |
15 | - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller. | |
16 | - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller. | |
17 | - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller. | |
18 | - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller. | |
7e15a967 UH |
19 | - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller. |
20 | - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller. | |
43c4436e | 21 | - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller. |
fe1c9a82 LP |
22 | - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller. |
23 | ||
24 | - reg: Base address and length of each memory resource used by the pin | |
25 | controller hardware module. | |
26 | ||
27 | Optional properties: | |
28 | ||
29 | - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden | |
30 | otherwise. Should be 3. | |
31 | ||
70c8f01a LP |
32 | - interrupts-extended: Specify the interrupts associated with external |
33 | IRQ pins. This property is mandatory when the PFC handles GPIOs and | |
34 | forbidden otherwise. When specified, it must contain one interrupt per | |
35 | external IRQ, sorted by external IRQ number. | |
36 | ||
fe1c9a82 LP |
37 | The PFC node also acts as a container for pin configuration nodes. Please refer |
38 | to pinctrl-bindings.txt in this directory for the definition of the term "pin | |
39 | configuration node" and for the common pinctrl bindings used by client devices. | |
40 | ||
12f3ad8d LP |
41 | Each pin configuration node represents a desired configuration for a pin, a |
42 | pin group, or a list of pins or pin groups. The configuration can include the | |
43 | function to select on those pin(s) and pin configuration parameters (such as | |
44 | pull-up and pull-down). | |
fe1c9a82 | 45 | |
12f3ad8d LP |
46 | Pin configuration nodes contain pin configuration properties, either directly |
47 | or grouped in child subnodes. Both pin muxing and configuration parameters can | |
48 | be grouped in that way and referenced as a single pin configuration node by | |
49 | client devices. | |
50 | ||
51 | A configuration node or subnode must reference at least one pin (through the | |
52 | pins or pin groups properties) and contain at least a function or one | |
53 | configuration parameter. When the function is present only pin groups can be | |
54 | used to reference pins. | |
fe1c9a82 LP |
55 | |
56 | All pin configuration nodes and subnodes names are ignored. All of those nodes | |
57 | are parsed through phandles and processed purely based on their content. | |
58 | ||
59 | Pin Configuration Node Properties: | |
60 | ||
16ccaf5b LP |
61 | - pins : An array of strings, each string containing the name of a pin. |
62 | - groups : An array of strings, each string containing the name of a pin | |
fe1c9a82 LP |
63 | group. |
64 | ||
16ccaf5b LP |
65 | - function: A string containing the name of the function to mux to the pin |
66 | group(s) specified by the groups property. | |
fe1c9a82 LP |
67 | |
68 | Valid values for pin, group and function names can be found in the group and | |
69 | function arrays of the PFC data file corresponding to the SoC | |
70 | (drivers/pinctrl/sh-pfc/pfc-*.c) | |
71 | ||
12f3ad8d LP |
72 | The pin configuration parameters use the generic pinconf bindings defined in |
73 | pinctrl-bindings.txt in this directory. The supported parameters are | |
74 | bias-disable, bias-pull-up and bias-pull-down. | |
75 | ||
fe1c9a82 LP |
76 | |
77 | GPIO | |
78 | ---- | |
79 | ||
e1ec9a49 | 80 | On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node. |
fe1c9a82 LP |
81 | |
82 | Required Properties: | |
83 | ||
84 | - gpio-controller: Marks the device node as a gpio controller. | |
85 | ||
86 | - #gpio-cells: Should be 2. The first cell is the GPIO number and the second | |
87 | cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the | |
88 | GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. | |
89 | ||
90 | The syntax of the gpio specifier used by client nodes should be the following | |
91 | with values derived from the SoC user manual. | |
92 | ||
93 | <[phandle of the gpio controller node] | |
94 | [pin number within the gpio controller] | |
95 | [flags]> | |
96 | ||
97 | On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver. | |
98 | Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | |
99 | for documentation of the GPIO device tree bindings on those platforms. | |
100 | ||
101 | ||
102 | Examples | |
103 | -------- | |
104 | ||
105 | Example 1: SH73A0 (SH-Mobile AG5) pin controller node | |
106 | ||
107 | pfc: pfc@e6050000 { | |
108 | compatible = "renesas,pfc-sh73a0"; | |
109 | reg = <0xe6050000 0x8000>, | |
110 | <0xe605801c 0x1c>; | |
111 | gpio-controller; | |
112 | #gpio-cells = <2>; | |
70c8f01a LP |
113 | interrupts-extended = |
114 | <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, | |
115 | <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, | |
116 | <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, | |
117 | <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, | |
118 | <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, | |
119 | <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, | |
120 | <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, | |
121 | <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; | |
fe1c9a82 LP |
122 | }; |
123 | ||
124 | Example 2: A GPIO LED node that references a GPIO | |
125 | ||
126 | #include <dt-bindings/gpio/gpio.h> | |
127 | ||
128 | leds { | |
129 | compatible = "gpio-leds"; | |
130 | led1 { | |
131 | gpios = <&pfc 20 GPIO_ACTIVE_LOW>; | |
132 | }; | |
133 | }; | |
134 | ||
135 | Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps | |
136 | for the MMCIF and SCIFA4 devices | |
137 | ||
138 | &pfc { | |
139 | pinctrl-0 = <&scifa4_pins>; | |
140 | pinctrl-names = "default"; | |
141 | ||
142 | mmcif_pins: mmcif { | |
12f3ad8d | 143 | mux { |
16ccaf5b LP |
144 | groups = "mmc0_data8_0", "mmc0_ctrl_0"; |
145 | function = "mmc0"; | |
12f3ad8d LP |
146 | }; |
147 | cfg { | |
16ccaf5b LP |
148 | groups = "mmc0_data8_0"; |
149 | pins = "PORT279"; | |
12f3ad8d LP |
150 | bias-pull-up; |
151 | }; | |
fe1c9a82 LP |
152 | }; |
153 | ||
154 | scifa4_pins: scifa4 { | |
16ccaf5b LP |
155 | groups = "scifa4_data", "scifa4_ctrl"; |
156 | function = "scifa4"; | |
fe1c9a82 LP |
157 | }; |
158 | }; | |
159 | ||
160 | Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device | |
161 | ||
162 | &mmcif { | |
163 | pinctrl-0 = <&mmcif_pins>; | |
164 | pinctrl-names = "default"; | |
165 | ||
166 | bus-width = <8>; | |
167 | vmmc-supply = <®_1p8v>; | |
168 | status = "okay"; | |
169 | }; |