Commit | Line | Data |
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53ad9e8d PA |
1 | TI SOC EHRPWM based PWM controller |
2 | ||
3 | Required properties: | |
bdd7cf97 | 4 | - compatible: Must be "ti,<soc>-ehrpwm". |
229110c1 FCJ |
5 | for am33xx - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; |
6 | for am4372 - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm"; | |
7 | for da850 - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm"; | |
34370142 | 8 | for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm"; |
ebeec0af LP |
9 | - #pwm-cells: should be 3. See pwm.txt in this directory for a description of |
10 | the cells format. The only third cell flag supported by this binding is | |
11 | PWM_POLARITY_INVERTED. | |
53ad9e8d PA |
12 | - reg: physical base address and size of the registers map. |
13 | ||
14 | Optional properties: | |
229110c1 FCJ |
15 | - clocks: Handle to the PWM's time-base and functional clock. |
16 | - clock-names: Must be set to "tbclk" and "fck". | |
53ad9e8d PA |
17 | |
18 | Example: | |
19 | ||
956abfe3 | 20 | ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */ |
229110c1 | 21 | compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; |
53ad9e8d PA |
22 | #pwm-cells = <3>; |
23 | reg = <0x48300200 0x100>; | |
229110c1 FCJ |
24 | clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; |
25 | clock-names = "tbclk", "fck"; | |
53ad9e8d | 26 | }; |
bdd7cf97 | 27 | |
956abfe3 | 28 | ehrpwm0: pwm@48300200 { /* EHRPWM on am4372 */ |
229110c1 | 29 | compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; |
96d5a545 FCJ |
30 | #pwm-cells = <3>; |
31 | reg = <0x48300200 0x80>; | |
229110c1 FCJ |
32 | clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; |
33 | clock-names = "tbclk", "fck"; | |
96d5a545 FCJ |
34 | ti,hwmods = "ehrpwm0"; |
35 | }; | |
36 | ||
956abfe3 | 37 | ehrpwm0: pwm@1f00000 { /* EHRPWM on da850 */ |
229110c1 | 38 | compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; |
bdd7cf97 | 39 | #pwm-cells = <3>; |
956abfe3 | 40 | reg = <0x1f00000 0x2000>; |
bdd7cf97 | 41 | }; |
34370142 V |
42 | |
43 | ehrpwm0: pwm@4843e200 { /* EHRPWM on dra746 */ | |
44 | compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm"; | |
45 | #pwm-cells = <3>; | |
46 | reg = <0x4843e200 0x80>; | |
47 | clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>; | |
48 | clock-names = "tbclk", "fck"; | |
49 | }; |