[deliverable/linux.git] / Documentation / devicetree / bindings / reset / hisilicon,hi6220-reset.txt

Hisilicon System Reset Controller
======================================

Please also refer to reset.txt in this directory for common reset
controller binding usage.

The reset controller registers are part of the system-ctl block on
hi6220 SoC.

Required properties:
- compatible: may be "hisilicon,hi6220-sysctrl"
- reg: should be register base and length as documented in the
  datasheet
- #reset-cells: 1, see below

Example:
sys_ctrl: sys_ctrl@f7030000 {
	compatible = "hisilicon,hi6220-sysctrl", "syscon";
	reg = <0x0 0xf7030000 0x0 0x2000>;
	#clock-cells = <1>;
	#reset-cells = <1>;
};

Specifying reset lines connected to IP modules
==============================================
example:

        uart1: serial@..... {
                ...
                resets = <&sys_ctrl PERIPH_RSTEN3_UART1>;
                ...
        };

The index could be found in <dt-bindings/reset/hisi,hi6220-resets.h>.
Commit	Line	Data
04d11269 CF	1	Hisilicon System Reset Controller
	2	======================================
	3
	4	Please also refer to reset.txt in this directory for common reset
	5	controller binding usage.
	6
	7	The reset controller registers are part of the system-ctl block on
	8	hi6220 SoC.
	9
	10	Required properties:
	11	- compatible: may be "hisilicon,hi6220-sysctrl"
	12	- reg: should be register base and length as documented in the
	13	datasheet
	14	- #reset-cells: 1, see below
	15
	16	Example:
	17	sys_ctrl: sys_ctrl@f7030000 {
	18	compatible = "hisilicon,hi6220-sysctrl", "syscon";
	19	reg = <0x0 0xf7030000 0x0 0x2000>;
	20	#clock-cells = <1>;
	21	#reset-cells = <1>;
	22	};
	23
	24	Specifying reset lines connected to IP modules
	25	==============================================
	26	example:
	27
	28	uart1: serial@..... {
	29	...
	30	resets = <&sys_ctrl PERIPH_RSTEN3_UART1>;
	31	...
	32	};
	33
	34	The index could be found in <dt-bindings/reset/hisi,hi6220-resets.h>.