[deliverable/linux.git] / Documentation / devicetree / bindings / rtc / nvidia,tegra20-rtc.txt

NVIDIA Tegra20 real-time clock

The Tegra RTC maintains seconds and milliseconds counters, and five alarm
registers. The alarms and other interrupts may wake the system from low-power
state.

Required properties:

- compatible : For Tegra20, must contain "nvidia,tegra20-rtc".  Otherwise,
  must contain '"nvidia,<chip>-rtc", "nvidia,tegra20-rtc"', where <chip>
  can be tegra30, tegra114, tegra124, or tegra132.
- reg : Specifies base physical address and size of the registers.
- interrupts : A single interrupt specifier.
- clocks : Must contain one entry, for the module clock.
  See ../clocks/clock-bindings.txt for details.

Example:

timer {
	compatible = "nvidia,tegra20-rtc";
	reg = <0x7000e000 0x100>;
	interrupts = <0 2 0x04>;
	clocks = <&tegra_car 4>;
};
Commit	Line	Data
380e04ac SW	1	NVIDIA Tegra20 real-time clock
	2
	3	The Tegra RTC maintains seconds and milliseconds counters, and five alarm
	4	registers. The alarms and other interrupts may wake the system from low-power
	5	state.
	6
	7	Required properties:
	8
193c9d23 PW	9	- compatible : For Tegra20, must contain "nvidia,tegra20-rtc". Otherwise,
	10	must contain '"nvidia,<chip>-rtc", "nvidia,tegra20-rtc"', where <chip>
	11	can be tegra30, tegra114, tegra124, or tegra132.
380e04ac SW	12	- reg : Specifies base physical address and size of the registers.
380e04ac SW	13	- interrupts : A single interrupt specifier.
d8f64797 SW	14	- clocks : Must contain one entry, for the module clock.
d8f64797 SW	15	See ../clocks/clock-bindings.txt for details.
380e04ac SW	16
	17	Example:
	18
	19	timer {
	20	compatible = "nvidia,tegra20-rtc";
	21	reg = <0x7000e000 0x100>;
	22	interrupts = <0 2 0x04>;
d8f64797	23	clocks = <&tegra_car 4>;
380e04ac	24	};