Commit | Line | Data |
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39ce4084 TA |
1 | * Samsung's S3C Real Time Clock controller |
2 | ||
3 | Required properties: | |
4 | - compatible: should be one of the following. | |
5 | * "samsung,s3c2410-rtc" - for controllers compatible with s3c2410 rtc. | |
d67288da CC |
6 | * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc. |
7 | * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc. | |
39ce4084 | 8 | * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc. |
df9e26d0 | 9 | * "samsung,exynos3250-rtc" - for controllers compatible with exynos3250 rtc. |
39ce4084 TA |
10 | - reg: physical base address of the controller and length of memory mapped |
11 | region. | |
12 | - interrupts: Two interrupt numbers to the cpu should be specified. First | |
f21ccfa0 | 13 | interrupt number is the rtc alarm interrupt and second interrupt number |
39ce4084 TA |
14 | is the rtc tick interrupt. The number of cells representing a interrupt |
15 | depends on the parent interrupt controller. | |
16 | ||
17 | Example: | |
18 | ||
19 | rtc@10070000 { | |
20 | compatible = "samsung,s3c6410-rtc"; | |
21 | reg = <0x10070000 0x100>; | |
22 | interrupts = <44 0 45 0>; | |
23 | }; |