[deliverable/linux.git] / Documentation / devicetree / bindings / serial / fsl-lpuart.txt

* Freescale low power universal asynchronous receiver/transmitter (lpuart)

Required properties:
- compatible :
  - "fsl,vf610-lpuart" for lpuart compatible with the one integrated
    on Vybrid vf610 SoC with 8-bit register organization
  - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
    on LS1021A SoC with 32-bit big-endian register organization
- reg : Address and length of the register set for the device
- interrupts : Should contain uart interrupt
- clocks : phandle + clock specifier pairs, one for each entry in clock-names
- clock-names : should contain: "ipg" - the uart clock

Optional properties:
- dmas: A list of two dma specifiers, one for each entry in dma-names.
- dma-names: should contain "tx" and "rx".

Note: Optional properties for DMA support. Write them both or both not.

Example:

uart0: serial@40027000 {
		compatible = "fsl,vf610-lpuart";
		reg = <0x40027000 0x1000>;
		interrupts = <0 61 0x00>;
		clocks = <&clks VF610_CLK_UART0>;
		clock-names = "ipg";
		dmas = <&edma0 0 2>,
			<&edma0 0 3>;
		dma-names = "rx","tx";
	};
Commit	Line	Data
c9e2e946 JL	1	* Freescale low power universal asynchronous receiver/transmitter (lpuart)
	2
	3	Required properties:
876496b8 JL	4	- compatible :
	5	- "fsl,vf610-lpuart" for lpuart compatible with the one integrated
	6	on Vybrid vf610 SoC with 8-bit register organization
	7	- "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
	8	on LS1021A SoC with 32-bit big-endian register organization
c9e2e946 JL	9	- reg : Address and length of the register set for the device
c9e2e946 JL	10	- interrupts : Should contain uart interrupt
12f28787 YY	11	- clocks : phandle + clock specifier pairs, one for each entry in clock-names
12f28787 YY	12	- clock-names : should contain: "ipg" - the uart clock
c9e2e946	13
f1cd8c87 YY	14	Optional properties:
	15	- dmas: A list of two dma specifiers, one for each entry in dma-names.
	16	- dma-names: should contain "tx" and "rx".
	17
	18	Note: Optional properties for DMA support. Write them both or both not.
	19
c9e2e946 JL	20	Example:
	21
	22	uart0: serial@40027000 {
f1cd8c87 YY	23	compatible = "fsl,vf610-lpuart";
	24	reg = <0x40027000 0x1000>;
	25	interrupts = <0 61 0x00>;
12f28787 YY	26	clocks = <&clks VF610_CLK_UART0>;
12f28787 YY	27	clock-names = "ipg";
f1cd8c87 YY	28	dmas = <&edma0 0 2>,
	29	<&edma0 0 3>;
	30	dma-names = "rx","tx";
	31	};