Commit | Line | Data |
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1ea6607d FE |
1 | * Freescale MXS Application UART (AUART) |
2 | ||
3 | Required properties: | |
4 | - compatible : Should be "fsl,<soc>-auart". The supported SoCs include | |
5 | imx23 and imx28. | |
6 | - reg : Address and length of the register set for the device | |
7 | - interrupts : Should contain the auart interrupt numbers | |
bcc20f9e SG |
8 | - dmas: DMA specifier, consisting of a phandle to DMA controller node |
9 | and AUART DMA channel ID. | |
10 | Refer to dma.txt and fsl-mxs-dma.txt for details. | |
11 | - dma-names: "rx" for RX channel, "tx" for TX channel. | |
e8001632 | 12 | |
8418e67d | 13 | Optional properties: |
7c573d7e JU |
14 | - fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines |
15 | for hardware flow control, | |
8418e67d | 16 | it also means you enable the DMA support for this UART. |
7c573d7e JU |
17 | - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD |
18 | line respectively. It will use specified PIO instead of the peripheral | |
19 | function pin for the USART feature. | |
20 | If unsure, don't specify this property. | |
8418e67d | 21 | |
1ea6607d FE |
22 | Example: |
23 | auart0: serial@8006a000 { | |
24 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; | |
25 | reg = <0x8006a000 0x2000>; | |
bcc20f9e SG |
26 | interrupts = <112>; |
27 | dmas = <&dma_apbx 8>, <&dma_apbx 9>; | |
28 | dma-names = "rx", "tx"; | |
7c573d7e JU |
29 | cts-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; |
30 | dsr-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; | |
31 | dcd-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; | |
1ea6607d FE |
32 | }; |
33 | ||
34 | Note: Each auart port should have an alias correctly numbered in "aliases" | |
35 | node. | |
36 | ||
37 | Example: | |
38 | ||
39 | aliases { | |
40 | serial0 = &auart0; | |
41 | serial1 = &auart1; | |
42 | serial2 = &auart2; | |
43 | serial3 = &auart3; | |
44 | serial4 = &auart4; | |
45 | }; |