Commit | Line | Data |
---|---|---|
76ce6770 MB |
1 | * Mediatek Universal Asynchronous Receiver/Transmitter (UART) |
2 | ||
3 | Required properties: | |
4 | - compatible should contain: | |
ab407df7 EH |
5 | * "mediatek,mt8135-uart" for MT8135 compatible UARTS |
6 | * "mediatek,mt8127-uart" for MT8127 compatible UARTS | |
83af225c | 7 | * "mediatek,mt8173-uart" for MT8173 compatible UARTS |
76ce6770 MB |
8 | * "mediatek,mt6589-uart" for MT6589 compatible UARTS |
9 | * "mediatek,mt6582-uart" for MT6582 compatible UARTS | |
83af225c EH |
10 | * "mediatek,mt6577-uart" for all compatible UARTS (MT8173, MT6589, MT6582, |
11 | MT6577) | |
76ce6770 MB |
12 | |
13 | - reg: The base address of the UART register bank. | |
14 | ||
15 | - interrupts: A single interrupt specifier. | |
16 | ||
17 | - clocks: Clock driving the hardware. | |
18 | ||
19 | Example: | |
20 | ||
21 | uart0: serial@11006000 { | |
22 | compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart"; | |
23 | reg = <0x11006000 0x400>; | |
24 | interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>; | |
25 | clocks = <&uart_clk>; | |
26 | }; |