Commit | Line | Data |
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787b0c1f AB |
1 | * ARM AMBA Primecell PL011 serial UART |
2 | ||
3 | Required properties: | |
4 | - compatible: must be "arm,primecell", "arm,pl011" | |
5 | - reg: exactly one register range with length 0x1000 | |
6 | - interrupts: exactly one interrupt specifier | |
7 | ||
8 | Optional properties: | |
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9 | - pinctrl: |
10 | When present, must have one state named "default", | |
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11 | and may contain a second name named "sleep". The former |
12 | state sets up pins for ordinary operation whereas | |
13 | the latter state will put the associated pins to sleep | |
14 | when the UART is unused | |
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15 | - clocks: |
16 | When present, the first clock listed must correspond to | |
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17 | the clock named UARTCLK on the IP block, i.e. the clock |
18 | to the external serial line, whereas the second clock | |
19 | must correspond to the PCLK clocking the internal logic | |
20 | of the block. Just listing one clock (the first one) is | |
21 | deprecated. | |
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22 | - clocks-names: |
23 | When present, the first clock listed must be named | |
a81a6c65 | 24 | "uartclk" and the second clock listed must be named |
787b0c1f | 25 | "apb_pclk" |
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26 | - dmas: |
27 | When present, may have one or two dma channels. | |
787b0c1f AB |
28 | The first one must be named "rx", the second one |
29 | must be named "tx". | |
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30 | - auto-poll: |
31 | Enables polling when using RX DMA. | |
32 | - poll-rate-ms: | |
33 | Rate at which poll occurs when auto-poll is set, | |
34 | default 100ms. | |
35 | - poll-timeout-ms: | |
36 | Poll timeout when auto-poll is set, default | |
37 | 3000ms. | |
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38 | |
39 | See also bindings/arm/primecell.txt | |
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40 | |
41 | Example: | |
42 | ||
43 | uart@80120000 { | |
44 | compatible = "arm,pl011", "arm,primecell"; | |
45 | reg = <0x80120000 0x1000>; | |
46 | interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; | |
47 | dmas = <&dma 13 0 0x2>, <&dma 13 0 0x0>; | |
48 | dma-names = "rx", "tx"; | |
49 | clocks = <&foo_clk>, <&bar_clk>; | |
50 | clock-names = "uartclk", "apb_pclk"; | |
51 | }; |