Commit | Line | Data |
---|---|---|
6e01365c SB |
1 | * MSM Serial UART |
2 | ||
3 | The MSM serial UART hardware is designed for low-speed use cases where a | |
4 | dma-engine isn't needed. From a software perspective it's mostly compatible | |
5 | with the MSM serial UARTDM except that it only supports reading and writing one | |
6 | character at a time. | |
7 | ||
8 | Required properties: | |
9 | - compatible: Should contain "qcom,msm-uart" | |
10 | - reg: Should contain UART register location and length. | |
11 | - interrupts: Should contain UART interrupt. | |
12 | - clocks: Should contain the core clock. | |
13 | - clock-names: Should be "core". | |
14 | ||
15 | Example: | |
16 | ||
17 | A uart device at 0xa9c00000 with interrupt 11. | |
18 | ||
19 | serial@a9c00000 { | |
20 | compatible = "qcom,msm-uart"; | |
21 | reg = <0xa9c00000 0x1000>; | |
22 | interrupts = <11>; | |
23 | clocks = <&uart_cxc>; | |
24 | clock-names = "core"; | |
25 | }; |