projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 334bc118 LP |
1 | * Renesas SH-Mobile Serial Communication Interface |
| 2 | ||
| 3 | Required properties: | |
| 4 | ||
| 598604ff | 5 | - compatible: Must contain one or more of the following: |
| 334bc118 | 6 | |
| 681b05f5 | 7 | - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART. |
| 34c4eda8 SH |
8 | - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART. |
| 9 | - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART. | |
| 10 | - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART. | |
| 11 | - "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART. | |
| 12 | - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART. | |
| 81bd1eb7 | 13 | - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART. |
| 334bc118 LP |
14 | - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART. |
| 15 | - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART. | |
| 16 | - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART. | |
| 17 | - "renesas,hscif-r8a7790" for R8A7790 (R-Car H2) HSCIF compatible UART. | |
| 456ad4a1 UH |
18 | - "renesas,scif-r8a7791" for R8A7791 (R-Car M2-W) SCIF compatible UART. |
| 19 | - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2-W) SCIFA compatible UART. | |
| 20 | - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2-W) SCIFB compatible UART. | |
| 21 | - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2-W) HSCIF compatible UART. | |
| 22 | - "renesas,scif-r8a7793" for R8A7793 (R-Car M2-N) SCIF compatible UART. | |
| 23 | - "renesas,scifa-r8a7793" for R8A7793 (R-Car M2-N) SCIFA compatible UART. | |
| 24 | - "renesas,scifb-r8a7793" for R8A7793 (R-Car M2-N) SCIFB compatible UART. | |
| 25 | - "renesas,hscif-r8a7793" for R8A7793 (R-Car M2-N) HSCIF compatible UART. | |
| c556522e UH |
26 | - "renesas,scif-r8a7794" for R8A7794 (R-Car E2) SCIF compatible UART. |
| 27 | - "renesas,scifa-r8a7794" for R8A7794 (R-Car E2) SCIFA compatible UART. | |
| 28 | - "renesas,scifb-r8a7794" for R8A7794 (R-Car E2) SCIFB compatible UART. | |
| 29 | - "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART. | |
| 3575b858 KM |
30 | - "renesas,scif-r8a7795" for R8A7795 (R-Car H3) SCIF compatible UART. |
| 31 | - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART. | |
| 681b05f5 GU |
32 | - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART. |
| 33 | - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART. | |
| 598604ff GU |
34 | - "renesas,rcar-gen1-scif" for R-Car Gen1 SCIF compatible UART, |
| 35 | - "renesas,rcar-gen2-scif" for R-Car Gen2 SCIF compatible UART, | |
| 36 | - "renesas,rcar-gen3-scif" for R-Car Gen3 SCIF compatible UART, | |
| 37 | - "renesas,rcar-gen2-scifa" for R-Car Gen2 SCIFA compatible UART, | |
| 38 | - "renesas,rcar-gen2-scifb" for R-Car Gen2 SCIFB compatible UART, | |
| 39 | - "renesas,rcar-gen1-hscif" for R-Car Gen1 HSCIF compatible UART, | |
| 40 | - "renesas,rcar-gen2-hscif" for R-Car Gen2 HSCIF compatible UART, | |
| 41 | - "renesas,rcar-gen3-hscif" for R-Car Gen3 HSCIF compatible UART, | |
| 334bc118 LP |
42 | - "renesas,scif" for generic SCIF compatible UART. |
| 43 | - "renesas,scifa" for generic SCIFA compatible UART. | |
| 44 | - "renesas,scifb" for generic SCIFB compatible UART. | |
| 45 | - "renesas,hscif" for generic HSCIF compatible UART. | |
| e1d0be61 | 46 | - "renesas,sci" for generic SCI compatible UART. |
| 334bc118 LP |
47 | |
| 48 | When compatible with the generic version, nodes must list the | |
| 598604ff GU |
49 | SoC-specific version corresponding to the platform first, followed by the |
| 50 | family-specific and/or generic versions. | |
| 334bc118 LP |
51 | |
| 52 | - reg: Base address and length of the I/O registers used by the UART. | |
| 53 | - interrupts: Must contain an interrupt-specifier for the SCIx interrupt. | |
| 54 | ||
| 55 | - clocks: Must contain a phandle and clock-specifier pair for each entry | |
| 56 | in clock-names. | |
| a9ec81f4 | 57 | - clock-names: Must contain "fck" for the SCIx UART functional clock. |
| 9a040c9f GU |
58 | Apart from the divided functional clock, there may be other possible |
| 59 | sources for the sampling clock, depending on SCIx variant. | |
| 60 | On (H)SCI(F) and some SCIFA, an additional clock may be specified: | |
| 61 | - "hsck" for the optional external clock input (on HSCIF), | |
| 62 | - "sck" for the optional external clock input (on other variants). | |
| 176ae5f6 GU |
63 | On UARTs equipped with a Baud Rate Generator for External Clock (BRG) |
| 64 | (some SCIF and HSCIF), additional clocks may be specified: | |
| 65 | - "brg_int" for the optional internal clock source for the frequency | |
| 66 | divider (typically the (AXI or SHwy) bus clock), | |
| 67 | - "scif_clk" for the optional external clock source for the frequency | |
| 68 | divider (SCIF_CLK). | |
| 334bc118 LP |
69 | |
| 70 | Note: Each enabled SCIx UART should have an alias correctly numbered in the | |
| 71 | "aliases" node. | |
| 72 | ||
| 3c99121c GU |
73 | Optional properties: |
| 74 | - dmas: Must contain a list of two references to DMA specifiers, one for | |
| 75 | transmission, and one for reception. | |
| 76 | - dma-names: Must contain a list of two DMA names, "tx" and "rx". | |
| 77 | ||
| 334bc118 LP |
78 | Example: |
| 79 | aliases { | |
| 80 | serial0 = &scifa0; | |
| 81 | }; | |
| 82 | ||
| 83 | scifa0: serial@e6c40000 { | |
| 598604ff GU |
84 | compatible = "renesas,scifa-r8a7790", |
| 85 | "renesas,rcar-gen2-scifa", "renesas,scifa"; | |
| 334bc118 LP |
86 | reg = <0 0xe6c40000 0 64>; |
| 87 | interrupt-parent = <&gic>; | |
| 88 | interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; | |
| 89 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; | |
| a9ec81f4 | 90 | clock-names = "fck"; |
| 3c99121c GU |
91 | dmas = <&dmac0 0x21>, <&dmac0 0x22>; |
| 92 | dma-names = "tx", "rx"; | |
| 334bc118 | 93 | }; |